MN103LF66/67/68/69/70/71/72/73/74/75/76/77/78/79 Series
32-bit Single-chip Microcontroller
PubNo. 2347901-012E
1.1 Overview
The MN103LF series of 32-bit single-chip microcomputers have multiple types of peripheral functions. This LSI
series is well suited for camera, TV, VCR, Car audio, printer, telephone, FAX machine, air-conditioner, music
instrument and other applications.
This LSI series has flexible and optimized hardware configurations and simple efficient instruction set. This LSI
series incorporates an internal ROM of 2096 KB (maximum) and RAM of 128 KB (maximum), 22 external
interrupts, 132 internal interrupts including non-maskable interrupt, 30 timer counters, 20 sets of serial interfaces,
A/D converter, D/A converter, 2 sets of watchdog timer, DMA, CAN, and IEBus interface.
In addition, this LSI series has 5 oscillation circuits (external high frequency: 4 MHz to 20 MHz/ external low fre-
quency:32.768 kHz/ internal high frequency: 20 MHz/ internal low frequency: 30 kHz/ PLL: frequency multiplier
of high or low frequency).
The internal clock can be switched to 5 oscillation clock except the internal low oscillation. The internal clock is
generated by dividing the oscillation clock or PLL clock. The best operation clock for the system can be selected
by switching its frequency ratio by programming.
A machine cycle (minimum instruction execution time) is 20.8 ns (internal operating condition: 1.8 V, 48 MHz).
Publication date: November 2015
1
MN103LF66/67/68/69/70/71/72/73/74/75/76/77/78/79 Series
32-bit Single-chip Microcontroller
PubNo. 2347901-012E
1.2 Product Summary
This manual describes the following model.
Series *1
Model
MN103LF78T *
MN103LF79T *
MN103LF78W *
Pin Number ROM size RAM size *2
144 pin
176 pin
144 pin
176 pin
144 pin
176 pin
144 pin
176 pin
100 pin
128 pin
144 pin
176 pin
100 pin
128 pin
144 pin
176 pin
100 pin
128 pin
144 pin
176 pin
100 pin
128 pin
144 pin
176 pin
1584 KB
1584 KB
2096 KB
2096 KB
1584 KB
1584 KB
2096 KB
2096 KB
1584 KB
1584 KB
1584 KB
1584 KB
2096 KB
2096 KB
2096 KB
2096 KB
1584 KB
1584 KB
1584 KB
1584 KB
2096 KB
2096 KB
2096 KB
2096 KB
128 KB
128 KB
128 KB
128 KB
128 KB
128 KB
128 KB
128 KB
128 KB
128 KB
128 KB
128 KB
128 KB
128 KB
128 KB
128 KB
128 KB
128 KB
128 KB
128 KB
128 KB
128 KB
128 KB
128 KB
ROM Sector
Swap Unit *3
768 KB
In-vehicle
LAN
Package
144 pin LQFP (20 mm angle/0.5 mm pitch)
176 pin LQFP (24 mm angle/0.5 mm pitch)
144 pin LQFP (20 mm angle/0.5 mm pitch)
MN103LF78/
MN103LF79/
MN103LF79W *
MN103LF78Y *
MN103LF79Y *
MN103LF78Z *
MN103LF79Z *
MN103LF66T *
MN103LF67T *
MN103LF68T *
MN103LF69T *
MN103LF66W *
MN103LF67W *
MN103LF68W *
1024 KB
CAN/IEBus
176 pin LQFP (24 mm angle/0.5 mm pitch)
144 pin LQFP (20 mm angle/0.5 mm pitch)
176 pin LQFP (24 mm angle/0.5 mm pitch)
144 pin LQFP (20 mm angle/0.5 mm pitch)
176 pin LQFP (24 mm angle/0.5 mm pitch)
100 pin LQFP (14 mm angle/0.5 mm pitch)
64 KB
768 KB
128 pin LQFP (18 mm angle/0.5 mm pitch)
144 pin LQFP (20 mm angle/0.5 mm pitch)
176 pin LQFP (24 mm angle/0.5 mm pitch)
100 pin LQFP (14 mm angle/0.5 mm pitch)
1024 KB
128 pin LQFP (18 mm angle/0.5 mm pitch)
144 pin LQFP (20 mm angle/0.5 mm pitch)
IEBus
176 pin LQFP (24 mm angle/0.5 mm pitch)
100 pin LQFP (14 mm angle/0.5 mm pitch)
128 pin LQFP (18 mm angle/0.5 mm pitch)
144 pin LQFP (20 mm angle/0.5 mm pitch)
MN103LF66/
MN103LF67/
MN103LF68/
MN103LF69
MN103LF69W *
MN103LF66Y *
MN103LF67Y *
MN103LF68Y *
MN103LF69Y *
MN103LF66Z *
MN103LF67Z *
MN103LF68Z *
MN103LF69Z *
64 KB
176 pin LQFP (24 mm angle/0.5 mm pitch)
100 pin LQFP (14 mm angle/0.5 mm pitch)
128 pin LQFP (18 mm angle/0.5 mm pitch)
144 pin LQFP (20 mm angle/0.5 mm pitch)
176 pin LQFP (24 mm angle/0.5 mm pitch)
Publication date: November 2015
2
MN103LF66/67/68/69/70/71/72/73/74/75/76/77/78/79 Series
32-bit Single-chip Microcontroller
PubNo. 2347901-012E
Series *1
Model
MN103LF70T *
MN103LF71T *
MN103LF72T *
MN103LF73T *
MN103LF70W *
MN103LF71W *
MN103LF72W *
Pin Number ROM size RAM size *2
100 pin
128 pin
144 pin
176 pin
100 pin
128 pin
144 pin
176 pin
100 pin
128 pin
144 pin
176 pin
100 pin
128 pin
144 pin
176 pin
100 pin
128 pin
144 pin
176 pin
100 pin
128 pin
144 pin
176 pin
100 pin
128 pin
144 pin
176 pin
100 pin
128 pin
144 pin
176 pin
1584 KB
1584 KB
1584 KB
1584 KB
2096 KB
2096 KB
2096 KB
2096 KB
1584 KB
1584 KB
1584 KB
1584 KB
2096 KB
2096 KB
2096 KB
2096 KB
1584 KB
1584 KB
1584 KB
1584 KB
2096 KB
2096 KB
2096 KB
2096 KB
1584 KB
1584 KB
1584 KB
1584 KB
2096 KB
2096 KB
2096 KB
2096 KB
128 KB
128 KB
128 KB
128 KB
128 KB
128 KB
128 KB
128 KB
128 KB
128 KB
128 KB
128 KB
128 KB
128 KB
128 KB
128 KB
128 KB
128 KB
128 KB
128 KB
128 KB
128 KB
128 KB
128 KB
128 KB
128 KB
128 KB
128 KB
128 KB
128 KB
128 KB
128 KB
ROM Sector
Swap Unit *3
In-vehicle
LAN
Package
100 pin LQFP (14 mm angle/0.5 mm pitch)
768 KB
128 pin LQFP (18 mm angle/0.5 mm pitch)
144 pin LQFP (20 mm angle/0.5 mm pitch)
176 pin LQFP (24 mm angle/0.5 mm pitch)
100 pin LQFP (14 mm angle/0.5 mm pitch)
1024 KB
128 pin LQFP (18 mm angle/0.5 mm pitch)
144 pin LQFP (20 mm angle/0.5 mm pitch)
CAN
176 pin LQFP (24 mm angle/0.5 mm pitch)
100 pin LQFP (14 mm angle/0.5 mm pitch)
128 pin LQFP (18 mm angle/0.5 mm pitch)
144 pin LQFP (20 mm angle/0.5 mm pitch)
MN103LF70/
MN103LF71/
MN103LF72/
MN103LF73
MN103LF73W *
MN103LF70Y *
MN103LF71Y *
MN103LF72Y *
MN103LF73Y *
MN103LF70Z *
MN103LF71Z *
MN103LF72Z *
MN103LF73Z *
MN103LF74T *
MN103LF75T *
MN103LF76T *
MN103LF77T *
MN103LF74W *
MN103LF75W *
MN103LF76W *
64 KB
176 pin LQFP (24 mm angle/0.5 mm pitch)
100 pin LQFP (14 mm angle/0.5 mm pitch)
128 pin LQFP (18 mm angle/0.5 mm pitch)
144 pin LQFP (20 mm angle/0.5 mm pitch)
176 pin LQFP (24 mm angle/0.5 mm pitch)
100 pin LQFP (14 mm angle/0.5 mm pitch)
768 KB
128 pin LQFP (18 mm angle/0.5 mm pitch)
144 pin LQFP (20 mm angle/0.5 mm pitch)
176 pin LQFP (24 mm angle/0.5 mm pitch)
100 pin LQFP (14 mm angle/0.5 mm pitch)
1024 KB
128 pin LQFP (18 mm angle/0.5 mm pitch)
144 pin LQFP (20 mm angle/0.5 mm pitch)
None
176 pin LQFP (24 mm angle/0.5 mm pitch)
100 pin LQFP (14 mm angle/0.5 mm pitch)
128 pin LQFP (18 mm angle/0.5 mm pitch)
144 pin LQFP (20 mm angle/0.5 mm pitch)
MN103LF74/
MN103LF75/
MN103LF76/
MN103LF77
MN103LF77W *
MN103LF74Y *
MN103LF75Y *
MN103LF76Y *
MN103LF77Y *
MN103LF74Z *
MN103LF75Z *
MN103LF76Z *
MN103LF77Z *
64 KB
176 pin LQFP (24 mm angle/0.5 mm pitch)
100 pin LQFP (14 mm angle/0.5 mm pitch)
128 pin LQFP (18 mm angle/0.5 mm pitch)
144 pin LQFP (20 mm angle/0.5 mm pitch)
176 pin LQFP (24 mm angle/0.5 mm pitch)
*1 Refer to [Chapter 37 Appendix] of LSI User’s Manual.
*2 When using On-Chip Debug function, the debugger take over 500 Byte in size.
*3 Refer to [Chapter 36 Internal Flash Memory] of LSI User’s Manual.
* Under development
Publication date: November 2015
3
MN103LF66/67/68/69/70/71/72/73/74/75/76/77/78/79 Series
32-bit Single-chip Microcontroller
PubNo. 2347901-012E
1.3 Hardware Functions
CPU core
MN103L core (The instruction set is compatible MN103S series)
Memory space 4 GB (instruct/data common use)
LOAD-STORE architecture (3-stage pipeline)
Machine cycle
High-speed mode 20.8 ns/ 48 MHz (Max)
Low-speed mode 30.5
s/
32.768 kHz (Max)
Operation mode
NORMAL mode
SLOW mode
HALT mode
STOP mode
(CPU clock operation, Peripheral circuit clock operation mode)
(CPU clock operation, Peripheral circuit clock operation mode)
(CPU clock stop, Peripheral circuit clock operation mode)
(All clocks stop mode)
Clock oscillation circuit : 5 circuits
External high-speed oscillation (clkosc) : Crystal oscillator/ Ceramic oscillator
: 4 MHz to 20 MHz
External low-speed oscillation (clkx)
: Crystal oscillator/ Ceramic oscillator
: 32.768 kHz
Internal high-speed oscillation (clkrc)
Internal low-speed oscillation (clkrcx)
PLL output (clkpll)
: 20 MHz
: 30 kHz
: 60 MHz to 120 MHz
Clock multiple circuit (PLL)
Multiplication rate:
4, 6, 8, 10, 12, 16, 20 multiplied clock of clkoscsel
2440 to 3660 multiplied clock of clkx
Clock dividing
2, 3 divided of clkpll
PLL output dividing clock: 20 MHz to 48 MHz (clkplldiv)
Publication date: November 2015
4
MN103LF66/67/68/69/70/71/72/73/74/75/76/77/78/79 Series
32-bit Single-chip Microcontroller
PubNo. 2347901-012E
Internal operation clock: 6 types
CPU clock (clkcpu)
Frequency
Clock source
Clock dividing
: 48 MHz (Max)
: clkplldiv, clkosc, clkrc, clkx
: 1, 2, 4, 8, 16, 32, 64 divided of clock source
Peripheral bus clock (clkbus)
Frequency
Clock source
Clock dividing
: 24 MHz (Max)
: clkplldiv, clkosc, clkrc, clkx
: 2, 4, 8, 16, 32, 64, 128 divided of clock source
(This setting is independent from the dividing clock setting of clkcpu.
Set the frequency of clkbus to less than clkcpu.)
Peripheral high-speed clock (clksp)
Frequency
Clock source
Clock dividing
: 24 MHz (Max)
: clkrc, clkosc, clkplldiv
: 1, 2, 4, 8, 16 divided of clock source
High-speed oscillation clock (clkoscsel)
Frequency
Clock source
: 22 MHz (Max)
: clkrc, clkosc
Internal low-speed oscillation clock (clkrcx)
Frequency
: 33 kHz (Max)
Low-speed oscillation clock (clksx)
Frequency
Clock source
: 39.0625 kHz (Max)
: clkrcx, clkxsel
External bus interface
Bus area : 2 MB
2 banks
Data bus : 8/ 16 bits
Publication date: November 2015
5
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