May 1997
ML4825*
High Frequency Power Supply Controller
GENERAL DESCRIPTION
The ML4825 High Frequency PWM Controller is an IC
controller optimized for use in Switch Mode Power
Supply designs running at frequencies to 1MHz.
Propagation delays are minimal through the comparators
and logic for reliable high frequency operation while slew
rate and bandwidth are maximized on the error amplifier.
This controller is designed to work in either voltage or
current mode and provides for input voltage feed forward.
A 1V threshold current limit comparator provides cycle-
by-cycle current limit while exceeding a 1.4V threshold
initiates a soft-start cycle. The soft start pin doubles as a
maximum duty cycle clamp. An under-voltage lockout
circuit with 800mV of hysteresis assures low startup
current and drives the outputs low.
This controller is similar in architecture and performance
to the UC1825 controller, however the ML4825 includes
many features not found on the 1825. These features are
set in
Italics.
FEATURES
s
s
s
s
s
s
s
s
s
s
s
s
s
Practical operation at switching frequencies to 1.0MHz
High current (2A peak) dual totem pole outputs
Wide bandwidth error amplifier
Fully latched logic with double pulse suppression
Pulse-by-pulse current limiting
Soft start and maximum duty cycle control
Under voltage lockout with hysteresis
Precision trimmed 5.1V bandgap reference
Pin compatible improved replacement for UC1825
Fast shut down path from current limit to outputs
Outputs preset to known condition after under voltage
lockout
Soft start latch ensures full soft start cycle
Outputs pull low for undervotage lockout
BLOCK DIAGRAM
(Pin configuration shown for 16-pin version)
5
6
*Some Packages Are Obsolete or End Of Life
CLOCK OUT
R
T
C
T
OSC
4
7
3
RAMP
E/A OUT
1.25V
+
R
+
–
COMP
S
Q
PWR V
C
OUT A
V+
C
TF.F.
P
Q
Q
POWER GND
POWER V
C
OUT B
PWR GND
–
+
+
2
1
NI
INV
+
–
ERROR
AMP
13
11
9µA
8
14
12
SS
4V
1V
ENABLE
V
REF
–
9
1V
I
LIM
/SD
–
+
1.5V V
REF
16
V
REF
GEN
R
Q
–
9V
INTERNAL
BIAS
V
CC
SIGNAL GND
15
10
+
1.4V
–
S
UNDER
VOLTAGE
LOCKOUT
+
1
ML4825
PIN CONFIGURATION
ML4825
16-Pin PDIP
16-Pin SOIC
NI
ML4825
20-Pin PLCC
5.1V REF
20
NI
E/A OUT
CLOCK
R
T
C
T
RAMP
SS
2
3
4
5
6
7
8
15
14
13
12
11
10
9
V
CC
OUT B
V
C
PWR GND
OUT A
GND
I
LIM
/SD
E/A OUT
CLOCK
NC
R
T
C
T
4
5
6
7
8
3
2
1
NC
INV
1
16
5.1V REF
19
18
17
16
15
14
OUT B
V
C
NC
PWR GND
OUT A
9
10 11
12
13
I
LIM
/SD
RAMP
TOP VIEW
TOP VIEW
PIN DESCRIPTION
(Pin number in parentheses is for PLCC version)
PIN
NAME
FUNCTION
PIN
NAME
FUNCTION
1 (2)
INV
Inverting input to error amp.
Non-inverting input to error amp.
9 (12) I
LIM
/SD
10 (13) GND
Current limit sense pin. Normally
connected to current sense resistor.
Analog signal ground
High current totem pole output. This
output is the first one energized after
power on reset
2 (3) NI
3 (4) E/A OUT
4 (5) CLOCK
5 (7) R
T
Output of error amplifier and input
to main comparator
Oscillator output
Timing resistor for oscillator—
sets charging current for oscillator
timing capacitor (pin 6)
Timing capacitor for oscillator
Non-inverting input to main
comparator. Connected to C
T
for
voltage mode operation or to current
sense resistor for current mode
Normally connected to soft start
capacitor
11 (14) OUT A
12 (15) PWR GND Return for the high current totem
pole outputs
13 (17) V
C
14 (18) OUT B
15 (19) V
CC
16 (20) 5.1V REF
Positive supply for the high current
totem pole output
High current totem pole output
Positive supply for the IC
Buffered output for the 5.1V voltage
reference
6 (8) C
T
7 (9) RAMP
8 (10) SS
2
GND
SS
NC
V
CC
INV
ML4825
ABSOLUTE MAXIMUM RATINGS
Absolute maximum ratings are those values beyond which
the device could be permanently damaged. Absolute
maximum ratings are stress ratings only and functional
device operation is not implied.
Supply Voltage (V
C,
V
CC
) ........................................... 30V
Output Current, Source or Sink (OUT A, OUT B)
DC ....................................................................... 0.5A
Pulse (0.5µs) ......................................................... 2.0A
Analog Inputs
(INV, NI, RAMP) ................................ GND –0.3V to 7V
(SS, I
LIM
) ........................................... GND –0.3V to 6V
CLOCK Output Current ........................................... –5mA
E/A OUT Output Current .......................................... 5mA
Soft Start Sink Current ............................................ 20mA
R
T
Charging Current ................................................ –5mA
Junction Temperature
ML4825IX, ML4825CX ....................................... 150°C
Storage Temperature Range ..................... –65°C to 150°C
Lead Temperature (soldering 10 sec.) ..................... 260°C
Thermal Resistance (θ
JA
)
Plastic DIP or SOIC ......................................... 65°C/W
Plastic Chip Carrier (PCC) ................................ 60°C/W
OPERATING CONDITIONS
Temperature Range
ML4825CX ................................................ 0°C to 70°C
ML4825IX .............................................. –40°C to 85°C
ELECTRICAL CHARACTERISTICS
Unless otherwise specified, R
T
= 3.65kΩ, C
T
= 1000pF, T
A
= Operating Temperature Range, V
CC
= 15V (Note 1).
PARAMETER
OSCILLATOR
Initial Accuracy
Voltage Stability
Temperature Stability
Total Variation
Clock Out High
Clock Out Low
Ramp Peak
Ramp Valley
Ramp Valley to Peak
REFERENCE
Output Voltage
T
J
= 25°C, I
O
= 1mA
10V < V
CC
< 30V
1mA < I
O
< 10mA
–55°C < T
J
< 150°C
Line, load, temperature
C suffix
I suffix
Output Noise Voltage
Long Term Stability
Short Circuit Current
ERROR AMPLIFIER
Input Offset Voltage
C suffix
I suffix
Input Bias Current
Input Offset Current
Open Loop Gain
1 < V
O
< 4V
60
–15
–15
0.6
0.1
96
15
15
3
1
mV
mV
µA
µA
dB
10Hz to 10kHz
T
J
= 125°C, 1000 hours
V
REF
= 0V
–15
4.95
4.95
50
5
–50
25
–100
C suffix
I suffix
Line Regulation
Load Regulation
Temperature Stability
Total Variation
5.00
5.00
–20
–20
5.10
5.10
2
5
0.2
5.20
5.20
20
20
0.4
5.25
5.25
V
V
mV
mV
%
V
V
µV
mV
mA
2.6
0.7
1.6
Line, temperature
340
3.9
4.5
2.3
2.8
1.0
1.8
2.9
3.0
1.25
2.0
T
J
= 25°C
10V < V
CC
< 30V, T
A
= 25°C
360
–2
400
0.2
440
2
5
460
kHz
%
%
kHz
V
V
V
V
V
CONDITIONS
MIN
TYP
MAX
UNITS
3
ML4825
ELECTRICAL CHARACTERISTICS
(Continued)
PARAMETER
ERROR AMPLIFIER
(Continued)
CMRR
PSRR
Output Sink Current
Output Source Current
Output High Voltage
Output Low Voltage
Unity Gain Bandwidth
Slew Rate
PWM COMPARATOR
Ramp Bias Current
Duty Cycle Range
E/A OUT Zero DC Threshold
Delay to Output
SOFT START
Charge Current
Discharge Current
CURRENT LIMIT/SHUTDOWN
I
LIM
Bias Current
Current Limit Threshold
Shutdown Threshold
Delay to Output
OUTPUT
Output Low Level
Output High Level
Collector Leakage
Rise/Fall Time
UNDERVOLTAGE LOCKOUT
Start Threshold
UVLO Hysteresis
SUPPLY
Start Up Current
I
CC
Note 1:
CONDITIONS
1.5V < V
CM
< 5.5V
10V < V
CC
< 30V
V
EA OUT A
= 1.0V
V
EA OUT A
= 4.0V
I
EA OUT A
= –0.5mA
I
EA OUT A
= 1mA
C suffix
I suffix
C suffix
I suffix
MIN
75
75
80
80
1
–0.5
4.0
0
3
6
TYP
95
95
110
110
2.5
–1.3
4.7
0.5
5.5
12
–1
MAX
UNITS
dB
dB
dB
dB
mA
mA
5.0
1.0
V
V
MHz
V/µs
V
RAMP
= 0V, T
A
> 0°C
C suffix
I suffix
C suffix
I suffix
85
80
1.1
–5
–5
100
100
µA
µA
%
%
V
nS
µA
mA
V
RAMP
= 0V
1.25
50
1.7
80
SS = 0.5V
SS = 1V
0V < V
I(LIM)
< 0.5V
C suffix
I suffix
T
A
> 0°C
T
A
< 0°C
–3
1
–10
–10
0.9
1.25
1.25
–9
–20
10
10
1
1.4
1.4
40
1.1
1.55
1.60
70
0.4
2.2
µA
µA
V
V
V
ns
V
V
V
V
I
OUT
= 20mA
I
OUT
= 200mA
I
OUT
= –20mA
I
OUT
= –200mA
V
C
= 30V
C
L
= 1000pF
8.8
0.3
V
CC
= 8V
C suffix
I suffix
V
INV,
V
RAMP,
V
I(LIM)/SD
= 0V,
V
NI
= 1V, T
A
= 25°C
0.1
0.1
10
13.0
12.0
0.25
1.2
13.5
13.0
100
30
9.2
0.8
1.1
26
500
60
9.6
1.2
2.5
3.5
33
µA
ns
V
V
mA
mA
mA
Limits are guaranteed by 100% testing, sampling, or correlation with worst-case test conditions.
4
ML4825
FUNCTIONAL DESCRIPTION
OSCILLATOR
The ML4825 oscillator charges the external capacitor (C
T
)
with a current (I
SET
) equal to 3/R
SET
. When the capacitor
voltage reaches the upper threshold (Ramp Peak), the
comparator changes state and the capacitor discharges to
the lower threshold (Ramp Valley) through Q1. While the
capacitor is discharging, Q2 provides a high pulse.
The oscillator period can be described by the following
relationship:
t
OSC
= t
RAMP
+ t
DEADTIME
where:
t
RAMP
=
C (Ramp Valley to Peak)
I
SET
1k
100
1k
10k
100k
100k
100nF
47nF
22nF
R
T
(Ω)
0nF
10k
4.7nF
2.2nF
1nF
470pF
1M
FREQUENCY (Hz)
Figure 2. Oscillator Timing Resistance vs Frequency
and:
t
DEADTIME
=
C (Ramp Valley to Peak)
I
Q1
160
140
I
SET
T
D
(ns)
5
1.0nF
5.1V
3V
I
SET
120
R
T
6
C
T
I
Q1
+
–
100
Q1
4
470pF
80
10k
100k
FREQUENCY (Hz)
1M
Figure 3. Oscillator Deadtime vs Frequency
CLOCK
t
D
RAMP PEAK
C
T
RAMP VALLEY
4.70
2.20
1.00
0.47
0.22
0.10
0.047
0.47
Figure 1. Oscillator Block Diagram
TD (µs)
1.0
2.2
4.7
10.0
22
47
100
CT (nF)
Figure 4. Oscillator Deadtime vs C
T
(3kΩ
≤
R
T
≤
100kΩ)
5
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