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March 1997

ML2008*, ML2009**

µP

Compatible Logarithmic Gain/Attenuator

GENERAL DESCRIPTION

The ML2008 and ML2009 are digitally controlled

logarithmic gain/attenuators with a range of –24 to +24dB

in 0.1dB steps.

Easy interface to microprocessors is provided by an input

latch and control signals consisting of chip select and

write.

The interface for gain setting of the ML2008 is by an 8-bit

data word, while the ML2009 is designed to interface to a

16-bit data bus with a single write operation by hard-

wiring the gain/attenuation pin or LSB pin. The ML2008

can be power downed by the microprocessor utilizing a

bit in the second write operation.

Absolute gain accuracy is 0.05dB max over supply

tolerance of

±10%

and temperature range.

These CMOS logarithmic gain/attenuators are designed for

a wide variety of applications in telecom, audio, sonar or

general purpose function generation.

* This Part Is End Of Life As Of August 1, 2000

** This Part Is Obsolete

FEATURES

s

Low noise

Low harmonic distortion

Gain range

Resolution

Flat frequency response

Low supply current

0dBrnc max with +24dB gain

–60dB max

–24 to +24dB

0.1dB steps

±0.05dB

from 0.3-4kHz

±0.10dB

from 0.1-20kHz

4mA max from

±5V

supplies

TTL/CMOS compatible digital interface

ML2008 is designed to interface to an 8-bit data bus;

ML2009 to 16-bit data bus

BLOCK DIAGRAM

ML2008

V

CC

V

SS

GND

AGND

V

CC

V

SS

GND

ML2009*

AGND

+5

V

IN

–5

+

COARSE

–

+

FINE

–

RESISTORS/

SWITCHES

16

DECODERS

8

REGISTER 0

+

BUFFER

–

V

OUT

+5

V

IN

–5

+

COARSE

–

+

FINE

–

RESISTORS/

SWITCHES

16

DECODERS

9

RESISTORS/

SWITCHES

16

+

BUFFER

–

V

OUT

RESISTORS/

SWITCHES

16

1

PDN

1

REGISTER 1

8

WR

CS

A0

WR

CS

REGISTER 0

9

D0–D8

D1–D8

1

ML2008, ML2009

PIN CONFIGURATION

ML2008

18-Pin DIP (P18)

D7

D6

D5

D4

WR

D3

D2

D1

GND

1

2

3

4

5

6

7

8

9

18

17

16

15

14

13

12

11

10

TOP VIEW

D8

V

CC

V

OUT

V

SS

AGND

V

IN

NC

CS

A0

D7

D6

D5

D4

WR

D3

D2

D1

GND

ML2009*

18-Pin DIP (P18)

1

2

3

4

5

6

7

8

9

18

17

16

15

14

13

12

11

10

TOP VIEW

D8

V

CC

V

OUT

V

SS

AGND

V

IN

NC

CS

D0

20-Pin PLCC (Q20)

V

CC

D5

D6

D7

D8

20-Pin PLCC (Q20)

V

CC

19

18

17

16

15

14

9

D1

10 11

GND

D0

12

CS

13

V

IN

V

OUT

V

SS

AGND

NC

D5

D6

D7

1

D8

20

3

D4

NC

WR

D3

D2

4

5

6

7

8

9

D1

2

1

20

19

18

17

16

15

14

V

OUT

V

SS

AGND

NC

D4

NC

WR

D3

D2

4

5

6

7

8

3

2

10 11

GND

A0

12

CS

13

V

IN

TOP VIEW

PIN DESCRIPTION

NAME

FUNCTION

NAME

FUNCTION

V

SS

V

CC

GND

AGND

Negative supply. –5Volts

±10%

Positive supply. 5Volts

±10%

Digital ground. 0Volts. All digital

inputs are referenced to this ground.

Analog ground. 0Volts. Analog input

and output are referenced to this

ground.

Analog input

Analog output

Data bit, ATTEN/GAIN

Data bit, C3

Data bit, C2

Data bit, C1

Data bit, C0

D3

D2

D1

D0

WR

CS

Data bit, F3

Data bit, P

DN

, F2 ML2008; F2 ML2009

Data bit, F0, F1 ML2008; F1 ML2009

Data bit, F0 ML2009 only

Write enable. This input latches the

data bits into the registers on rising

edges of

WR.

Chip select. This input selects the

device by only allowing the

WR

signal

to latch in data when

CS

is low.

Address select. This input determines

which data word is being written into

the registers.

V

IN

V

OUT

D8

D7

D6

D5

D4

A0

(ML2008 only)

2

ML2008, ML2009

ABSOLUTE MAXIMUM RATINGS

(Note 1)

Supply Voltage

V

CC

.................................................................... +6.5V

V

SS

......................................................................–6.5V

AGND with Respect to GND....................... V

CC

to V

SS

Analog Inputs and Outputs ..... V

SS

–0.3V to V

CC

+0.3V

Digital Inputs and Outputs ... GND –0.3V to V

CC

+0.3V

Input Current Per Pin ........................................

±25mA

Power Dissipation ........................................... 750mW

Storage Temperature Range ............... –65°C to +150°C

Lead Temperature (Soldering 10 sec.) ................. 300°C

OPERATING CONDITIONS

Temperature Range (Note 2)

ML2008CX, ML2009CX .......................... 0°C to +70°C

ML2008IX, ML2009IX ......................... –40°C to +85°C

Supply Voltage

V

CC

................................................................ 4V to 6V

V

SS

............................................................. –4V to –6V

ELECTRICAL CHARACTERISTICS

Unless otherwise specified, T

A

= T

MIN

to T

MAX

, V

CC

= 5V

±10%,

V

SS

= –5V

±10%,

Data Word: D8 (ATTEN/GAIN) = 1,

Other Bits = 0, (0dB Ideal Gain), C

L

= 100pF, R

L

= 600Ω, dBm measurements use 600Ω as reference load, digital timing

measured at 1.4V.

SYMBOL

Analog

AG

RG

Absolute Gain Accuracy

Relative Gain Accuracy

4

V

IN

= 8dBm, 1kHz

100000001

000000000

000000001

All other gain settings

All values referenced to 100000000

gain when D8 (ATTEN/GAIN) = 1,

V

IN

= 8dBm when D8 (ATTEN/GAIN) = 0,

V

IN

= (8dBm – Ideal Gain) in dB

300-4000Hz

100-20,000Hz

Relative to 1kHz

V

IN

= 0, +24dB gain

V

IN

= 0, +24dB, C msg weighted

V

IN

= 0, +24dB, 1kHz

V

IN

= 8dBm, 1kHz

Measure 2nd, 3rd, harmonic relative

to fundamental

V

IN

= 8dBm, 1kHz

C msg weighted

200mV

P-P

, 1kHz sine, V

IN

= 0

on V

CC

on V

SS

1

±3.0

+60

–6

450

–0.05

–0.1

+0.05

+0.1

dB

PARAMETER

NOTES

CONDITIONS

MIN

TYP

NOTE 3

MAX

UNITS

FR

Frequency Response

4

–0.05

–0.1

+0.05

+0.1

±100

0

900

–60

dB

mV

dBrnc

nv/√Hz

dB

V

OS

I

CN

HD

Output Offset Voltage

Idle Channel Noise

Harmonic Distortion

4

5

4

SD

PSRR

Signal to Distortion

Power Supply Rejection

4

dB

–60

–40

dB

Meg

V

Z

IN

V

INR

V

OSW

Input Impedance, V

IN

Input Voltage Range

Output Voltage Swing

4

3

ML2008, ML2009

ELECTRICAL CHARACTERISTICS

(Continued)

SYMBOL

Digital and DC

V

IL

V

IH

I

IN

I

IN

I

CC

I

SS

I

CCP

I

SSP

Digital Input Low Voltage

Digital Input High Voltage

Input Current, Low

Input Current, High

V

CC

Supply Current

V

SS

Supply Current

V

CC

Supply Current, ML2008

Powerdown Mode Only

V

SS

Supply Current, ML2008

Powerdown Mode Only

4

V

IH

= GND

V

IH

= V

CC

No output load, V

IL

= GND,

V

IH

= V

CC

, V

IN

= 0

No output load, V

IL

= GND,

V

IH

= V

CC

, V

IN

= 0

No output load, V

IL

= GND,

V

IH

= V

CC

No output load, V

IL

= GND,

V

IH

= V

CC

V

IN

= 0.185V. Change gain from –24

to +24dB. Measure from

WR

rising

edge to when V

OUT

settles to within

0.05dB of final value.

Gain = +24dB. V

IN

= –3V to +3V step.

Measure from V

IN

= –3V to when V

OUT

settles to within 0.05dB of final value.

50

0

50

2.0

–10

10

4

–4

0.5

–0.1

0.8

V

µA

mA

PARAMETER

NOTES

CONDITIONS

MIN

TYP

NOTE 3

MAX

UNITS

AC Characteristics

t

SET

V

OUT

Settling Time

4

20

µs

t

STEP

V

OUT

Step Response

4

20

µs

t

DS

t

DH

t

AS

t

AH

t

CSS

t

CSH

t

PW

Note 1:

Note 2:

Note 3:

Note 4:

Note 5:

Data Setup Time

Data Hold Time

A0 Setup Time

A0 Hold Time

CS*

Setup Time

CS*

Hold Time

WR*

Pulse Width

4

ns

Absolute maximum ratings are limits beyond which the life of the integrated circuit may be impaired. All voltages unless otherwise specified are measured with

respect to ground.

0°C to +70°C and –40°C to +85°C operating temperature range devices are 100% tested with temperature limits guaranteed by 100% testing, sampling, or by

correlation with worst-case test conditions.

Typicals are parametric norm at 25°C.

Parameter guaranteed and 100% production tested.

Parameter guaranteed. Parameters not 100% tested are not in outgoing quality level calculation.

4

ML2008, ML2009

TIMING DIAGRAM

D0-D8

t

DS

t

PW

WR

t

AS

A0

t

CSS

CS

t

CSH

t

AH

DATA

VALID

t

DH

TYPICAL PERFORMANCE CURVES

0

–0.5

–.10

–.15

AMPLITUDE (dB)

GAIN = +18dB

ATTEN: V

IN

= 0.5V

RMS

GAIN: V

IN

= 0.5V

RMS

/GAIN SETTING

GAIN = +24dB

–.20

GAIN = +12dB

–.25

GAIN = +0, –24dB

–.30

–.35

–.40

–.45

–.50

100

1K

10K

FREQUENCY (Hz)

100K

0

–0.5

–.10

–.15

AMPLITUDE (dB)

ATTEN: V

IN

= 2V

RMS

GAIN: V

IN

= 2V

RMS

/GAIN SETTING

GAIN = +24dB

GAIN = 0dB

–.20

GAIN = –24dB

–.25

–.30

–.35

–.40

–.45

–.50

100

1K

10K

FREQUENCY (Hz)

100K

Figure 2. Amplitude vs Frequency

(V

IN

/V

OUT

= 0.5V

RMS

)

Figure 3. Amplitude vs Frequency

(V

IN

/V

OUT

= 2V

RMS

)

2

OUTPUT NOISE VOLTAGE (µV/√Hz)

1.8

C

MSG

OUTPUT (NOISE) (dBrnc)

1.6

1.4

GAIN = +12dB

1.2

1

0.8

0.6

0.4

0.2

0

GAIN = –24dB

GAIN = +24dB

–2

VIN = 0

–3

–4

–5

–6

–7

–8

–9

–10

10

100

FREQUENCY (Hz)

1K

10K

–24

–18

–12

–6

0

6

12

18

24

GAIN SETTING (dB)

Figure 4. Output Noise Voltage vs Frequency

Figure 5. C

MSG

Output Noise vs Gain Setting

5

ML2008CP

ML2008CP概述

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