CY7C65621/31
EZ-USB HX2LP Lite™
Low Power USB 2.0 Hub Controller Family
Features
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USB 2.0 hub controller
Compliant with the USB 2.0 specification
USB-IF certified: TID# 30000009
Windows Hardware Quality Lab (WHQL) compliant
Up to four downstream ports supported
Supports bus powered and self powered modes
Single transaction translator (TT)
Bus power configurations
Fit, form, and function compatible with CY7C65640 and
CY7C65640A (TetraHub™)
Space saving 56-pin QFN
Single power supply requirement
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Internal regulator for reduced cost
Integrated upstream pull up resistor
Integrated pull down resistors for all downstream ports
Integrated upstream and downstream termination resistors
Integrated port status indicator control
24 MHz external crystal (integrated phase locked loop (PLL))
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In-system EEPROM programming
Configurable with external SPI EEPROM:
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Vendor ID, Product ID, Device ID (VID/PID/DID)
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Number of active ports
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Number of removable ports
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Maximum power setting for high speed and full speed
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Hub controller power setting
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Power on timer
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Overcurrent detection mode
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Enabled and disabled overcurrent timer
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Overcurrent pin polarity
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Indicator pin polarity
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Compound device
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Enable full speed only
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Disable port indicators
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Ganged power switching
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Self and bus powered compatibility
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Fully configurable string descriptors for multiple language
support
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Block Diagram CY7C65631
D+
D-
High-Speed
USB Control Logic
SPI Communication
Block
SPI_SCK
SPI_SD
SPI_CS
USB 2.0 PHY
24 MHz
Crystal
PLL
USB Upstream Port
Serial
Interface
Engine
Transaction Translator
Hub Repeater
TT RAM
Routing Logic
USB Downstream Port 1
USB 2.0
PHY
Port Power
Control
Port
Status
USB Downstream Port 2
USB 2.0
PHY
Port Power
Control
Port
Status
USB Downstream Port 3
USB 2.0
PHY
Port Power
Control
Port
Status
USB Downstream Port 4
USB 2.0
PHY
Port Power
Control
Port
Status
D+
D-
PWR#[1]
LED D+
OVR#[1]
D- PWR#[2]
OVR#[2]
LED
D+
D-
PWR#[3]
LED D+
OVR#[3]
D-
PWR#[4]
LED
OVR#[4]
Cypress Semiconductor Corporation
Document #: 001-52934 Rev. *C
•
198 Champion Court
•
San Jose
,
CA 95134-1709
•408-943-2600
Revised February 23, 2011
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CY7C65621/31
Block Diagram CY7C65621
D+
D-
High-Speed
USB Control Logic
SPI Communication
Block
SPI_SCK
SPI_SD
SPI_CS
USB 2.0 PHY
24 MHz
Crystal
PLL
USB Upstream Port
Serial
Interface
Engine
Transaction Translator (X1)
Hub Repeater
TT RAM
Routing Logic
USB Downstream Port 1
USB 2.0
PHY
Port Power
Control
Port
Status
USB Downstream Port 2
USB 2.0
PHY
Port Power
Control
Port
Status
D+
D- PWR#[1]
OVR#[1]
LED
D+
D-
PWR#[2]
LED
OVR#[2]
Document #: 001-52934 Rev. *C
Page 2 of 27
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CY7C65621/31
Contents
Introduction .........................................................................4
USB Serial Interface Engine ..........................................4
Hub Repeater ................................................................4
Transaction Translator ..................................................4
Applications ........................................................................4
Functional Overview ..........................................................4
System Initialization .......................................................4
Enumeration ..................................................................4
Downstream Ports .........................................................5
Upstream Port ...............................................................5
Power Switching ............................................................5
Overcurrent Detection ...................................................5
Port Indicators ...............................................................5
Pin Configuration ...............................................................7
Pin Description Table x ......................................................8
Default Descriptors ..........................................................10
Device Descriptor ........................................................10
Configuration Descriptor ..............................................10
Interface Descriptor .....................................................11
Endpoint Descriptor .....................................................11
Device Qualifier Descriptor ..........................................11
Hub Descriptor ............................................................12
Configuration Options .....................................................13
0xD0 Load ...................................................................13
0xD2 Load ...................................................................13
0xD4 Load ...................................................................14
Supported USB Requests ................................................17
Device Class Commands ............................................17
Hub Class Commands ................................................18
Upstream USB Connection ..............................................20
Downstream USB Connections .......................................20
LED Connections ..............................................................20
System Block Diagram .....................................................21
Electrical Characteristics .................................................22
Absolute Maximum Ratings .........................................22
Operating Conditions ...................................................22
DC Electrical Characteristics .......................................22
USB Transceiver .........................................................22
AC Electrical Characteristics .......................................22
Ordering Information ........................................................23
Ordering Code Defintions ............................................23
Package Diagram ..............................................................24
Acronyms ..........................................................................25
Document Conventions ...................................................25
Units of Measure .........................................................25
ocument History Page ......................................................26
Sales, Solutions, and Legal Information ........................27
Worldwide Sales and Design Support .........................27
Products ......................................................................27
PSoC
®
Solutions .........................................................27
Document #: 001-52934 Rev. *C
Page 3 of 27
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CY7C65621/31
Introduction
EZ-USB HX2LP Lite™ is Cypress’s next generation family of
high performance, low power USB 2.0 hub controllers. HX2LP
Lite is an ultra low power single chip USB 2.0 hub controller with
integrated upstream and downstream transceivers, a USB Serial
Interface Engine (SIE), USB Hub Control and Repeater logic,
and Transaction Translator (TT) logic. Cypress has also
integrated many external passive components such as pull up
and pull down resistors, reducing the overall bill of materials
required to implement a hub design. The HX2LP portfolio
consists of:
1. CY7C65631: 4-port/single transaction translator
This device option is for ultra low power applications that re-
quire four downstream ports. All four ports share a single
transaction translator. The CY7C65631 is available in a 56
QFN and is also pin-for-pin compatible with the CY7C65640.
2. CY7C65621:
This device option is for a 2-port bus powered application.
Both ports share a single transaction translator. The
CY7C65621 is available in a 56 QFN.
All device options are supported by Cypress’ world class
reference design kits, which include board schematics, bill of
materials, Gerber files, Orcad files, and thorough design
documentation.
Translator. If a high speed device is connected to this high speed
hub, the route only includes the repeater and no Transaction
Translator because the device and the hub operate at the same
speed. When the hub is operating at full speed (the upstream
port is connected to a full speed host controller), a high speed
peripheral does not operate at its full capability. These devices
only work at full speed. Full and low speed devices connected to
this hub operate at their normal speed.
Applications
Typical applications for the HX2LP Lite device family are:
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Standalone hubs
Motherboard hubs
Monitor hubs
Advanced port replicators
Docking stations
Split-PC designs
External personal storage drives
Keyboard hubs
Functional Overview
The Cypress CY7C65621/31 USB 2.0 hubs are high perfor-
mance, low system cost solutions for USB. The CY7C65621/31
USB 2.0 hubs integrate 1.5 k
Ω
upstream pull up resistors for full
speed operation and all downstream 15 k
Ω
pull down resistors
and series termination resistors on all upstream and downstream
D+ and D– pins. This results in optimization of system costs by
providing built-in support for the USB 2.0 specification.
USB Serial Interface Engine
The Serial Interface Engine (SIE) allows the CY7C65621/31 to
communicate with the USB host. The SIE handles the following
USB activity independently of the Hub Control Block.
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Bit stuffing/unstuffing
Checksum generation/checking
TOKEN type identification
Address checking.
System Initialization
On power up, the CY7C65621/31 reads an external SPI
EEPROM for configuration information. At the most basic level,
this EEPROM has the Vendor ID (VID), Product ID (PID), and
Device ID (DID) for the customer's application. For more
specialized applications, other configuration options can be
specified. See
Configuration Options
on page 13 for more
details.
After reading the EEPROM, if VBUSPOWER (connected to
up-stream V
BUS
) is high, CY7C65621/31 enables the pull up
resistor on D+ to indicate its presence to the upstream hub, after
which a USB Bus Reset is expected. During this reset,
CY7C65621/31 initiates a chirp to indicate that it is a high speed
peripheral. In a USB 2.0 system, the upstream hub responds with
a chirp sequence, and CY7C65621/31 is in a high speed mode,
with the upstream D+ pull up resistor turned off. In USB 1.x
systems, no such chirp sequence from the upstream hub is seen,
and CY7C65621/31 operates as a normal 1.x hub (operating at
full speed).
Hub Repeater
The Hub Repeater manages connectivity between upstream and
downstream facing ports that are operating at the same speed.
It supports full speed, low speed, and high speed connectivity.
According to the USB 2.0 specification, the HUB Repeater
provides the following functions:
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Sets up and tears down connectivity on packet boundaries
Ensures orderly entry into and out of the Suspend state,
including proper handling of remote wakeups.
Transaction Translator
The Transaction Translator (TT) basically translates data from
one speed to another. A TT takes high speed split transactions
and translates them to full or low speed transactions when the
hub is operating at high speed (the upstream port is connected
to a high speed host controller) and has a full or low speed
devices attached. The operating speed of a device attached on
a downstream facing port determines whether the Routing Logic
connects a port to the Transaction Translator or Hub Repeater.
If a full or low speed device is connected to the hub operating at
high speed, the data transfer route includes the Transaction
Document #: 001-52934 Rev. *C
Enumeration
After a USB Bus Reset, CY7C65621/31 is in an unaddressed,
unconfigured state (configuration value set to ‘0’). During the
enumeration process, the host sets the hub's address and
configuration.
When the hub is configured, the full hub functionality is available.
Page 4 of 27
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CY7C65621/31
Downstream Ports
The CY7C65621/31 supports a maximum of four downstream
ports, each of which may be marked as usable or removable in
the extended configuration (0xD2 EEPROM load or 0xD4
EEPROM load, see
Configuration Options
on page 13.
Downstream D+ and D– pull down resistors are incorporated in
CY7C65621/31 for each port. Before the hubs are configured,
the ports are driven SE0 (Single Ended Zero, where both D+ and
D– are driven low) and are set to the unpowered state. When the
hub is configured, the ports are not driven, and the host may
power the ports by sending a SetPortPower command for each
port. After a port is powered, any connect or disconnect event is
detected by the hub. Any change in the port state is reported by
the hubs back to the host through the Status Change Endpoint
(endpoint 1). Upon receipt of SetPortReset request for a port with
a device connected, the hub does as follows:
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switch device. PWR [n]# output pins of the CY7C65621/31 series
are connected to the respective external power switch's port
power enable signals. Note that each port power output pin of
the external power switch must be bypassed with an electrolytic
or tantalum capacitor as required by the USB specification.
These capacitors supply the inrush currents, which occur during
downstream device hot-attach events. The polarity of this pin can
be configured through the EEPROM; see
0xD4 Load
on page 14.
Overcurrent Detection
Overcurrent detection includes 8 ms of timed filtering by default.
This parameter is configured from the external EEPROM in a
range of 0 ms to 15 ms for both enabled ports and disabled ports
individually. Detection of overcurrent on downstream ports is
managed by control pins connected to an external power switch
device.
The OVR[n]# pins of the CY7C65621/31 series are connected to
the respective external power switch's port overcurrent
indication (output) signals. After detecting an overcurrent
condition, hub reports overcurrent condition to the host and
disables the PWR# output to the external power device. The
polarity of the OVR pins can be configured through the
EEPROM; see
0xD4 Load
on page 14.
Performs a USB reset on the corresponding port
Puts the port in an enabled state
Enables the green port indicator for that port (if not previously
overridden by the host)
Enables babble detection when the port is enabled.
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Babble consists of a non idle condition on the port after EOF2. If
babble is detected on an enabled port, that port is disabled. A
ClearPortEnable request from the host also disables the
specified port.
Downstream ports can be individually suspended by the host
with the SetPortSuspend request. If the hub is not suspended, a
remote wakeup event on that port is reflected to the host through
a port change indication in the Hub Status Change Endpoint. If
the hub is suspended, a remote wakeup event on this port is
forwarded to the host. The host may resume the port by sending
a ClearPortSuspend command.
Port Indicators
The USB 2.0 port indicators are also supported directly by
CY7C65621/31. According to the specification, each
downstream port of the hub optionally supports a status
indicator. The presence of indicators for downstream facing ports
is specified by bit 7 of the wHubCharacteristics field of the hub
class descriptor. The default CY7C65621/31 descriptor specifies
that port indicators are supported (wHubCharacteristics, bit 7 is
set). If port indicators are not included in the hub, disable this bit
through EEPROM settings.
Each port indicator pin is strategically located directly on the
opposite edge of the port with which it is associated. A port
indicator provides two colors: green and amber. This is usually
implemented as two separate LEDs, one amber and the other
green. A combination of hardware and software control is used
to inform the user of the current status of the port or the device
attached to the port and to guide the user through problem
resolution. Colors and blinking provide information to the user.
The significance of the color of the LED depends on the opera-
tional mode of CY7C65621/31. The CY7C65621/31 port
indicators has two modes of operation: automatic and manual.
On power up the CY7C65621/31 defaults to automatic mode,
where the color of the Port Indicator (green, amber, off) indicates
the functional status of the CY7C65621/31 port. In automatic
mode, the CY7C65621/31 turns on the green LED whenever the
port is enabled and the amber LED when an overcurrent
condition is detected. The color of the port indicator is set by the
port state machine. Blinking of the LEDs is not supported in
automatic mode.
Table 1
identifies the mapping of color to port
state in automatic mode.
Page 5 of 27
Upstream Port
The upstream port includes the transmitter and the receiver state
machine. The transmitter and receiver operate in high speed and
full speed depending on the current hub configuration.
The transmitter state machine monitors the upstream facing port
while the Hub Repeater has connectivity in the upstream
direction. This machine prevents babble and disconnect events
on the downstream facing ports of this hub from propagating and
causing the hub to be disabled or disconnected by the hub to
which it is attached.
Power Switching
The CY7C65621/31 includes interface signals for external port
power switches. Both ganged and individual (per-port) configu-
rations are supported, with individual switching being the default.
Initially all ports are unpowered. After enumerating, the host may
power each port by sending a SetPortPower request for that port.
The power switching and over-current detection of downstream
ports is managed by control pins connected to an external power
Document #: 001-52934 Rev. *C
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