MIC50398/50399
Micrel
MIC50398/MIC50399
Six Decade Counter / Display Decoder
Not Recommended for New Designs
General Description
The MIC50398/9 is an ion-implanted, P-channel MOS
six-decade synchronous up/down-counter/display driver
with storage latches. The counter can be loaded
digit-by-digit with BCD data. The counter has an
asynchronous-clear function.
Scanning is controlled by the scan oscillator input which is
self-oscillating or can be driven by an external signal. The
contents of the counter can be transferred into the 6-digit
latch which is then multiplexed from MSD to LSD in BCD or
7-segment format to the output. These devices are intended
to interface directly with the standard CMOS logic families.
Features
•
•
•
•
•
•
•
•
Single power supply
Schmitt-Trigger on the count-input
Six decades of synchronous up/down counting
Look-ahead carry or borrow
Loadable counter
Multiplexed seven-segment outputs MIC50398N
Multiplexed BCD outputs, MIC50399N
Internal scan oscillator
Pin Connection
V SS
SET
a
b
c
SEGMENTS
d
e
f
g
1
2
3
4
5
6
7
8
9
MIC50398CN
28
27
26
25
24
UP/DOWN
CARRY
COUNT INHIBIT
COUNT INPUT
LOAD COUNTER
BCD
OUTPUT
DIGIT
STROBES
V SS
SET
NC
NC
A
B
C
D
STORE
1
2
3
4
5
6
7
8
9
MIC50399CN
28
27
26
25
24
23
UP/DOWN
ZERO
CARRY
COUNT INHIBIT
COUNT INPUT
LOAD COUNTER
23 D 6
22 D 5
21 D 4
20 D 3
19 D 2
18 D 1
17
16
15
V DD
SCAN
CLEAR
22 D 6
21 D 5
20 D 4
19 D 3
18 D 2
17 D 1
16
15
V DD
SCAN
DIGIT
STROBES
STORE 10
C D 11
COUNTER
BCD
INPUTS
C C 12
C B 13
C A 14
C D 10
COUNTER
BCD
INPUTS
C C 11
C B 12
C A 13
CLEAR 14
Ordering Information
Part Number
MIC50398CN
MIC50399CN
Temp. Range
0°C to 70°C
0°C to 70°C
Package
28-pin Plastic DIP
28-pin Plastic DIP
Segment Identification
a
f
e
d
8-10
August 1998
g
b
c
MIC50398/50399
Micrel
The carry output goes high with the leading edge of the
count input at the count of 000000 when counting up or at
999999 when counting down and goes low with the negative
going edge of the same count input. During a load counter
operation the carry output is inhibited.
A count frequency of 1.5 MHz can be achieved if the zero
output and carry output are not used. These outputs do not
respond at this frequency due to their output delay illustrated
on the timing diagram.
Operations:
Six Decade Counter, Latch
The six decade counter is synchronously incremented or
decremented on the positive edge of the count input signal.
A Schmitt trigger on this input provides hysteresis for protec-
tion against both a noisy environment and double triggering
due to a slow rising edge at the count input.
The count inhibit can be changed in coincidence with
the positive transition of the count input. Count inhibit must
remain high while the count input is high to inhibit counting.
The counter will increment when up/down input is high (V
SS
)
and will decrement when up/down input is low. The up/down
input can be changed 0.75
µs
prior to the positive transition
of the count input.
The clear input is asynchronous and will reset all decades to
zero when brought high but does not affect the six digit latch
or the scan counter.
As long as store input is low, data is continuously transferred
from the counter to the display. Data in the counter will be
latched and displayed when store input is high. Store can be
changed in coincidence with the positive transition of the
count input.
The counter is loaded digit by digit corresponding to the digit
strobe outputs. BCD thumb wheel switches with four diodes
per decade connected between the digit strobe outputs and
the BCD inputs is one method to supply BCD data for
loading the counter decades.
The load counter pulse must be at V
SS
2
µs
prior to the
positive transition of the digit strobe of the digit to be loaded.
The load counter pulse may be removed after the positive
transition of the digit strobe since the chip internally latches
this signal. The BCD data to be loaded must be valid through
the negative transition of the digit strobe.
BCD & Seven Segment Outputs
BCD or seven segment outputs are available. Digit strobes
are decoded internally by a divide by six Johnson counter.
This counter scans from MSD to LSD. By bringing the SET
input low, this counter will be forced to the MSD decade
count. During this time the segment outputs are blanked to
protect against display burn out.
BCD outputs are valid for MSD when SET is low. Applying
V
SS
to SET allows normal scan to resume. Digit 6 output is
active (V
SS
) until the next scan clock pulse brings up digit 5
output.
The segment outputs and digit strobes are blanked during
the interdigit blanking time. Typically the interdigit blanking
time is 3 to 10 microseconds when using the internal scan
oscillator.
BCD output data changes at the beginning of the interdigit
blanking time. Therefore the BCD output data is valid when
the positive transition of a digit output occurs. BCD outputs
are on MIC50399 only.
Scan Oscillator
The counters have an internal scan oscillator. The
frequency of the scan oscillator is determined by an external
capacitor between V
SS
or V
DD
and scan input. The wave
form present on the scan oscillator input is triangular in the
self oscillate mode. An external oscillator may also be used
to drive the scan input.
In the external drive mode the interdigit blanking time will be
the sum of the negative dwell period of the external oscillator
and the normal self oscillate blanking time. (3→10
µs).
Dis-
play brightness can be controlled by the duty cycle of the
external scan oscillator.
Typically, the scan oscillator will oscillate at the following
frequencies with these nominal capacitor values from V
SS
to
scan input.
C
IN
820 pF
470 pF
120 pF
Min
1.4 kHz
2.0 kHz
7.0 kHz
Max
4.8 kHz
6.8 kHz
20 kHz
Inputs, Outputs
The seven segment outputs are open drain capable of
sourcing 10mA average current per segment over one digit
cycle. Segments are on when at V
SS
. The Carry, Zero, BCD
and digit strobe outputs are push pull and are on when at
V
SS
. All inputs except Counter BCD and SCAN inputs are
high impedance CMOS compatible.
Two basic outputs originate from the counter: zero output,
and carry output. Each output goes high on the positive
(V
SS
) going edge of the count input under the following
conditions:
Zero output goes high for one count period when all
decades contain zero. During a load counter operation the
zero output is inhibited. Zero output is on the MIC50399
only.
August 1998
8-11
MIC50398/50399
Micrel
Absolute Maximum Ratings*
Voltage on Any Terminal Relative to V
SS
+0.3V to –20V
Operating Temperature Range (Ambient)
0°C to +70°C
Storage Temperature Range (Ambient) –40°C to +100°C
*
Operating
device.
above absolute maximum ratings may damage the
Maximum Operating Conditions
Symbol
T
A
V
SS
I
SS
B
V
P
D
Parameter
Operating Temperature
Supply voltage (V
DD
= 0V)
Supply Current
Break Down Voltage
(Segment only @ 10
µA)
Power Dissipation
Min
0
10
Max
70
15
40
V
SS
– 26
670
Units
°C
V
mA
V
mW
1
MIC50398 only
2
Notes
Electrical Characteristics
(V
DD
= 0V, V
SS
= +10.0V to +15.0, 0°C
≤
T
A
≤
70°C)
Static Operating Conditions
Symbol
V
IL
V
IH
V
OL
V
OH
I
OH
Parameter
Input Low Voltage, “0”
Input High Voltage, “1”
Output Voltage “0” @ 30
µA
Output Voltage “1” @ 1.5 mA
Output Current “1”
Digit strobes
Segment outputs
Scan Input Pullup Current @ 0 V
Scan Input Pulldown Current @ 15 V
SET Input Pullup Current @ 0V
2
5
0.8 V
SS
3.0
10.0
5.5
40
60
Min
V
DD
V
SS
– 1
Max
0.2 V
SS
V
SS
0.2 V
SS
Units
V
V
V
V
mA
mA
mA
µA
µA
3
4
4
5
6
Notes
I
SCAN
I
SCAN
I
SET
Note 1:
I
SS
with inputs and outputs open at 0°C. 33 mA at 25°C and 28 mA at 70°C. This does not include segment current.
Total power per segment must be limited not to exceed power dissipation of package. (θ
JA
= 100°C/Watt)
Note 2:
All outputs loaded.
Note 3:
MIN V
IH
from C
A
C
B
C
C
C
D
inputs is V
SS
– 3.5 V. Those inputs have internal pulldown resistors to V
DD
.
Note 4:
This applied to the push pull CMOS compatible outputs. Does not include digit strobes on segment outputs.
Note 5:
For V
OUT
= V
SS
– 2.0 Volts. Average value over one digit cycle.
Note 6:
For V
OUT
= V
SS
– 3.0 Volts. Average value over one digit cycle.
August 1998
8-13
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