LPC2478
Single-chip 16-bit/32-bit micro; 512 kB flash, Ethernet, CAN,
LCD, USB 2.0 device/host/OTG, external memory interface
Rev. 3.1 — 16 October 2013
Product data sheet
1. General description
NXP Semiconductors designed the LPC2478 microcontroller, powered by the
ARM7TDMI-S core, to be a highly integrated microcontroller for a wide range of
applications that require advanced communications and high quality graphic displays. The
LPC2478 microcontroller has 512 kB of on-chip high-speed flash memory. This flash
memory includes a special 128-bit wide memory interface and accelerator architecture
that enables the CPU to execute sequential instructions from flash memory at the
maximum 72 MHz system clock rate. This feature is available only on the LPC2000 ARM
microcontroller family of products. The LPC2478, with real-time debug interfaces that
include both JTAG and embedded trace, can execute both 32-bit ARM and 16-bit Thumb
instructions.
The LPC2478 microcontroller incorporates an LCD controller, a 10/100 Ethernet Media
Access Controller (MAC), a USB full-speed Device/Host/OTG Controller with 4 kB of
endpoint RAM, four UARTs, two Controller Area Network (CAN) channels, an SPI
interface, two Synchronous Serial Ports (SSP), three I
2
C interfaces, and an I
2
S interface.
Supporting this collection of serial communications interfaces are the following feature
components; an on-chip 4 MHz internal oscillator, 98 kB of total RAM consisting of 64 kB
of local SRAM, 16 kB SRAM for Ethernet, 16 kB SRAM for general purpose DMA, 2 kB of
battery powered SRAM, and an External Memory Controller (EMC). These features make
this device optimally suited for portable electronics and Point-of-Sale (POS) applications.
Complementing the many serial communication controllers, versatile clocking capabilities,
and memory features are various 32-bit timers, a 10-bit ADC, 10-bit DAC, two PWM units,
and up to 160 fast GPIO lines. The LPC2478 connects 64 of the GPIO pins to the
hardware based Vector Interrupt Controller (VIC) allowing the external inputs to generate
edge-triggered interrupts. All of these features make the LPC2478 particularly suitable for
industrial control and medical systems.
2. Features and benefits
ARM7TDMI-S processor, running at up to 72 MHz.
512 kB on-chip flash program memory with In-System Programming (ISP) and
In-Application Programming (IAP) capabilities. Flash program memory is on the ARM
local bus for high performance CPU access.
98 kB on-chip SRAM includes:
64 kB of SRAM on the ARM local bus for high performance CPU access.
16 kB SRAM for Ethernet interface. Can also be used as general purpose SRAM.
16 kB SRAM for general purpose DMA use also accessible by the USB.
2 kB SRAM data storage powered from the Real-Time Clock (RTC) power domain.
NXP Semiconductors
LPC2478
Single-chip 16-bit/32-bit microcontroller
LCD controller, supporting both Super-Twisted Nematic (STN) and Thin-Film
Transistors (TFT) displays.
Dedicated DMA controller.
Selectable display resolution (up to 1024
768 pixels).
Supports up to 24-bit true-color mode.
Dual Advanced High-performance Bus (AHB) system allows simultaneous Ethernet
DMA, USB DMA, and program execution from on-chip flash with no contention.
EMC provides support for asynchronous static memory devices such as RAM, ROM
and flash, as well as dynamic memories such as single data rate SDRAM.
Advanced Vectored Interrupt Controller (VIC), supporting up to 32 vectored interrupts.
General Purpose DMA (GPDMA) controller on AHB that can be used with the SSP,
I
2
S-bus, and SD/MMC interface as well as for memory-to-memory transfers.
Serial Interfaces:
Ethernet MAC with MII/RMII interface and associated DMA controller. These
functions reside on an independent AHB.
USB 2.0 full-speed dual port device/host/OTG controller with on-chip PHY and
associated DMA controller.
Four UARTs with fractional baud rate generation, one with modem control I/O, one
with IrDA support, all with FIFO.
CAN controller with two channels.
SPI controller.
Two SSP controllers, with FIFO and multi-protocol capabilities. One is an alternate
for the SPI port, sharing its interrupt. SSPs can be used with the GPDMA controller.
Three I
2
C-bus interfaces (one with open-drain and two with standard port pins).
I
2
S (Inter-IC Sound) interface for digital audio input or output. It can be used with
the GPDMA.
Other peripherals:
SD/MMC memory card interface.
160 General purpose I/O pins with configurable pull-up/down resistors.
10-bit ADC with input multiplexing among 8 pins.
10-bit DAC.
Four general purpose timers/counters with 8 capture inputs and 10 compare
outputs. Each timer block has an external count input.
Two PWM/timer blocks with support for three-phase motor control. Each PWM has
an external count input.
RTC with separate power domain. Clock source can be the RTC oscillator or the
APB clock.
2 kB SRAM powered from the RTC power pin, allowing data to be stored when the
rest of the chip is powered off.
WatchDog Timer (WDT). The WDT can be clocked from the internal RC oscillator,
the RTC oscillator, or the APB clock.
Single 3.3 V power supply (3.0 V to 3.6 V).
4 MHz internal RC oscillator trimmed to 1 % accuracy that can optionally be used as
the system clock.
Four reduced power modes: idle, sleep, power-down and deep power-down.
Four external interrupt inputs configurable as edge/level sensitive. All pins on port 0
and port 2 can be used as edge sensitive interrupt sources.
LPC2478
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 3.1 — 16 October 2013
2 of 93
NXP Semiconductors
LPC2478
Single-chip 16-bit/32-bit microcontroller
Processor wake-up from Power-down mode via any interrupt able to operate during
Power-down mode (includes external interrupts, RTC interrupt, USB activity, Ethernet
wake-up interrupt, CAN bus activity, port 0/2 pin interrupt).
Two independent power domains allow fine tuning of power consumption based on
needed features.
Each peripheral has its own clock divider for further power saving. These dividers help
reduce active power by 20 % to 30 %.
Brownout detect with separate thresholds for interrupt and forced reset.
On-chip power-on reset.
On-chip crystal oscillator with an operating range of 1 MHz to 25 MHz.
On-chip PLL allows CPU operation up to the maximum CPU rate without the need for
a high frequency crystal. May be run from the main oscillator, the internal RC oscillator,
or the RTC oscillator.
Boundary scan for simplified board testing.
Versatile pin function selections allow more possibilities for using on-chip peripheral
functions.
Standard ARM test/debug interface for compatibility with existing tools.
Emulation trace module supports real-time trace.
3. Applications
Industrial control
Medical systems
Portable electronics
Point-of-Sale (POS) equipment
4. Ordering information
Table 1.
Ordering information
Package
Name
LPC2478FBD208 LQFP208
Description
plastic low profile quad flat package; 208 leads; body 28
28
1.4 mm
Version
SOT459-1
SOT950-1
Type number
LPC2478FET208 TFBGA208 plastic thin fine-pitch ball grid array package; 208 balls; body 15
15
0.7 mm
LPC2478
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 3.1 — 16 October 2013
3 of 93
NXP Semiconductors
LPC2478
Single-chip 16-bit/32-bit microcontroller
4.1 Ordering options
Table 2.
Ordering options
Flash
(kB)
Local bus
SRAM (kB)
Ethernet buffer
External Ethernet USB
bus
OTG/
OHC/
device
+ 4 kB
FIFO
SD/
GP
MMC DMA
CAN channels
ADC channels
yes
yes
yes
yes
8
8
DAC channels
1
1
40 C
to +85
C
40 C
to +85
C
© NXP B.V. 2013. All rights reserved.
Type number
Temp range
GP/USB
LPC2478FBD208 512
LPC2478FET208
512
64 16 16 2
64 16 16 2
98 Full
32-bit
98 Full
32-bit
Total
RTC
MII/RMII
MII/RMII
yes
yes
2
2
LPC2478
All information provided in this document is subject to legal disclaimers.
Product data sheet
Rev. 3.1 — 16 October 2013
4 of 93
NXP Semiconductors
LPC2478
Single-chip 16-bit/32-bit microcontroller
5. Block diagram
XTAL1
V
DD(3V3)
XTAL2
V
DDA
TMS TDI
trace signals
TRST
TCK TDO
EXTIN0 DBGEN
RESET
VREF
V
SSA
, V
SSIO,
V
SSCORE
V
DD(DCDC)(3V3)
TEST/DEBUG
INTERFACE
EMULATION
TRACE MODULE
P0, P1, P2,
P3, P4
LPC2478
64 kB
SRAM
512 kB
FLASH
PLL
system
clock
SYSTEM
FUNCTIONS
INTERNAL RC
OSCILLATOR
HIGH-SPEED
GPIO
160 PINS
TOTAL
INTERNAL
CONTROLLERS
SRAM FLASH
ARM7TDMI-S
VIC
16 kB
SRAM
EXTERNAL
MEMORY
CONTROLLER
AHB1
D[31:0]
A[23:0]
control lines
AHB2
AHB
BRIDGE
AHB
BRIDGE
USB DEVICE/
HOST/OTG WITH
4 kB RAM AND DMA
GP DMA
CONTROLLER
LCD INTERFACE
WITH DMA
8
×
LCD control
LCDVD[23:0]
LCDCLKIN
V
BUS
port1
port2
MII/RMII
ETHERNET
MAC WITH
DMA
16 kB
SRAM
MASTER AHB TO SLAVE
PORT AHB BRIDGE PORT
AHB TO
APB BRIDGE
EINT3 to EINT0
P0, P2
2
×
CAP0/CAP1/
CAP2/CAP3
4
×
MAT2/MAT3,
2
×
MAT0,
3
×
MAT1
6
×
PWM0/PWM1
1
×
PCAP0,
2
×
PCAP1
P0, P1
EXTERNAL INTERRUPTS
CAPTURE/COMPARE
TIMER0/TIMER1/
TIMER2/TIMER3
I
2
S INTERFACE
PWM0, PWM1
SSP0/SPI INTERFACE
LEGACY GPI/O
64 PINS TOTAL
SSP1 INTERFACE
3
×
I2SRX
3
×
I2STX
SCK0, SCK
MOSI0, MOSI
MISO0, MISO
SSEL0, SSEL
SCK1
MOSI1
MISO1
SSEL1
MCICLK, MCIPWR
MCICMD,
MCIDAT[3:0]
TXD0, TXD2, TXD3
RXD0, RXD2, RXD3
TXD1, DTR1, RTS1
RXD1, DSR1, CTS1,
DCD1, RI1
RD1, RD2
TD1, TD2
SCL0, SCL1, SCL2
SDA0, SDA1, SDA2
8
×
AD0
A/D CONVERTER
SD/MMC CARD
INTERFACE
AOUT
VBAT
power domain 2
RTCX1
RTCX2
ALARM
D/A CONVERTER
2 kB BATTERY RAM
UART0, UART2, UART3
RTC
OSCILLATOR
REAL-
TIME
CLOCK
UART1
CAN1, CAN2
WATCHDOG TIMER
SYSTEM CONTROL
I
2
C0, I
2
C1, I
2
C2
002aac805
Fig 1.
LPC2478 block diagram
LPC2478
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 3.1 — 16 October 2013
5 of 93
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