CD4093B Typ
s
COS/MOS
Quad 2-lnput NAND
Schmitt Triggers
High-Voltage Types (20 Volt Rating)
The RCA-CD4093B conSists of four Schmitt·
trigger CirCUits. Each Circuit functions as a
two· Input NAND gate with Schmltt·trlgger
action on both inputs. The gate switches at
different POints for positive· and negative-
gOing slgna)s. The difference between the
positive voltage (Vp) and the negative volt·
age (VN)
IS
defined as hysteresis voltage (VH)
(see Fig. 2).
The CD40938 types are supplied in 14-lead
hermetic dual-in-line ceramic packages (0
and F suffixes). 14-lead dual-in-line plastiC
package (E suffix). 14-lead ceramic flat
package (K suffix). and In chip form (H
suffiX).
Features:
• Schmitt-trigger action on each input with no
external components
• Hysteresis voltage typically 0.9 V at
VDD
=
5 V and 2.3 V at VDD
=
10 V
• Noise immunity greater than 50%
• No limit on input rise and fall times
• Standardized, symmetrical output characteristics
• 100% tested for quiescent current at 20 V
• Maximum input current of 1 p.A at 18 V
over full package-temperature range,
100 nA at 18 V and 25°C
• 5-V, 10-V, and 15-V parametric ratings
• Meets all requirements of JEDEC Tentative
Standard No. 13A, "Standard Specifications
for Description of 'B' Series CMOS Devices"
FUNCTIONAL DIAGRAM
Applications:
•
•
•
•
•
Wave and pulse shapers
High-noise-environment systems
Monostable multivibrators
Astable multivibrators
NAND logic
RECOMMENDED OPERATING CONDITIONS
For maximum reliability, nominal operating
conditions should be selected so that operation
is always within the following ranges.
CHARACTERISTIC
Supply·Voltage Range
(T A
=
Full Package·
Temp. Range)
MIN. MAX. UNITS
3
18
V
MAXIMUM RATINGS,
Absolute-Maximum Values:
DC SUPPLY-VOLTAGE RANGE. (V DD )
-0.5 to +20 V
(Voltages referenced to VSS Terminal)
-0.5 to VDD +0.5 V
INPUT VOLTAGE RANGE. ALL INPUTS
±10mA
DC INPUT CURRENT. ANY ONE INPUT
POWER DISSIPATION PER PACKAGE (PO)'
.
. . . ..
500 mW
For T A
=
-40 to +60 o C (PACKAGE TYPE E)
Derate Linearly at 12 mW/oC to 200 mW
For T A +60 to +85
0
C (PACKAGE TYPE E)
.
.
....
.,
SOOmW
For TA
=
-55 to +100o C (PACKAGE TYPES D.F)
Derate Linearly at 12
mW/oC
to 200 mW
For TA +100 to +125
0
C (PACKAGE TYPES D. F)
DEVICE DISSIPATION PER OUTPUT TRANSISTOR
100mW
FOR T A
=
FULL PACKAGE·TEMPERATURE RANGE (All Package Types)
OPERATING-TEMPERATURE RANGE (TA)
-55 to +125
0
C
PACKAGE TYPES D. F. H
-40 to +8SoC
PACKAGE TYPE E .
-65 to +lS0oC
STORAGE TEMPERATURE RANGE (T stg )'
LEAD TEMPERATURE (DURING SOLDERING)'
At distance
1/16
±
1/32
Inch (1.59 ± 0 79 mm) from case for lOs max
C
C
115.8.'21~..,
31410111
216.9.131
*
1-1...
'
•
*
ALL INPUTS PIIOTECTED BY COSlI/05
PROTECTION NETWORK
Fig.
1 -
LogiC diagram-I of
4
Schmitt triggers.
. m. . . ..
LP:.,
VN
Vp
DRIVER
LOAD
cJ Test setup
OUTPUT
CHARACTERISTIC
INPUT
CHARAnERISTIC
bJ Transfer characteflst,c
of
I
of
4
gates
VOH~
T
L~uG~;~;:/
REGION
FZ~~~~2ZI----VDD----------'~~rn
-------
LOGit.O.- -
-
VN -
---
~~~~~~
I
aJ Definition of V
p.
V
N-
V H
Fig.
2 -
HysteresIs definition, characteflstlc, and test setup.
92C5·23883"3
Fig
3 -
Input and output characteristics
266 __________________________________
~
______________________________
CD4093B Typ
s
STATIC ELFCTRICAL CHARACTERISTICS
LIMITS AT INDICi'TED TEMPERATURES (oCI
CtiARACTE R-
ISllC
CONDITIONS
Values at -55, +25, H 2!; Apply to D, F, H Packages
Values at -40, +25,
+8~,
Apply to E Packages
+85
1
2
4
20
2.2
4.6
68
26
56
6.3
36
7.1
10.8
4
82
127
09
25
4
1.4
34
48
2.8
5.2
7.4
3.2
6.6
9.6
0.3
1.2
16
0.3
1.2
1.6
1.6
3.4
5
1.6
3.4
5
30
60
120
600
22
4.6
68
26
5.6
63
3.6
71
108
4
82
127
09
25
4
14
3.4
48
28
5.2
7.4
32
6.6
9.6
0.3
12
16
0.3
12
1.6
1.6
3.4
5
1.6
3.4
5
+125
30
60
120
600
2.2
46
6.8
26
56
63
36
71
108
4
8.2
127
0.9
2.5
4
14
34
48
2.8
5.2
74
3.2
66
9.6
03
12
1.6
03
12
1.6
1.6
34
5
1.6
3.4
5
MIN.
"25
TYP.
0.02
0.02
002
0.04
22
46
68
26
56
63
2.9
5.9
88
3.3
7
94
2.9
59
88
33
7
9.4
09
25
4
14
34
48
19
39
5.8
23
5.1
7.3
19
3.9
5.8
2.3
51
7.3
03
12
16
03
12
16
0.9
23
3.5
09
23
3.5
0.9
2.3
3.5
0.9
2.3
3.5
MAX.
1
2
4
20
tl(SUIl'
UNITS
Vo VIN VDD
(VI (VI (VI -55 -40
Quiescent 0
t!Vlce
Current.
Ie
0
Max
POSitiVI) Tng ger
Threshold \foltage
Vp MIO
-
-
-
-
-
-
-
-
-
0,5
0.10
0,15
0,20
a
a
a
b
b
b
5
10
15
20
5
10
15
5
10
15
5
10
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
1
2
4
20
2.2
4.6
68
2.6
5.6
6.3
3.6
71
4
8.2
127
0.9
25
4
1.4
34
4.8
2.8
5.2
74
3.2
6.6
9.6
03
1.2
1.6
03
1.2
1.6
16
3.4
5
1.6
34
5
-
-
-
-
IJA
-
-
-
Fig
4 -
Typical current and voltage
transfer characterrstlcs.
-
-
V
-
Vp
Max.
-
3.6
71
10.8
4
8.2
127
INPUT VOLTAGE fV
I-V
Negative Tn gger
Threshold Voltage
VN
MIO
HysteresIs
V
oltage
VH Min.
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
a
a
a
b
b
b
-
-
15 10.8
-
V
-
-
-
J
.
a
a
a
b
b
b
-
-
-
-
-
-
28
52
74
3.2
6.6
9.6
Fig.
5 -
Typical voltage transfer characterrstics
as
8
function of temperature.
V
a
a
a
b
b
b
-
-
-
V
-
-
-
~
oRAIH-To·SOURCE VOLTACE 1VoSI-V
a
a
a
b
b
-
-
-
Fig.
6 -
Typical output low (sink) current characterrst,cs.
V
b
-
-
-
1.6
3.4
5
1.6
3.4
5
DRAIN-TO-SOURCE WLTACE
a
a
a
b
b
b
-
-
-
-
-
-
V
(VOS,-V
• Input on termInals 1.5.8.12 Or 2.6.9.13. other Inpuls to V
DO'
bi npul on termInals 1 and 2. 5 and 6.8 and 9. or 12 and 13. other InpulS to
Voo
FIg. 1
-
Minimum output low (Sink) current
characterrst,cs.
__________________________________________ 267
CD40938 Types
STATIC ELECTRICAL CHARACTERISTICS (CONrD)
LIMITS AT INDICATED TEMPERATURE (oC)
CHARACTER-
ISTIC
CONDITIONS
Vo
(V)
Output Low (Sink)
Current.
'OL Min
Output High
(Source)
Current.
IOH Min
Output Voltage
Low·Level,
VOL Max
Output Voltage
High Level.
VOH Min
Input Current.
liN Max
Values at
-55, +25, +125
Apply to 0, F, H Packages
Values at
-40, +25, +85
Apply to E Packages
UNITS
MAX.
DAAIN- TO-SOURCE VOLTAGE (YOs,-V
a
MfE,~~ ~,,,::,: I',~
il
il
~U
11111
VIN VDD
(V) (V)
-55
+25
-40
061
15
4
-061
-18
-15
-4
. +85
042
11
28
-042
-13
-11
-28
005
005
005
495
995
1495
+125
036
09
24
-036
-115
-09
-24
MIN.
~
TYP.
04
0.5
5
10
15
064
16
42
051
13
34
-051
-16
-13
-34
1
26
68
-1
-32
-26
-68
-
05 0.10
15 0.15
46 0.5
25 0.5
95 0.10
135 0.15
-
5 -064
5
10
15
5
10
15
5
10
15
18
±O 1
-2
-16
-42
-
-
-
rnA
-
-
FIg.
8 -
TypIcal output hIgh (source) current
characteristIcs.
-
-
0.5
0.10
0.15
0.5
-
-
0 0.05
0 005
0
5
10
0.05
V
DRAIN-YO-SOURCE IIO\.lAGE IIIDSI-ll
-
-
-
-
-
495
995
1495
±1
±1
-
0.10
0.15
0.18
-
-
-
jJ.A
,±O 1
±10- 5 ±O 1
DYNAMIC ELECTRICAL CHARACTERISTICS
At TA
=
2S'C,
Input t r , tf= 20ns, CL
=
50pF,
RL
=
200kD..
LIMITS
UNITS
V DD
VOLTS
TYP.
MAX.
FIg.
9 -
Mimmum output high (source) current
charactertstics.
TEST CONDITIONS
CHARACTERISTIC
Propagation Delay Time
tpHL'
tpLH
Transition Time. tTHL·
tTLH
Input Capac'tance. CIN
5
10
15
5
10
15
Any Input
190
90
65
100
50
40
5
380
180
130
200
100
80
75
ns
ns
pF
FIg.
10 -
TYPIcal propagation delay time
vs. supply voltage.
AMBIENT TEMPERATUR£ (TA'-2'-C
INPUT ON TERMINALS I,
~.B.
12 OR 2. 6,9, ., •
OTHER INPUTS TIED TO Yoo
SUPPLY VOLTAGE (Voo)-V
FIg.
11 -
TypIcal transItIon tIme vs. load
capacItance.
FIg.
12 -
TYPIcal trtgger threshold voltage vs. V DO'
Fig.
13 -
TYPIcal per cent hysteresis vs.
supply voltage.
268
CD4093B Typ
s
4
~
}
,01,·!;::::;;;;:T.~=+=--i6.L~4--~
;
~
i
'OJ
'I--~-=~~~
--~----~--~
APPLICATIONS
TO COIIITROL
SIGNAL
OR VOD
VDD-T'\-r-
a
.,
~~~~--~~
i'i
i
10&
= t - + I .
10-'
100
vss..L-
~
__
~
114 CD4093B
..J
LJ
Lvss
92C5·
2)88~
n n-
VDD
Z
..
I I
.2
4 II
Z
lOJ
10Z
FREQUENCY
It
)-'H.
4.8
Z
10 3
4 ,.
10"
~1+~7i~~TTH-~hH~2~.~~-t.~
4
f03
.0
10'
-"SE ANO '.LL TIME CI"lf
I-M
10'
FREQUENCY RANGE OF WAVE SHAPE
IS FROM DC TO I MHI
FIg.
'4 -
Typical power diSSipation VS.
frequency characteristics.
F/!~
15 -
Typical power diSSipation VS. rise and
fall times.
Fig.
'6 -
Wave shapero
T(' CONTROL SIGNAL
OR VDD
---l
I'~
n-
VDO I-'A-j
INPUTS
vssnJ
VDD
Lvss
'M - R C
.t.
(v~~vp)
IAORC1"(~)(~)]
~DknSR5IMn
o
vss
100 pF S C S II'F
FOR THE RANGE OF RAND C GIllEN
21£'
< fA <04,
$Okn sRSIMn
100
pF S C S II' F
FOR THE RANGE OF RAND C
GIVEN $1'"
<
'M
<
II
DO
Fig.
'8 -
Astable mulrlvlbrator.
Fig
17 -
Monostable multlvlbrator
Fig.
19 -
QUiescent deVice current test
circuIt.
\I~~PU(J' ::::~M"~
'00
14
VDD
o
~
\Iss
SEQUENTIALLY.
TO BOTH VDD AND Vss
CONNECT ALL UNUSED
INPUTS TO EITHER
VDD OR VSS
\ISS
ITOP VIEW)
13
12
II
M.G7H
Lon
10
9
Fig.
~O
-
Input current test circuIt.
TERMINAL ASSIGNMENT
DimenSions in parentheses are In millimeters and are
derived from the baSIC Inch dimenSions as indicated.
Grid graduations are In mtls (10- 3 inch).
The photographs and dimenSions of each
COS/MOS chip represent a chip when
It
IS part of the wafer When the wafer IS
cu~
mto ChiPS, thg cleavage angles are
57 mstead of 90 with respect to the
face of the chip Therefore, the Isolated
chip IS actually
7
mds (0
17
mm) larger
m both dimenSions
Dimensions and Pad Layout 'fol' CD4093BH
___________________________________________ 269
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