Product Specification
IXD5126
Ultra Small, Precision Voltage Detector
FEATURES
Accuracy ± 0.8%
Low Power Consumption at 0.6 μA typical
at V
DF
= 1.8 V, V
IN
= 1.62 V
Detect Voltage Range 1.5 V – 5.5 V in 0.1 V
increments
Operating Voltage Range 0.7 V – 6.0 V
0
Detect Voltage Temperature Drift ±50 ppm/ C
Output Configuration CMOS (Version C) or N-
channel Open Drain (N Version)
Detect Logic - Active Low Reset
0
Operating Ambient Temperature - 40 + 85 C
Packages : USPN-4B02 and SSOT-24
EU RoHS Compliant, Pb Free
DESCRIPTION
The IXD5126 are highly precise in a wide
temperature range, low power consumption, CMOS
voltage detectors, manufactured using laser trimming
technology.
With low power consumption and high accuracy, this
series is suitable for precision mobile equipment.
The IXD5126 in ultra small packages are ideally
suited for high-density PC boards.
The IXD5126 is available in both CMOS and N-
channel open drain output configurations.
This detector is available in USPN-4B02 and SSOT-
24 packages.
APPLICATIONS
Microprocessor reset circuitry
Memory battery back-up circuits
Power-on reset circuits
Power failure detection
System battery life and charge voltage monitors
TYPICAL APPLICATION CIRCUIT
TYPICAL PERFORMANCE CHARACTERISTIC
Detect Voltage vs. Ambient Temperature
IXD5126x27Ax
Pull-up Resistor R
PL
used with N-channel output configuaration only
PS037501-0615
PRELIMINARY
1
Product Specification
IXD5126
ABSOLUTE MAXIMUM RATINGS
PARAMETER
Input Voltage
Output Current
Output
Voltage
CMOS Output
N-channel Open Drain
USPN-3B02
SSOT-24
SYMBOL
V
IN
I
OUT
V
OUT
P
D
T
OPR
T
STG
RATINGS
– 0.3 ~ +6.5
20
– 0.3 ~ V
IN
+ 0.3 ≤ 6.5
– 0.3 ~ +6.5
100
150
– 40 ~ + 85
– 55 ~ +125
UNITS
V
mA
V
V
mW
0
0
Power Dissipation
2)
Operating Temperature Range
Storage Temperature Range
All voltages are in respect to V
SS
C
C
ELECTRICAL OPERATING CHARACTERISTICS
Ta = 25
0
C
PARAMETER
Operating Voltage
Detect Voltage
Hysteresis Width
Supply Current1
SYMBOL
V
IN
V
DF
V
HYS
I
SS1
CONDITIONS
V
DF(T)
= 1.0 – 5.0 V
V
DF(T)
= 1.0 – 5.0 V
V
DF(T)
= 1.0 – 5.0 V
V
DF(T)
= 1.5 –1.8 V
V
IN
= V
DF(T)
x 0.9
V
DF(T)
= 1.9 – 3.0 V
V
DF(T)
= 3.1 – 5.5 V
V
DF(T)
= 1.5 –1.8 V
4)
V
IN
= V
DF(T)
x 1.1
V
DF(T)
= 1.9 – 3.0 V
V
DF(T)
= 3.1 – 5.5 V
V
IN
= 0.7 V
V
IN
= 1.0 V, 1.0 V ≤ V
DF(T)
≤ 2 V
V
IN
= 2.0 V, 2.0 V < V
DF(T)
≤ 3 V
V
OUT
= 0.5 V
V
IN
= 3.0 V, 3.0 V < V
DF(T)
≤ 4 V
V
IN
= 4.0 V, 4.0 V < V
DF(T)
≤ 5 V
V
IN
= 5.0 V, 2.0 V < V
DF(T)
≤ 5.5 V
V
IN
= 6.0 V, V
OUT
= 5.5 V
Version C
V
IN
= V
DF(T)
x 0.9, V
OUT
= 0 V
Version N
V
IN
= 6.0 V, V
OUT
= 6.0 V
- 40
0
C ≤ T
OPR
≤ 85
0
C
t
DF
t
DR
V
IN
= V
DFL
x 1.1
V
DFL
x 0.9
V
IN
= V
DFL
x 0.9
V
DFL
x 1.1
1)
2)
MIN.
0.7
V
DF
x
0.02
TYP.
E-1
V
DF
x
0.05
0.6
0.7
0.9
0.7
0.8
1.0
0.2
1.5
7.0
10.0
11.5
13.0
-4.6
-0.01
0.01
± 50
30
20
3)
MAX.
6.0
V
DF
x
0.08
1.3
1.5
1.85
1.55
1.75
2.25
UNIT
V
V
V
µA
CIRCUIT
Supply Current2
I
SS2
µA
Output Current
I
OUTN
0.008
0.6
4.5
7.0
8.5
9.5
mA
I
OUTP5)
Leakage Current
Detect Voltage
Temperature
Characteristics
Detect Delay Time
5)
Release Delay Time
6)
NOTE:
1)
2)
3)
4)
5)
6)
7)
I
LEAK
-2.8
µA
ppm/
0
C
100
50
µs
µs
V
DF(T
) is a nominal detect voltage
For the N-channel Open Drain pull-up resistor R
PL
= 1 MΩ, pull-up voltage V
PULL-UP
= V
IN
Please refer to the table named
Detect Voltage
below
V
IN
= 6.0 V, if V
DF(T)
= 5.5 V
IXD5126C version only
Delay time from the moment, when V
IN
= V
DFL
to the moment, when V
OUT
= VDFL x 0.45 at V
IN
falling.
Delay time from the moment, when V
IN
= V
DRL
+ V
HYS
to the moment, when V
OUT
= V
DRL
x 0.55 at V
IN
rising.
PS037501-0615
PRELIMINARY
2
Product Specification
IXD5126
ELECTRICAL OPERATING CHARACTERISTICS (CONTINUED)
Detect Voltage
NOMINAL
DETECT
VOLTAGE
(V)
V
DF(T)
1.50
1.60
1.70
1.80
1.90
2.00
2.10
2.20
2.30
2.40
2.50
2.60
2.70
2.80
2.90
3.00
3.10
3.20
3.30
3.40
3.50
DETECT VOLTAGE
(V)
E-1
V
DFL
MIN.
1.4880
1.5872
1.6864
1.7856
1.8848
1.9840
2.0832
2.1824
2.2816
2.3808
2.4800
2.5792
2.6784
2.7776
2.8768
2.9760
3.0752
3.1744
3.2736
3.3728
3.4720
MAX.
1.5120
1.6128
1.7136
1.8144
1.9152
2.0160
2.1168
2.2176
2.3184
2.4192
2.5200
2.6208
2.7216
2.8224
2.9232
3.0240
3.1248
3.2256
3.3264
3.4272
3.5280
NOMINAL
DETECT
VOLTAGE
(V)
V
DF(T)
3.60
3.70
3.80
3.90
4.00
4.10
4.20
4.30
4.40
4.50
4.60
4.70
4.80
4.90
5.00
5.10
5.20
5.30
5.40
5.50
DETECT VOLTAGE
(V)
E-1
V
DFL
MIN.
3.5712
3.6704
3.7696
3.8688
3.9680
4.0672
4.1664
4.2656
4.3648
4.4640
4.5632
4.6624
4.7616
4.8608
4.9600
5.0592
5.1584
5.2576
5.3568
5.4560
MAX.
3.6288
3.7296
3.8304
3.9312
4.0320
4.1328
4.2336
4.3344
4.4352
4.5360
4.6368
4.7376
4.8384
4.9392
5.0400
5.1408
5.2416
5.3424
5.4432
5.5440
PIN CONFIGURATION
USPN-4B02
(BOTTOM VIEW)
SSOT-24
(TOP VIEW)
PIN ASSIGNMENT
PIN NUMBER
USPN-4B02 SSOT-24
4
1
3
2
1
3
2
4
PIN NAME
V
IN
V
OUT
NC
V
SS
FUNCTIONS
Power Input
Output Voltage (Detect “LOW”)
No Connection
Ground
PS037501-0615
PRELIMINARY
3
Product Specification
IXD5126
BLOCK DIAGRAMS
IXD5126C
IXD5126N
Diodes inside the circuits are ESD protection diodes and parasitic diodes.
BASIC OPERATION
Operation of the IXD5126 in a typical application circuit is exlained by the timing diagram shown below.
Note: To simplfy explanation, an operation time of the circuit is not included.
In the initial state, an input voltage V
IN
is higher than the detect voltage V
DFL
and the output voltage V
OUT
is equal
to the input voltage. The N-channel open drain output version has at this condition the V
OUT
pin in a high impedance
state, and V
OUT
is equal to the pull-up voltage.
When the input voltage V
IN
drops below the detect voltage V
DFL
, the output voltage V
OUT
becomes equal to the
ground voltage V
SS
(Detection state).
If the input voltage V
IN
drops below the minimum operating voltage of 0.7 V, the output becomes unstable.
Output voltage may become equal V
IN
voltage or pull-up voltage in case of the N-channel open drain version.
The output voltage V
OUT
remains at the ground level, when V
IN
rises above minimum operating voltage of 0.7 V.
When the input voltage V
IN
rises higher than the release voltage V
DR
, the output voltage V
OUT
becomes equal to
the input voltage V
IN
(pull-up voltage in the N-channel open drain configuration).
PS037501-0615
PRELIMINARY
4
Product Specification
IXD5126
TYPICAL
APPLICATION
CIRCUIT
IXD5126C
IXD5126N
LAYOUT AND USE CONSIDERATIONS
1. The IC may malfunction if absolute maximum ratings are exceeded.
2. To stabilize the IC's operations, ensure that V
IN
rise and fall times are more than several μs/V.
3. IXD5126N version with N-channel open drain configuration is recommended, when a resistive divider is
used to set V
IN
voltage (see figure below). Voltage drop at resistor R
IN
caused by supply and load currents,
changes level of detect and release voltages. Those errors are not constant because of the fluctuation of
currents. In addition, oscillation may occur if voltage drop caused by load or transient current exceeds
hysteresis V
HYS
= V
DR
- V
DF
. In such cases, please ensure that R
IN
is less than 33 kΩ and that C is more
than 0.1 μF.
4.
V
OUT
voltage In N channel open drain configuration depends on pull-up resistance, as well as on/off resistance of the N-
channel MOSFET (see block diagrams above).
During detection, V
OUT
= V
PULL
/ (1 + R
PULL
/ R
ON
), where V
PULL
is a pull up voltage and R
ON
is a M3 on-resistance,
which can be calculated as V
DS
/ I
OUT1
from electrical characteristics.
For example:
-3
To get V
OUT
≤ 0.1V at detect state, with R
ON
= 0.5/4.5×10 = 111 Ω (max) at V
IN
= 2.0 V and V
PULL
= 3.0 V, pull-up
resistor value should be
R
PULL
= (V
PULL
/V
OUT
- 1) × R
ON
= (3 / 0.1-1) × 111 ≥ 3.2 kΩ .
Note that decreasing V
IN
voltage increases R
ON
resistance, so minimum expected V
IN
voltage should be used for
calculations.
At releasing state V
OUT
= V
PULL
/(1 + R
PULL
/ R
OFF
), where R
OFF
= V
OUT
/I
LEAK
= 40 MΩ (min) for N-channel MOSFET in off
state.
Therefore, in this case, pull-up resistor should be
6
R
PULL
= (V
PULL
/V
OUT
-1) × R
OFF
= (3/2.99 - 1) × 40 × 10 ≤ 133 kΩ
to get V
OUT
≥ 2.99 V at V
PULL
= 3.0 V.
PS037501-0615
PRELIMINARY
5
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