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RD48F2P0ZT00

产品描述8M X 16 FLASH 1.8V PROM, 85 ns, PDSO56
产品类别存储   
文件大小1MB,共102页
制造商Intel(英特尔)
官网地址http://www.intel.com/
下载文档 详细参数 全文预览

RD48F2P0ZT00概述

8M X 16 FLASH 1.8V PROM, 85 ns, PDSO56

RD48F2P0ZT00规格参数

参数名称属性值
功能数量1
端子数量56
最小工作温度-40 Cel
最大工作温度85 Cel
额定供电电压1.8 V
最小供电/工作电压1.7 V
最大供电/工作电压2 V
加工封装描述14 X 20 MM, LEAD FREE, TSOP-56
each_compliYes
欧盟RoHS规范Yes
状态Transferred
ypeNOR TYPE
sub_categoryFlash Memories
ccess_time_max85 ns
boot_blockBOTTOM
command_user_interfaceYES
common_flash_interfaceYES
data_pollingNO
jesd_30_codeR-PDSO-G56
jesd_609_codee3
存储密度1.34E8 bi
内存IC类型FLASH
moisture_sensitivity_levelNOT SPECIFIED
umber_of_sectors_size4,127
位数8.39E6 words
位数8M
操作模式ASYNCHRONOUS
组织8MX16
包装材料PLASTIC/EPOXY
ckage_codeTSSOP
ckage_equivalence_codeTSSOP56,.8,20
包装形状RECTANGULAR
包装尺寸SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
ge_size__words_4
串行并行PARALLEL
eak_reflow_temperature__cel_260
wer_supplies__v_1.8,1.8/3.3
gramming_voltage__v_1.8
qualification_statusCOMMERCIAL
seated_height_max1.2 mm
sector_size__words_16K,64K
standby_current_max5.00E-6 Am
最大供电电压0.0510 Am
表面贴装YES
工艺CMOS
温度等级INDUSTRIAL
端子涂层MATTE TIN
端子形式GULL WING
端子间距0.5000 mm
端子位置DUAL
ime_peak_reflow_temperature_max__s_40
ggle_biNO
length18.4 mm
width14 mm
dditional_featureSYNCHRONOUS BURST MODE OPERATION ALSO POSSIBLE

文档预览

下载PDF文档
Intel StrataFlash
®
Embedded Memory
(P30)
1-Gbit P30 Family
Datasheet
Product Features
Security
— 85/88 ns initial access
— One-Time Programmable Registers:
• 64 unique factory device identifier bits
— 40 MHz with zero wait states, 20 ns clock-to-
• 64 user-programmable OTP bits
data output synchronous-burst read mode
• Additional 2048 user-programmable OTP bits
— 25 ns asynchronous-page read mode
— Selectable OTP Space in Main Array:
— 4-, 8-, 16-, and continuous-word burst mode
• 4x32KB parameter blocks + 3x128KB main
— Buffered Enhanced Factory Programming
blocks (top or bottom configuration)
(BEFP) at 5 µs/byte (Typ)
— Absolute write protection: V
PP
= V
SS
— 1.8 V buffered programming at 7 µs/byte (Typ)
— Power-transition erase/program lockout
Architecture
— Individual zero-latency block locking
— Multi-Level Cell Technology: Highest Density
— Individual block lock-down
at Lowest Cost
Software
— Asymmetrically-blocked architecture
— 20 µs (Typ) program suspend
— Four 32-KByte parameter blocks: top or
— 20 µs (Typ) erase suspend
bottom configuration
— Intel
®
Flash Data Integrator optimized
— 128-KByte main blocks
— Basic Command Set and Extended Command
Voltage and Power
Set compatible
— V
CC
(core) voltage: 1.7 V – 2.0 V
— Common Flash Interface capable
— V
CCQ
(I/O) voltage: 1.7 V – 3.6 V
Density and Packaging
— Standby current: 55 µA (Typ) for 256-Mbit
— 64/128/256-Mbit densities in 56-Lead TSOP
— 4-Word synchronous read current:
package
13 mA (Typ) at 40 MHz
— 64/128/256/512-Mbit densities in 64-Ball
Quality and Reliability
Intel
®
Easy BGA package
— Operating temperature: –40 °C to +85 °C
• 1-Gbit in SCSP is –30 °C to +85 °C
— 64/128/256/512-Mbit and 1-Gbit densities in
Intel
®
QUAD+ SCSP
— Minimum 100,000 erase cycles per block
— 16-bit wide data bus
— ETOX™ VIII process technology (130 nm)
High performance
The Intel StrataFlash
®
Embedded Memory (P30) product is the latest generation of Intel
StrataFlash
®
memory devices. Offered in 64-Mbit up through 1-Gbit densities, the P30 device
brings reliable, two-bit-per-cell storage technology to the embedded flash market segment.
Benefits include more density in less space, high-speed interface, lowest cost-per-bit NOR
device, and support for code and data storage. Features include high-performance synchronous-
burst read mode, fast asynchronous access times, low power, flexible security options, and three
industry standard package choices.
The P30 product family is manufactured using Intel
®
130 nm ETOX™ VIII process technology.
Order Number: 306666, Revision: 001
April 2005

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