74LV04
Hex inverter
Rev. 03 — 4 December 2007
Product data sheet
1. General description
The 74LV04 is a low-voltage Si-gate CMOS device that is pin and function compatible with
74HC04 and 74HCT04.
The 74LV04 provides six inverting buffers.
2. Features
s
s
s
s
s
Wide operating voltage: 1.0 V to 5.5 V
Optimized for low voltage applications: 1.0 V to 3.6 V
Accepts TTL input levels between V
CC
= 2.7 V and V
CC
= 3.6 V
Typical output ground bounce < 0.8 V at V
CC
= 3.3 V and T
amb
= 25
°C
Typical HIGH-level output voltage (V
OH
) undershoot: > 2 V at V
CC
= 3.3 V and
T
amb
= 25
°C
s
ESD protection:
x
HBM JESD22-A114E exceeds 2000 V
x
MM JESD22-A115-A exceeds 200 V
s
Multiple package options
s
Specified from
−40 °C
to +85
°C
and from
−40 °C
to +125
°C
3. Ordering information
Table 1.
Ordering information
Package
Temperature range
74LV04N
74LV04D
74LV04DB
74LV04PW
74LV04BQ
−40 °C
to +125
°C
−40 °C
to +125
°C
−40 °C
to +125
°C
−40 °C
to +125
°C
−40 °C
to +125
°C
Name
DIP14
SO14
SSOP14
TSSOP14
Description
plastic dual in-line package; 14 leads (300 mil)
plastic small outline package; 14 leads;
body width 3.9 mm
plastic shrink small outline package; 14 leads;
body width 5.3 mm
plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
Version
SOT27-1
SOT108-1
SOT337-1
SOT402-1
SOT762-1
Type number
DHVQFN14 plastic dual in-line compatible thermal enhanced very
thin quad flat package; no leads; 14 terminals;
body 2.5
×
3
×
0.85 mm
NXP Semiconductors
74LV04
Hex inverter
4. Functional diagram
1
1
2
1
1A
1Y
2
3
1
4
3
2A
2Y
4
5
1
6
5
3A
3Y
6
9
1
8
9
4A
4Y
8
11
5A
5Y
10
11
1
10
13
6A
6Y
12
13
1
mna343
12
A
Y
mna341
mna342
Fig 1. Logic symbol
Fig 2. IEC logic symbol
Fig 3. Logic diagram (one gate)
5. Pinning information
5.1 Pinning
74LV04
terminal 1
index area
1Y
1A
1Y
2A
2Y
3A
3Y
GND
1
2
3
4
5
6
7
001aac441
2
3
4
5
6
7
GND
4Y
8
V
CC(1)
14 V
CC
13 6A
12 6Y
11 5A
10 5Y
9
4A
14 V
CC
13 6A
12 6Y
2A
2Y
3A
3Y
04
11 5A
10 5Y
9
8
4A
4Y
1
1A
001aah094
Transparent top view
(1) The die substrate is attached to this pad using
conductive die attach material. It can not be used as
a supply pin or input.
Fig 4. Pin configuration DIP14, SO14 and (T)SSOP14
Fig 5. Pin configuration DHVQFN14
74LV04_3
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 03 — 4 December 2007
2 of 15
NXP Semiconductors
74LV04
Hex inverter
5.2 Pin description
Table 2.
Symbol
1A
1Y
2A
2Y
3A
3Y
GND
4Y
4A
5Y
5A
6Y
6A
V
CC
Pin description
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Description
data input
data output
data input
data output
data input
data output
ground (0 V)
data output
data input
data output
data input
data output
data input
supply voltage
6. Functional description
Table 3.
Function table
H = HIGH voltage level; L = LOW voltage level.
Input nA
L
H
Output nY
H
L
7. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
V
CC
I
IK
I
OK
I
O
I
CC
I
GND
T
stg
Parameter
supply voltage
input clamping current
output clamping current
output current
supply current
ground current
storage temperature
V
I
<
−0.5
V or V
I
> V
CC
+ 0.5 V
V
O
<
−0.5
V or V
O
> V
CC
+ 0.5 V
V
O
=
−0.5
V to (V
CC
+ 0.5 V)
[1]
[1]
Conditions
Min
−0.5
-
-
-
-
−50
−65
Max
+7.0
±20
±50
±25
50
-
+150
Unit
V
mA
mA
mA
mA
mA
°C
74LV04_3
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 03 — 4 December 2007
3 of 15
NXP Semiconductors
74LV04
Hex inverter
Table 4.
Limiting values
…continued
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
P
tot
Parameter
total power dissipation
DIP14 package
SO14 package
(T)SSOP14 package
DHVQFN14 package
[1]
[2]
[3]
[4]
[5]
Conditions
T
amb
=
−40 °C
to +125
°C
[2]
[3]
[4]
[5]
Min
-
-
-
-
Max
750
500
500
500
Unit
mW
mW
mW
mW
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
P
tot
derates linearly with 12 mW/K above 70
°C.
P
tot
derates linearly with 8 mW/K above 70
°C.
P
tot
derates linearly with 5.5 mW/K above 60
°C.
P
tot
derates linearly with 4.5 mW/K above 60
°C.
8. Recommended operating conditions
Table 5.
Recommended operating conditions
Voltages are referenced to GND (ground = 0 V).
Symbol
V
CC
V
I
V
O
T
amb
∆t/∆V
Parameter
supply voltage
input voltage
output voltage
ambient temperature
input transition rise and fall rate
V
CC
= 1.0 V to 2.0 V
V
CC
= 2.0 V to 2.7 V
V
CC
= 2.7 V to 3.6 V
V
CC
= 3.6 V to 5.5 V
[1]
Conditions
[1]
Min
1.0
0
0
−40
-
-
-
-
Typ
3.3
-
-
+25
-
-
-
-
Max
5.5
V
CC
V
CC
+125
500
200
100
50
Unit
V
V
V
°C
ns/V
ns/V
ns/V
ns/V
The static characteristics are guaranteed from V
CC
= 1.2 V to V
CC
= 5.5 V, but LV devices are guaranteed to function down to
V
CC
= 1.0 V (with input levels GND or V
CC
).
74LV04_3
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 03 — 4 December 2007
4 of 15
NXP Semiconductors
74LV04
Hex inverter
9. Static characteristics
Table 6.
Static characteristics
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
V
IH
HIGH-level input voltage
Conditions
V
CC
= 1.2 V
V
CC
= 2.0 V
V
CC
= 2.7 V to 3.6 V
V
CC
= 4.5 V to 5.5 V
V
IL
LOW-level input voltage
V
CC
= 1.2 V
V
CC
= 2.0 V
V
CC
= 2.7 V to 3.6 V
V
CC
= 4.5 V to 5.5 V
V
OH
HIGH-level output voltage
V
I
= V
IH
or V
IL
l
O
=
−100 µA;
V
CC
= 1.2 V
l
O
=
−100 µA;
V
CC
= 2.0 V
l
O
=
−100 µA;
V
CC
= 2.7 V
l
O
=
−100 µA;
V
CC
= 3.0 V
l
O
=
−100 µA;
V
CC
= 4.5 V
l
O
=
−6
mA; V
CC
= 3.0 V
l
O
=
−12
mA; V
CC
= 4.5 V
V
OL
LOW-level output voltage
V
I
= V
IH
or V
IL
I
O
= 100
µA;
V
CC
= 1.2 V
I
O
= 100
µA;
V
CC
= 2.0 V
I
O
= 100
µA;
V
CC
= 2.7 V
I
O
= 100
µA;
V
CC
= 3.0 V
I
O
= 100
µA;
V
CC
= 4.5 V
I
O
= 6 mA; V
CC
= 3.0 V
I
O
= 12 mA; V
CC
= 4.5 V
I
I
I
CC
∆I
CC
C
I
[1]
−40 °C
to +85
°C
Min
0.9
1.4
2.0
0.7V
CC
-
-
-
-
-
1.8
2.5
2.8
4.3
2.4
3.6
-
-
-
-
-
-
-
-
-
-
-
Typ
[1]
-
-
-
-
-
-
-
-
1.2
2.0
2.7
3.0
4.5
2.82
4.2
0
0
0
0
0
0.25
0.35
-
-
-
3.5
Max
-
-
-
-
0.3
0.6
0.8
0.3V
CC
-
-
-
-
-
-
-
-
0.2
0.2
0.2
0.2
0.40
0.55
1.0
20.0
500
-
−40 °C
to +125
°C
Unit
Min
0.9
1.4
2.0
0.7V
CC
-
-
-
-
-
1.8
2.5
2.8
4.3
2.2
3.5
-
-
-
-
-
-
-
-
-
-
-
Max
-
-
-
-
0.3
0.6
0.8
V
V
V
V
V
V
V
0.3V
CC
V
-
-
-
-
-
-
-
-
0.2
0.2
0.2
0.2
0.50
0.65
1.0
40
850
-
V
V
V
V
V
V
V
V
V
V
V
V
V
V
µA
µA
µA
pF
input leakage current
supply current
additional supply current
input capacitance
V
I
= V
CC
or GND;
V
CC
= 5.5 V
V
I
= V
CC
or GND; I
O
= 0 A;
V
CC
= 5.5 V
per input; V
I
= V
CC
−
0.6 V;
V
CC
= 2.7 V to 3.6 V
Typical values are measured at T
amb
= 25
°C.
74LV04_3
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 03 — 4 December 2007
5 of 15
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