Bus Transceiver, AC Series, 1-Func, 8-Bit, True Output, CMOS, CDFP20, FP-20
UT54ACS245S-UQAH规格参数
参数名称
属性值
Objectid
8007873645
包装说明
DFP,
Reach Compliance Code
unknown
系列
AC
JESD-30 代码
R-CDFP-F20
逻辑集成电路类型
BUS TRANSCEIVER
位数
8
功能数量
1
端口数量
2
端子数量
20
最高工作温度
125 °C
最低工作温度
-55 °C
输出特性
3-STATE
输出极性
TRUE
封装主体材料
CERAMIC, METAL-SEALED COFIRED
封装代码
DFP
封装形状
RECTANGULAR
封装形式
FLATPACK
传播延迟(tpd)
15 ns
认证状态
Not Qualified
筛选级别
MIL-PRF-38535 Class Q
最大供电电压 (Vsup)
5.5 V
最小供电电压 (Vsup)
4.5 V
标称供电电压 (Vsup)
5 V
表面贴装
YES
技术
CMOS
温度等级
MILITARY
端子形式
FLAT
端子位置
DUAL
总剂量
1M Rad(Si) V
UT54ACS245S-UQAH文档预览
UT54ACS245S
Radiation-Hardened
Schmitt Octal Bus Transceiver with Three-State Outputs
FEATURES
Three-state outputs drive bus line directly
radiation-hardened CMOS
- Latchup immune
High speed
Low power consumption
Single 5 volt supply
Available QML Q or V processes
Flexible package
- 20-pin DIP
- 20-lead flatpack
DESCRIPTION
The UT54ACS245S is a non-inverting octal bus transceiver
with Schmitt Trigger input levels. The circuit is designed for
asynchronous two-way communication between data buses.
The control function implementation minimizes external timing
requirements.
The device allows data transmission from the A bus to the B bus
or from the B bus to the A bus depending upon the logic level
at the direction control (DIR) input. The enable input (G) dis-
ables the device so that the buses are effectively isolated.
The device is characterized over full military temperature range
of -55 C to +125 C.
FUNCTION TABLE
ENABLE
G
L
L
H
DIRECTION
CONTROL DIR
L
H
X
OPERATION
B Data To A Bus
A Data To B Bus
Isolation
PINOUTS
20-Pin DIP
Top View
DIR
A1
A2
A3
A4
A5
A6
A7
A8
V
SS
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
DD
G
B1
B2
B3
B4
B5
B6
B7
B8
20-Lead Flatpack
Top View
DIR
A1
A2
A3
A4
A5
A6
A7
A8
V
SS
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
DD
G
B1
B2
B3
B4
B5
B6
B7
B8
LOGIC SYMBOL
G
DIR
(19)
(1)
G3
3 EN1 (BA)
3 EN2 (AB)
(18)
1
2
(17)
(16)
(15)
(14)
B1
B2
B3
B4
A1
A2
A3
A4
A5
A6
A7
A8
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(9)
B5
(13)
B6
(12)
B7
(11)
B8
Note:
1. Logic symbol in accordance with ANSI/IEEE Std 91-1984 and IEC
Publication 617-12.
171
RadHard MSI Logic
UT54ACS245S
LOGIC DIAGRAM
DIR
(1)
(19)
G
A1
(2)
(18)
B1
A2
(3)
(17)
B2
A3
(4)
(16)
B3
A4
(5)
(15)
B4
A5
(6)
(14)
B5
A6
(7)
(13)
B6
A7
(8)
(12)
B7
A8
(9)
(11)
B8
RadHard MSI Logic
172
UT54ACS245S
RADIATION HARDNESS SPECIFICATIONS
1
PARAMETER
Total Dose
SEU Threshold
2
SEL Threshold
3
Neutron Fluence
LIMIT
1.0E6
80
120
1.0E14
UNITS
rads(Si)
MeV-cm
2
/mg
MeV-cm
2
/mg
n/cm
2
Notes:
1. Logic will not latchup during radiation exposure within the limits defined in the table.
2. Device storage elements are immune to SEU affects.
ABSOLUTE MAXIMUM RATINGS
SYMBOL
V
DD
V
I/O
T
STG
T
J
T
LS
JC
PARAMETER
Supply voltage
Voltage any pin
Storage Temperature range
Maximum junction temperature
Lead temperature (soldering 5 seconds)
Thermal resistance junction to case
DC input current
Maximum power dissipation
LIMIT
-0.3 to 7.0
-.3 to V
DD
+.3
-65 to +150
+175
+300
20
10
1
UNITS
V
V
C
C
C
C/W
mA
W
I
I
P
D
Note:
1. Stresses outside the listed absolute maximum ratings may cause permanent damage to the device. This is a stress rating only, functional operation of the device
at these or any other conditions beyond limits indicated in the operational sections is not recommended. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.
RECOMMENDED OPERATING CONDITIONS
SYMBOL
V
DD
V
IN
T
C
PARAMETER
Supply voltage
Input voltage any pin
Temperature range
LIMIT
4.5 to 5.5
0 to V
DD
-55 to + 125
UNITS
V
V
C
173
RadHard MSI Logic
UT54ACS245S
DC ELECTRICAL CHARACTERISTICS
7
(V
DD
= 5.0V 10%; V
SS
= 0V
6
, -55 C < T
C
< +125 C)
SYMBOL
V
T
+
V
T
-
PARAMETER
Schmitt Trigger, positive going threshold
1
ACS
Schmitt Trigger, negative going threshold
1
ACS
Schmitt Trigger, typical range of hysteresis
2
ACS
Input leakage current
ACS
Low-level output voltage
3
ACS
High-level output voltage
3
ACS
Output current (Sink)
10
.3V
DD
CONDITION
MIN
MAX
.7V
DD
UNIT
V
V
V
H
0.6
V
IN
= V
DD
or V
SS
I
OL
= 100 A
I
OH
= -100 A
V
IN
=V
DD
or V
SS
V
OL
=0.4V
V
DD
- 0.25
12
-1
1.5
1
V
A
I
IN
V
OL
V
OH
I
OL
0.25
V
V
mA
I
OH
Output current (Source)
10
V
IN
=V
DD
or V
SS
V
OH
=V
DD
- 0.4
-12
mA
I
OZ
I
OS
P
total
I
DDQ
C
IN
C
OUT
Three-state output leakage current
Short-circuit output current
2, 4
ACS
Power dissipation
2, 8, 9
Quiescent Supply Current
Input capacitance
5
Output capacitance
5
V
O
= V
DD
and V
SS
V
O
= V
DD
and V
SS
C
L
= 50pF
V
DD
= 5.5V
= 1MHz @ 0V
= 1MHz @ 0V
-30
30
A
-300
300
2.0
10
15
15
mA
mW/MHz
A
pF
pF
RadHard MSI Logic
174
UT54ACS245S
Notes:
1. Functional tests are conducted in accordance with MIL-STD-883 with the following input test conditions: V
IH
= V
IH
(min) + 20%, - 0%; V
IL
= V
IL
(max) + 0%,
- 50%, as specified herein, for TTL, CMOS, or Schmitt compatible inputs. Devices may be tested using any input voltage within the above specified range, but
are guaranteed to V
IH
(min) and V
IL
(max).
2. Supplied as a design limit, but not guaranteed or tested.
3. Per MIL-PRF-38535, for current density 5.0E5 amps/cm
2
, the maximum product of load capacitance (per output buffer) times frequency should not exceed
3,765 pF/MHz.
4.Not more than one output may be shorted at a time for maximum duration of one second.
5.Capacitance measured for initial qualification and when design changes may affect the value. Capacitance is measured between the designated terminal and V
SS
at frequency of 1MHz and a signal amplitude of 50mV rms maximum.
6. Maximum allowable relative shift equals 50mV.
7. All specifications valid for radiation dose 1E6 rads(Si).
8. Power does not include power contribution of any TTL output sink current.
9. Power dissipation specified per switching output.
10.Guaranteed based on characterization data, but not tested.
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