Supertex inc.
Two Channel, Five Level, High Speed
Ultrasound Driver IC
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MD1715
Features
Advanced CMOS technology
±4.75 to 12.9V gate drive voltage
2A output source and sink current
6.5ns rise and fall time with 1nF load
10ns propagation delay
±2ns matched delay times
12 matched channels
1.8V to 3.3V CMOS logic interface
Smart logic threshold
Low inductance package
General Description
The Supertex MD1715, paired with the Supertex TC8020, forms
a two channel, five level, high voltage, high speed transmit pulser
chip set. The chip set is designed for medical ultrasound imaging
applications, but can also be used for metal flaw detection, Non-
Destructive Testing (NDT), and piezoelectric transducer drivers.
The MD1715 is a two channel logic controller circuit with 12 low
impedance MOSFET gate drivers. There are two sets of control
logic inputs, one each for channels A and B. Each channel
consists of three pairs of MOSFET gate drivers. These drivers
are designed to match the drive requirements of the Supertex
TC8020.
The TC8020 is the output stage of the pulser, with six pairs of
MOSFETs. Each pair consists of a P-channel and an N-channel
MOSFET. They are designed to have the same impedance and
can provide typical peak currents of ±3.5 amps at 200V.
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Applications
Medical ultrasound imaging
Piezoelectric transducer drivers
Metal flaw detection
Non-Destructive Testing (NDT)
Typical Application Circuit
+3.3V
+12V
+12V
+12V
VPP2
VPP1
VLL/EN
AVDD
VDD1
VDD2
OP1A
ON1A
OP2A
10nF
10nF
10nF
10nF
GP1
GN1
GP2
GN2
GP3
GN3
GP4
SP6 SP3 SP5 SP2
SP4 SP1
DP1
DN1
DP2
DN2
DP3
TX(A)
SELA
POSA
1.8 to 3.3V
CMOS
Input Logic
NEGA
POSB
NEGB
SELB
ON2A
OP3A
MD1715
ON3A
OP1B
ON1B
OP2B
ON2B
OP3B
ON3B
10nF
10nF
10nF
10nF
TC8020
DN3
DP4
DN4
DP5
DN5
DP6
TX(B)
GN4
GP5
GN5
GP6
GN6
AGND GND
AVSS
(SUB)
VSS
DN6
PAD SN6 SN3 SN5 SN2 SN4 SN1
-12V
-12V
1235 Bordeaux Drive, Sunnyvale, CA 94089
VNN2
Tel: 408-222-8888
VNN1
www.supertex.com
Supertex inc.
MD1715
Ordering Information
Device
Package Option
6.00x6.00mm body
1.0mm height (max)
0.50mm pitch
40-Lead QFN
MD1715
MD1715K6-G
-G indicates package is RoHS compliant (‘Green’)
Absolute Maximum Ratings
Parameter
GND and AGND, Ground
V
LL
logic input pin
AV
DD
, V
DD
1, positive gate drive supply
V
DD
2, positive gate drive supply
AV
SS
, V
SS
, negative gate drive supply
Storage temperature
Power dissipation*
Value
0V
-0.5V to +5.5V
-0.5V to +14.5V
-0.5V to +14.5V
-14.5V to +0.5V
-65°C to 150°C
1.3W
Pin Configuration
40
1
40-Lead QFN (K6)
(top view)
Absolute Maximum Ratings are those values beyond which damage to the
device may occur. Functional operation under these conditions is not implied.
Continuous operation of the device at the absolute rating level may affect
device reliability. All voltages are referenced to device ground.
* 1.0oz 4-layer 3x4” PCB
Package Marking
MD1715
LLLLLL
YYWW
AAA CCC
L = Lot Number
YY = Year Sealed
WW = Week Sealed
A = Assembler ID
C = Country of Origin
= “Green” Packaging
Package may or may not include the following marks: Si or
40-Lead QFN (K6)
Operating Supply Voltages
Sym
V
LL
AV
DD
AV
SS
, V
SS
Parameter
Logic supply
Positive analog supply
Negative gate drive supply
Min
1.8
8.0
4.75
-12.9
Typ
3.3
-
-
-
Max
3.6
12.9
12.9
-4.75
Units Conditions
V
V
V
V
---
AV
DD
≥ (V
DD
1 or V
DD
2)
---
---
V
DD
2, V
DD
1 Positive gate drive supply
Operating Supply Current
Sym
I
VLL
I
AVDDQ
I
VSSQ
I
VDD1Q
I
VDD2Q
Parameter
Logic reference current
AV
DD
power down current
V
VSS
power down current
V
DD1
power down current
V
DD2
power down current
(Over operating conditions unless otherwise specified, V
LL
= 3.3V, AV
DD
= V
DD1
= V
DD2
= +12V, AV
SS
= V
SS
= -12V, T
A
= 25°C)
Min
-
-
-
-
Typ
10
0.4
0.1
10
10
Max
-
-
25
25
Units Conditions
µA
mA
EN = 0, all inputs Low.
µA
V
LL
= 3.3V
Supertex inc.
1235 Bordeaux Drive, Sunnyvale, CA 94089
2
Tel: 408-222-8888
www.supertex.com
MD1715
Operating Supply Current
Sym
I
AVDDEN
I
VSSEN
I
VDD1EN
I
VDD2EN
I
AVDDCW
I
VSSCW
I
VDD1CW
I
VDD2CW
Parameter
AV
DD
power up current
V
SS
power up current
V
DD1
power up current
V
DD2
power up current
AV
DD
CW 5MHz current
V
SS
CW 5MHz current
V
DD1
CW 5MHz current
V
DD2
CW 5MHz current
(Over operating conditions unless otherwise specified, V
LL
= 3.3V, AV
DD
= V
DD1
= V
DD2
= +12V, AV
SS
= V
SS
= -12V, T
A
= 25°C)
Min
-
-
-
-
-
-
-
-
Typ
2.0
0.7
10
10
10
5.0
25
25
Max
3.0
1.0
-
-
-
-
-
-
Units Conditions
mA
mA
µA
µA
mA
mA
mA
A&B channel on at 5.0MHz no load,
V
DD1
= 12V, V
DD2
= 5.0V
A&B channel on at 5.0MHz no load,
V
DD1
= 5.0V, V
DD2
= 12V
A&B channel on at 5.0MHz no load,
V
DD1
= 12V, V
DD2
= 5.0V
EN = 1, all inputs low.
AC Electrical Characteristics
Sym
t
irf
t
r
t
f
t
dr
t
df
|t
r
- t
f
|
|t
dr
- t
df
|
t
dm
Δt
j
t
EN_ON
t
EN_OFF
HD2
Sym
R
SINK
R
SOURCE
I
SINK
I
SOURCE
Parameter
Input rise & fall time
Output rise time
Output fall time
Output rise delay
Output fall delay
(Over operating conditions unless otherwise specified, V
LL
= 3.3V, AV
DD
= V
DD1
= V
DD2
= +12V, AV
SS
= V
SS
= -12V, T
A
= 25°C)
Min
-
-
-
-
-
-
-
-
-
-
-
-40
Min
-
-
1.7
1.7
Typ
-
6.5
6.5
10
10
1.0
1.0
±2.0
20
25
0.5
-
Typ
5.0
5.0
2.0
2.0
Max
10
-
-
-
-
-
-
-
-
50
2.0
-
Max
6.0
6.0
-
-
Units Conditions
ns
ns
ns
ns
ns
-
-
ns
ps
μs
μs
dB
Logic input edge speed requirement
1nF load, see timing diagram, input
signal rise/fall time 2.0ns
---
---
---
For each channel
---
Ch to Ch and Device to Device
V
DD
= 10V
---
---
---
Rise and fall time matching
Propagation delay matching
Delay time matching
Output jitter
IC enable time
IC disable time
2
nd
harmonic distortion
Parameter
Output sink resistance
Output source resistance
Peak output sink current
Peak output source current
P-Channel Gate Driver Outputs
Units Conditions
Ω
Ω
A
A
I
SINK
= 100mA
I
SOURCE
= 100mA
---
---
Supertex inc.
1235 Bordeaux Drive, Sunnyvale, CA 94089
3
Tel: 408-222-8888
www.supertex.com
MD1715
N-Channel Gate Driver Outputs
Sym
R
SINK
R
SOURCE
I
SINK
I
SOURCE
Parameter
Output sink resistance
Output source resistance
Peak output sink current
Peak output source current
Min
-
-
1.7
1.7
Typ
5.0
5.0
2.0
2.0
Max
6.0
6.0
-
-
Units Conditions
Ω
Ω
A
A
I
SINK
= 100mA
I
SOURCE
= 100mA
---
---
Logic Inputs
Sym
V
ENL
V
IH
V
IL
I
IH
I
IL
Parameter
Chip disable low voltage
Input logic high voltage
Input logic low voltage
Input logic high current
Input logic low current
Min
0
0.8V
LL
0
-
-1.0
Typ
-
-
-
-
-
Max
0.3
V
LL
0.2V
LL
1.0
-
Units Conditions
V
V
V
µA
µA
VLL/EN is a dual function pin
---
---
---
---
Truth Table for Channels A and B
Logic Inputs A
EN
1
1
1
1
1
1
1
1
EN
1
1
1
1
1
1
1
1
0
0→1
1→0
SELA
0
0
0
0
1
1
1
1
SELB
0
0
0
0
1
1
1
1
X
0
0
POSA
0
0
1
1
0
0
1
1
Logic Inputs B
POSB
0
0
1
1
0
0
1
1
X
0
0
NEGB
0
1
0
1
0
1
0
1
X
0
0
NEGA
0
1
0
1
0
1
0
1
SP1
to
DP1
OFF
OFF
OFF
OFF
OFF
OFF
ON
OFF
SP4
to
DP4
OFF
OFF
OFF
OFF
OFF
OFF
ON
OFF
OFF
SN1
to
DN1
OFF
OFF
OFF
OFF
OFF
ON
OFF
OFF
SN4
to
DN4
OFF
OFF
OFF
OFF
OFF
ON
OFF
OFF
OFF
SP2
to
DP2
OFF
OFF
ON
OFF
OFF
OFF
OFF
OFF
SP5
to
DP5
OFF
OFF
ON
OFF
OFF
OFF
OFF
OFF
OFF
SN2
to
DN2
OFF
ON
OFF
OFF
OFF
OFF
OFF
OFF
SN5
to
DN5
OFF
ON
OFF
OFF
OFF
OFF
OFF
OFF
OFF
SP3
to
DP3
ON
OFF
OFF
OFF
ON
OFF
OFF
OFF
SP6
to
DP6
ON
OFF
OFF
OFF
ON
OFF
OFF
OFF
ON
SN3
to
DN3
ON
OFF
OFF
OFF
ON
OFF
OFF
OFF
SN6
to
DN6
ON
OFF
OFF
OFF
ON
OFF
OFF
OFF
ON
EN transitions from low to high or high to low should occur at all logic inputs low.
Supertex inc.
1235 Bordeaux Drive, Sunnyvale, CA 94089
4
Tel: 408-222-8888
www.supertex.com
MD1715
Circuit Pin Layout
VSUB
GP2
GP1
SN2
SN1
SP1
SP2
NC
NC
NC
NC
ON1A
ON2A
OP1A
OP2A
VDD2
VDD1
VDD2
VDD1
GND
GND
GN1
GN2
ON3A
GND
GND
OP3A
NC
NC
NC
DN1
DP1
DN2
DP2
DN3
DP3
TX(A)
SELA
POSA
NEGA
VLL/EN
AVDD
AGND
AVSS
SELB
POSB
NEGB
OP1B
OP2B
VDD2
VDD1
GND
ON1B
ON2B
VDD2
GND
VDD1
NC
GN3
GP3
NC
SN3
SN6
NC
GP6
GN6
NC
GN5
GN4
SP4
NC
NC
NC
GP5
GP4
SN5
MD1715
VSS
GND
OP3B
VSS
ON3B
GND
TC8020
SP3
SP6
DN6
DP6
DN5
DP5
DN4
DP4
TX(B)
SN4
NC
Timing Diagram
Input
t
dr
V
DD
Output
0V
10%
t
r
t
f
50%
50%
t
df
90%
Supertex inc.
1235 Bordeaux Drive, Sunnyvale, CA 94089
5
Tel: 408-222-8888
VSUB
SP5
www.supertex.com
NC
NC
NC
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