电子工程世界电子工程世界电子工程世界

关键词

搜索

型号

搜索

MAQ4125YME TR

产品描述gate drivers automotive aec-q100 inverting + non-inverting dual 3A
产品类别半导体    其他集成电路(IC)   
文件大小434KB,共19页
制造商Microchip(微芯科技)
官网地址https://www.microchip.com
标准  
下载文档 详细参数 选型对比 全文预览

MAQ4125YME TR概述

gate drivers automotive aec-q100 inverting + non-inverting dual 3A

MAQ4125YME TR规格参数

参数名称属性值
ManufactureMicrel
产品种类
Product Category
Gate Drivers
RoHSYes
ProducMOSFET Gate Drivers
安装风格
Mounting Style
SMD/SMT
封装 / 箱体
Package / Case
SOIC-8
系列
Packaging
Reel
工厂包装数量
Factory Pack Quantity
2500

文档预览

下载PDF文档
MAQ4123/MAQ4124/MAQ4125
Automotive AEC-Q100 Qualified Dual
3A Peak Low-Side MOSFET Driver
Bipolar/CMOS/DMOS Process
General Description
The MAQ4123/MAQ4124/MAQ4125 are a family of dual
3A buffer/MOSFET drivers intended for driving power
MOSFETs, IGBTs and other heavy loads (capacitive,
resistive or inductive) which require low-impedance, high
peak currents and fast switching times. They are available
in
inverting,
non-inverting
and
complementary
configurations.
The MAQ4123/MAQ4124/MAQ4125 operate from a 4.5V
to 20V supply, feature an output resistance of 2.3Ω, sink or
source 3A of peak current, and switch an 1800pF
capacitive load in 10ns with typical propagation delay
times of 50ns.
The MAQ4123/MAQ4124/MAQ4125 feature TTL or CMOS
compatible inputs with 400mV of hysteresis to provide
noise immunity. The inputs can withstand negative voltage
swings of 5V and are latch-up protected to withstand
200mA of reverse current.
The MAQ4123/MAQ4124/MAQ4125 are rated for the
−40°C
to +125°C operating temperature range, have been
AEC-Q100 qualified for automotive applications, and are
available in the ePad SOIC-8 package for improved power
dissipation and thermal performance required by
automotive applications.
Data sheets and support documentation can be found on
Micrel’s web site at:
www.micrel.com.
Features
Automotive AEC-Q100 Qualified
High
±3A
peak output current
Wide 4.5V to 20V supply voltage range
Low 2.3Ω output resistance
Matched rise and fall times
Fast 10ns rise/fall times with 1800pF capacitive load
Low propagation delay time of 50ns (typical)
TTL/CMOS logic inputs independent of supply voltage
Latch-up protected to 200mA reverse current
Logic input withstands swing to
−5V
Low equivalent 6pF input capacitance
Output voltage swings within 25mV of ground or VS
Low supply current
2.0mA with logic-1 input (maximum over
temperature)
300μA with logic-0 input (maximum over
temperature)
‘426/7/8-, ‘1426/7/8-, ‘4426/7/8 industry standard pin
out
Inverting, non-inverting, and differential configurations
−40°C
to +125°C temperature range
Exposed backside pad (ePad) packaging for improved
power dissipation
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 •
http://www.micrel.com
July 2011
M9999-072511-A

MAQ4125YME TR相似产品对比

MAQ4125YME TR MAQ4123YME TR MAQ4124YME TR
描述 gate drivers automotive aec-q100 inverting + non-inverting dual 3A gate drivers automotive aec-q100 dual inverting 3A gate drivers automotive aec-q100 dual non-inverting 3A
Manufacture Micrel Micrel Micrel
产品种类
Product Category
Gate Drivers Gate Drivers Gate Drivers
RoHS Yes Yes Yes
Produc MOSFET Gate Drivers MOSFET Gate Drivers MOSFET Gate Drivers
安装风格
Mounting Style
SMD/SMT SMD/SMT SMD/SMT
封装 / 箱体
Package / Case
SOIC-8 SOIC-8 SOIC-8
系列
Packaging
Reel Reel Reel
工厂包装数量
Factory Pack Quantity
2500 2500 2500
测评汇总:安信可蓝牙开发板PB-02-Kit
活动详情:【安信可蓝牙开发板PB-02-Kit】更新至 2021-12-17测评报告汇总:@jszszzy安信可PB-02模组评测(4)——PHY62XX ADC使用指南安信可PB-02模组评测(3)——PHY62XX GPIO使用指南安信可P ......
EEWORLD社区 测评中心专版
请问高手:关于优龙FS2410开发板串口问题
请问高手: 怎么释放优龙FS2410开发板的调试串口一UART1,使得可以将UART1用作普通通讯端口跟GPRS模块通讯? 板子串口1是用作控制台的调试串口的,所以如果要用他跟其他模块 ......
xyw 嵌入式系统
Qsys系统采用NiosII与自定义AvalonMM slave接口生成的系统没人reset输入口?
自定义了一个求两个数字a,b的最大公约数的硬件算法,然后用avalon MM 从设备接口连接到Qsys系统上, 系统包括了: 一个clk核, 一个Nios II standard核 一个DDR2控制器 一个sysID核 一个 ......
zpccx FPGA/CPLD
ucos
各位大虾,最近学习ucos系统,在OSTickISR函数里有一个OSIntNesting,请问这个变量的作用是????...
jinzhongxiao 实时操作系统RTOS
正式复工了,各种措施有做到位吗
你们单位门口有人给你们检查温度吗,你们都戴口罩戴手套上班吗,你们进公司前都消毒吗。。。 ...
led2015 聊聊、笑笑、闹闹
FPGA逻辑设计注意事项列表
这是一个在逻辑设计中注意事项列表,由此引起的错误常使得设计不可靠或速度较慢,为了提高设计性能和提高速度的可靠性,必须确定设计通过所有的这些检查。专业FPGA设计论坛3 1 b( D3 R4 p! r/ \ ......
eeleader FPGA/CPLD

 
EEWorld订阅号

 
EEWorld服务号

 
汽车开发圈

 
机器人开发圈

About Us 关于我们 客户服务 联系方式 器件索引 网站地图 最新更新 手机版

站点相关: 大学堂 TI培训 Datasheet 电子工程 索引文件: 1211  488  1433  169  610  25  10  29  4  13 

器件索引   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z

北京市海淀区中关村大街18号B座15层1530室 电话:(010)82350740 邮编:100190

电子工程世界版权所有 京B2-20211791 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号 Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved