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935291757132

产品描述AUP/ULP/V SERIES, 1-BIT DRIVER, TRUE OUTPUT, PDSO6, 0.90 X 1 MM, 0.35 MM HEIGHT, SOT-1115, SON-6
产品类别逻辑    逻辑   
文件大小166KB,共28页
制造商Nexperia
官网地址https://www.nexperia.com
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935291757132概述

AUP/ULP/V SERIES, 1-BIT DRIVER, TRUE OUTPUT, PDSO6, 0.90 X 1 MM, 0.35 MM HEIGHT, SOT-1115, SON-6

935291757132规格参数

参数名称属性值
包装说明SON,
Reach Compliance Codeunknown
Is SamacsysN
系列AUP/ULP/V
JESD-30 代码R-PDSO-N6
JESD-609代码e3
长度1 mm
逻辑集成电路类型BUS DRIVER
位数1
功能数量1
端口数量2
端子数量6
最高工作温度125 °C
最低工作温度-40 °C
输出极性TRUE
封装主体材料PLASTIC/EPOXY
封装代码SON
封装形状RECTANGULAR
封装形式SMALL OUTLINE
传播延迟(tpd)20.1 ns
座面最大高度0.35 mm
最大供电电压 (Vsup)3.6 V
最小供电电压 (Vsup)0.8 V
标称供电电压 (Vsup)1.1 V
表面贴装YES
技术CMOS
温度等级AUTOMOTIVE
端子面层TIN
端子形式NO LEAD
端子节距0.3 mm
端子位置DUAL
宽度0.9 mm
Base Number Matches1

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74AUP1Z04
Low-power X-tal driver with enable and internal resistor
Rev. 4 — 1 December 2011
Product data sheet
1. General description
The 74AUP1Z04 combines the functions of the 74AUP1GU04 and 74AUP1G04 with
enable circuitry and an internal bias resistor to provide a device optimized for use in
crystal oscillator applications.
When not in use the EN input can be driven HIGH, putting the device in a low power
disable mode with X1 pulled HIGH via R
PU
, X2 set LOW and Y set HIGH.Schmitt trigger
action at the EN input makes the circuit tolerant to slower input rise and fall times across
the entire V
CC
range from 0.8 V to 3.6 V.
This device is fully specified for partial power-down applications using I
OFF
at output Y.
The I
OFF
circuitry disables the output Y, preventing the damaging backflow current through
the device when it is powered down.
The integration of the two devices into the 74AUP1Z04 produces the benefits of a
compact footprint, lower power dissipation and stable operation over a wide range of
frequency and temperature.
2. Features and benefits
Wide supply voltage range from 0.8 V to 3.6 V
High noise immunity
ESD protection:
HBM JESD22-A114F Class 3A exceeds 5000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101E exceeds 1000 V
Latch-up performance exceeds 100 mA per JESD78B Class II
Inputs accept voltages up to 3.6 V
Low noise overshoot and undershoot < 10 % of V
CC
I
OFF
circuitry provides partial Power-down mode operation at output Y
Multiple package options
Specified from
40 C
to +85
C
and
40 C
to +125
C

 
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