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TPS61130, TPS61131, TPS61132
SLVS431C – JUNE 2002 – REVISED SEPTEMBER 2015
TPS6113x Synchronous SEPIC and Flyback Converter
With 1.1-A Switch and Integrated LDO
1 Features
1
3 Description
The TPS6113x devices provide a complete power
supply solution for products powered by either a one-
cell Li-Ion or Li-Polymer, or two- to four-cell Alkaline,
NiCd, or NiMH batteries. The devices can generate
two regulated output voltages. It provides a simple
and efficient buck-boost solution for generating 3.3 V
out of an input voltage that can be both higher and
lower than the output voltage. The converter provides
a maximum output current of at least 300 mA with
supply voltages down to 1.8 V. The implemented
SEPIC converter is based on a fixed frequency,
pulse-width-modulation (PWM) controller using a
synchronous rectifier to obtain maximum efficiency.
The maximum peak current in the SEPIC switch is
limited to a value of 1600 mA.
The converter can be disabled to minimize battery
drain. During shutdown, the load is completely
disconnected from the battery. A low-EMI mode is
implemented to reduce ringing, and in effect, lower
radiated electromagnetic energy when the converter
enters the discontinuous conduction mode. A power
good output at the SEPIC stage provides additional
control of any connected circuits like cascaded power
supply stages, or microprocessors.
The built-in LDO can be used for a second output
voltage derived either from the SEPIC output or
directly from the battery. The output voltage of this
LDO can be programmed by an external resistor
divider or is fixed internally on the chip. The LDO can
be enabled separately, that is, using the power good
of the SEPIC stage. The device is packaged in a 16-
pin VQFN package measuring 4 mm × 4 mm (RSA)
or in a 16-pin TSSOP (PW) package.
Device Information
(1)
10 µF
22 µH
V
Out1
e.g. 3.3 V
up to 300 mA
100 µF
•
•
•
•
•
•
•
•
•
•
•
•
Synchronous, Up to 90% Efficient, SEPIC
Converter With 300-mA Output Current From
2.5-V Input
Integrated 200-mA Reverse Voltage Protected
LDO for DC-DC Output Voltage Post Regulation
or Second Output Voltage
40-μA (Typical) Quiescent Current
Input Voltage Range: 1.8 V to 5.5 V
Fixed and Adjustable Output Voltage Options up
to 5.5 V
Power Save Mode for Improved Efficiency at Low-
Output Power
Low Battery Comparator
Power Good Output
Low EMI-Converter (Integrated Antiringing Switch)
Load Disconnect During Shutdown
Overtemperature Protection
Available in a Small 4-mm × 4-mm VQFN-16 or in
a TSSOP-16 Package
2 Applications
•
All Single Cell Li, Dual or Triple Cell Battery or
USB Powered Products as MP-3 Player, PDAs,
and Other Portable Equipment
Dual Input or Dual Output Mode
High Efficient Li-Ion to 3.3-V Conversion
Typical Application Schematic
22 µH
•
•
VBAT
1.8 V up to 6 V
Input
10 µF
SWN
SWP
VOUT
TPS61130
FB
PART NUMBER
TPS61130
TPS61131
PACKAGE
TSSOP (16)
VQFN (16)
TSSOP (16)
BODY SIZE (NOM)
5.00 mm × 4.40 mm
4.00 mm × 4.00 mm
5.00 mm × 4.40 mm
LBI
OFF
Control
Inputs
OFF
OFF
ON
ON
ON
SKIPEN
EN
LDOEN
PGOOD
LBO
LDOIN
LDOOUT
LDOSENSE
Control
Outputs
TPS61132
V
Out2
e.g. 1.5 V
up to 300 mA
2.2 µF
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
GND
PGND
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TPS61130, TPS61131, TPS61132
SLVS431C – JUNE 2002 – REVISED SEPTEMBER 2015
www.ti.com
Table of Contents
1
2
3
4
5
6
7
Features
..................................................................
Applications
...........................................................
Description
.............................................................
Revision History.....................................................
Available Output Voltage Options........................
Pin Configuration and Functions
.........................
Specifications.........................................................
7.1
7.2
7.3
7.4
7.5
7.6
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Typical Characteristics ..............................................
1
1
1
2
3
3
4
4
4
4
4
5
6
9.4 Device Functional Modes........................................
12
10 Application and Implementation........................
13
10.1 Application Information..........................................
13
10.2 Typical Applications ..............................................
13
11 Power Supply Recommendations
.....................
21
12 Layout...................................................................
21
12.1 Layout Guidelines .................................................
21
12.2 Layout Example ....................................................
21
12.3 Thermal Consideration..........................................
22
13 Device and Documentation Support
.................
23
13.1
13.2
13.3
13.4
13.5
13.6
Device Support......................................................
Related Links ........................................................
Community Resource............................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
23
23
23
23
23
23
8
9
Parameter Measurement Information
..................
9
Detailed Description
............................................
10
9.1 Overview .................................................................
10
9.2 Functional Block Diagram .......................................
10
9.3 Feature Description.................................................
11
14 Mechanical, Packaging, and Orderable
Information
...........................................................
23
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision B (January 2008) to Revision C
•
Page
Added
Pin Configuration and Functions
section,
ESD Ratings
table,
Feature Description
section,
Device Functional
Modes, Application and Implementation
section,
Power Supply Recommendations
section,
Layout
section,
Device
and Documentation Support
section, and
Mechanical, Packaging, and Orderable Information
section ..............................
1
2
Submit Documentation Feedback
Copyright © 2002–2015, Texas Instruments Incorporated
Product Folder Links:
TPS61130 TPS61131 TPS61132
TPS61130, TPS61131, TPS61132
www.ti.com
SLVS431C – JUNE 2002 – REVISED SEPTEMBER 2015
5 Available Output Voltage Options
(1)
PART NUMBER
(1)
TPS61130PW
TPS61131PW
TPS61132PW
TPS61130RSA
TPS61132RSA
(1)
(1)
3.3 V
3.3 V
Adjustable
3.3 V
OUTPUT VOLTAGE DC-DC
Adjustable
3.3 V
1.5 V
Adjustable
1.5 V
OUTPUT VOLTAGE LDO
Adjustable
Contact the factory to check availability of other fixed output voltage versions.
The packages are available taped and reeled. Add R suffix to device type (for example, TPS61130PWR or TPS61130RSAR) to order
quantities of 2000 devices per reel for the TSSOP (PW) package and 3000 devices per reel for the QFN (RSA) package.
6 Pin Configuration and Functions
PW Package
16-Pin TSSOP
Top View
RSA Package
16-Pin VQFN With Thermal Pad
Top View
Pin Functions
PIN
NAME
EN
FB
GND
LBI
LBO
LDOEN
LDOOUT
LDOIN
LDOSENSE
PGND
PGOOD
SKIPEN
SWN
SWP
VBAT
VOUT
Thermal Pad
NO.
TSSOP
7
15
12
5
13
8
10
9
11
3
14
6
2
1
4
16
VQFN
5
13
10
3
11
6
8
7
9
1
12
4
16
15
2
14
I
I
—
I
O
I
O
I
I
—
O
I
I
I
I
O
—
DC-DC-enable input. (1/VBAT enabled, 0/GND disabled)
DC-DC voltage feedback of adjustable versions
Control/logic ground
Low battery comparator input (comparator enabled with EN)
Low battery comparator output (open drain)
LDO-enable input (1/LDOIN enabled, 0/GND disabled)
LDO output
LDO input
LDO feedback for voltage adjustment, must be connected to LDOOUT at fixed output voltage
versions.
Power ground
DC-DC output power good (1:good, 0:failure) (open drain)
Enable/disable power save mode (1/VBAT enabled, 0/GND disabled)
DC-DC switch input
DC-DC rectifying switch input
Supply pin
DC-DC output
Must be soldered to achieve appropriate power dissipation. Should be connected to PGND.
I/O
DESCRIPTION
EN
LDOEN
LDOIN
LDOOUT
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SWP
SWN
PGND
VBAT
LBI
SKIPEN
EN
LDOEN
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
VOUT
FB
PGOOD
LBO
GND
LDOSENSE
LDOOUT
LDOIN
PGND
VBAT
LBI
SKIPEN
SWN
SWP
VOUT
FB
Thermal
Pad
PGOOD
LBO
GND
LDOSENSE
Copyright © 2002–2015, Texas Instruments Incorporated
3
Product Folder Links:
TPS61130 TPS61131 TPS61132
TPS61130, TPS61131, TPS61132
SLVS431C – JUNE 2002 – REVISED SEPTEMBER 2015
www.ti.com
7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
Input voltage on FB
Input voltage on SWN
Input voltage on SWP
Maximum voltage between SWP and VOUT
Input voltage on VOUT, LDOIN, LDOOUT, LDOEN, LDOSENSE, PGOOD, LBO, VBAT, LBI,
SKIPEN, EN
Operating virtual junction temperature, T
J
Storage temperature, T
stg
(1)
–0.3
–40
–65
(1)
MIN
–0.3
–0.3
–7
MAX
3.6
12
7
–12
7
150
150
UNIT
V
V
V
V
V
°C
°C
Stresses beyond those listed under
Absolute Maximum Ratings
may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under
Recommended
Operating Conditions.
Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
7.2 ESD Ratings
VALUE
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001
(1)
V
(ESD)
(1)
(2)
Electrostatic discharge
Charged-device model (CDM), per JEDEC specification JESD22-
C101
(2)
±1000
±250
V
UNIT
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
MIN
Supply voltage at VBAT
Operating free air temperature range, T
A
Operating virtual junction temperature, T
J
1.8
–40
–40
NOM
MAX
6.5
85
125
UNIT
V
°C
°C
7.4 Thermal Information
THERMAL METRIC
(1)
TPS61130,
TPS61131,
TPS61132
PW (TSSOP)
16 PINS
R
θJA
R
θJC(top)
R
θJB
ψ
JT
ψ
JB
R
θJC(bot)
(1)
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
100.5
35.9
45.4
2.6
44.8
N/A
TPS61130
UNIT
RSA (VQFN)
16 PINS
33.9
36.3
11
0.5
11
2.2
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
For more information about traditional and new thermal metrics, see the
Semiconductor and IC Package Thermal Metrics
application
report,
SPRA953.
4
Submit Documentation Feedback
Copyright © 2002–2015, Texas Instruments Incorporated
Product Folder Links:
TPS61130 TPS61131 TPS61132
TPS61130, TPS61131, TPS61132
www.ti.com
SLVS431C – JUNE 2002 – REVISED SEPTEMBER 2015
7.5 Electrical Characteristics
over recommended free-air temperature range and over recommended input voltage range (typical at an ambient temperature
range of 25°C) (unless otherwise noted)
PARAMETER
DC-DC STAGE
V
I
V
O
V
ref
f
I
SW
Input voltage range
Adjustable output voltage range
(TPS61130)
Reference voltage
Oscillator frequency
Switch current limit
Start-up current limit
SWN switch on resistance
SWP switch on resistance
Total accuracy (including line and
load regulation)
DC-DC
quiescent current
into
VBAT
into
VOUT
I
O
= 0 mA, V
EN
= VBAT = 1.8 V,
VOUT = 3.3 V, ENLDO = 0 V
I
O
= 0 mA, V
EN
= VBAT = 1.8 V,
VOUT = 3.3 V, ENLDO = 0 V
V
EN
= 0 V
1.8
0.9
200
I
O
= 200 mA
I
O
≥
1 mA
LDOIN change from 1.8 V to
2.6 V at 100 mA,
LDOOUT = 1.5 V
Load change from 10% to 90%,
LDOIN = 3.3 V
LDOIN = 7 V, VBAT = 1.8 V,
EN = VBAT
LDOEN = 0 V, LDOIN = 7 V
V
LBI
voltage decreasing
EN = VBAT or GND
V
O
= 3.3 V, I
OI
= 100
μA
V
LBO
= 7 V
490
20
0.1
500
10
0.01
0.04
100
0.01
0.1
0.2 × VBAT
0.8 × VBAT
0.2 × V
LDOIN
0.8 × V
LDOIN
Clamped on GND or VBAT
V
O
= 3.3 V
0.9 × V
o
0.01
0.92 × V
o
0.1
0.95 × V
o
0.1
0.4
320
500
300
±3%
0.6%
0.6%
30
1
510
μA
μA
mV
mV
μA
V
μA
μA
V
V
V
V
μA
V
10
10
0.2
VOUT = 3.3 V
VOUT = 3.3 V
VOUT = 3.3 V
1.8
2.5
485
400
1100
500
500
1300
0.4 x I
SW
200
250
350
500
±3%
25
25
1
7
5.5
μA
μA
μA
V
V
mA
mA
mV
6.5
5.5
515
600
1600
V
V
mV
kHz
mA
mA
mΩ
mΩ
TEST CONDITIONS
MIN
TYP
MAX
UNIT
DC-DC shutdown current
LDO STAGE
V
I(LDO)
V
O(LDO)
I
O(max)
Input voltage range
Adjustable output voltage range
(TPS61130)
Output current
LDO short circuit current limit
Minimum voltage drop
Total accuracy (including
line and load regulation)
Line regulation
Load regulation
LDO quiescent current
LDO shutdown current
CONTROL STAGE
V
IL
LBI voltage threshold
LBI input hysteresis
LBI input current
LBO output low voltage
LBO output low current
LBO output leakage current
V
IL
V
IH
V
IL
V
IH
EN, SKIPEN input low
voltage
EN, SKIPEN input high
voltage
LDOEN input low voltage
LDOEN input high voltage
EN, SKIPEN input current
Power-Good threshold
Copyright © 2002–2015, Texas Instruments Incorporated
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5
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TPS61130 TPS61131 TPS61132
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