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LP2981-N
SNOS773N – MARCH 2000 – REVISED APRIL 2016
LP2981-N Micropower 100-mA Ultralow Dropout Regulator in SOT-23 Package
1 Features
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•
•
•
•
•
•
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1
3 Description
The LP2981-N is a 100-mA, fixed-output voltage
regulator designed specifically to meet the
requirements of battery-powered applications.
Using an optimized Vertically Integrated PNP (VIP)
process,
the
LP2981-N
delivers
unequaled
performance in all specifications critical to battery-
powered designs:
Dropout Voltage: Typically 200 mV at 100-mA load,
and 7 mV at 1-mA load.
Ground Pin Current: Typically 600
μA
at 100-mA
load, and 80
μA
at 1-mA load.
Sleep Mode: Less than 1-μA quiescent current when
ON/OFF pin is pulled low.
Precision Output: 0.75% tolerance output voltages
available (A grade).
Assorted voltage options, from 2.5 V to 5 V, are
available as standard products.
Device Information
(1)
PART NUMBER
LP2981-N
PACKAGE
SOT-23 (5)
BODY SIZE (NOM)
2.90 mm × 1.60 mm
Operating Input Voltage Range: 2.1 V to 16 V
Ultralow-Dropout Voltage
Output Voltage Accuracy 0.75% (A Grade)
Specified 100-mA Output Current
< 1-μA Quiescent Current when Shutdown
Low Ground Pin Current at All Load Currents
High Peak Current Capability (300 mA Typical)
Wide Supply Voltage Range (16 V Maximum)
Fast Dynamic Response to Line and Load
Low Z
OUT
Over Wide Frequency Range
Overtemperature and Overcurrent Protection
−40°C
to 125°C Junction Temperature Range
2 Applications
•
•
•
•
Cellular Phones
Palmtop and Laptop Computers
Personal Digital Assistants (PDA)
Camcorders, Personal Stereos, Cameras
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Typical Application
V
IN
C
IN
IN
OUT
C
OUT
V
OUT
GND
ON/OFF
ON/OFF
NC
Copyright © 2016, Texas Instruments Incorporated
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
LP2981-N
SNOS773N – MARCH 2000 – REVISED APRIL 2016
www.ti.com
Table of Contents
1
2
3
4
5
6
Features
..................................................................
Applications
...........................................................
Description
.............................................................
Revision History.....................................................
Pin Configuration and Functions
.........................
Specifications.........................................................
6.1
6.2
6.3
6.4
6.5
6.6
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Typical Characteristics ..............................................
1
1
1
2
3
4
4
4
4
5
5
8
7.4 Device Functional Modes........................................
15
8
Application and Implementation
........................
16
8.1 Application Information............................................
16
8.2 Typical Application .................................................
16
9 Power Supply Recommendations......................
20
10 Layout...................................................................
20
10.1 Layout Guidelines .................................................
20
10.2 Layout Example ....................................................
20
11 Device and Documentation Support
.................
21
11.1
11.2
11.3
11.4
11.5
Third-Party Products Disclaimer ...........................
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
21
21
21
21
21
7
Detailed Description
............................................
14
7.1 Overview .................................................................
14
7.2 Functional Block Diagram .......................................
14
7.3 Feature Description.................................................
14
12 Mechanical, Packaging, and Orderable
Information
...........................................................
21
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision M (September 2015) to Revision N
•
Page
Changed update typical application drawing and change pin names from Vin, Vout to IN and OUT ...................................
1
Changes from Revision L (June 2015) to Revision M
•
•
Page
Changed split out ESD values by specific pins .....................................................................................................................
4
Changed correct junction-to-case and junction-to-board values (typo from last format update) ..........................................
5
Changes from Revision K (April 2013) to Revision L
•
•
Page
Changed "Nine" to "Assorted" ................................................................................................................................................
1
Added
Pin Configuration and Functions
section,
ESD Ratings
table,
Feature Description
section,
Device Functional
Modes, Application and Implementation
section,
Power Supply Recommendations
section,
Layout
section,
Device
and Documentation Support
section, and
Mechanical, Packaging, and Orderable Information
section ..............................
1
Changed text of NC pin description .......................................................................................................................................
3
Changed thermal value in footnote 3 ....................................................................................................................................
4
Changed thermal values to TI measure ................................................................................................................................
5
•
•
•
Changes from Revision J (January 2009) to Revision K
•
Page
Changed layout of National Data Sheet to TI format ...........................................................................................................
19
2
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LP2981-N
Copyright © 2000–2016, Texas Instruments Incorporated
LP2981-N
www.ti.com
SNOS773N – MARCH 2000 – REVISED APRIL 2016
5 Pin Configuration and Functions
DBV Package
5-Pin SOT-23
Top View
Pin Functions
PIN
NO.
1
2
3
NAME
IN
GND
ON/OFF
TYPE
I
—
I
Input voltage pin
Common ground (device substrate)
Logic high enable input
DO NOT CONNECT. Device pin 4 is reserved for post packaging test and calibration of the
LP2989 VOUT accuracy. Device pin 2 must be left floating. Do not connect to any potential. Do
not connect to ground. Any attempt to do pin continuity testing on device pin 2 is discouraged.
Continuity test results will be variable depending on the actions of the factory calibration.
Aggressive pin continuity testing (high voltage, or high current) on device pin 2 may activate the
trim circuitry forcing VOUT to move out of tolerance.
Regulated output voltage
DESCRIPTION
4
NC
—
5
OUT
O
Copyright © 2000–2016, Texas Instruments Incorporated
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3
LP2981-N
SNOS773N – MARCH 2000 – REVISED APRIL 2016
www.ti.com
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
(1) (2)
MIN
Operating junction temperature
Power dissipation
(3)
MAX
125
16
16
16
9
16
150
UNIT
°C
V
V
V
V
V
°C
−40
−0.3
2.1
−0.3
−0.3
−0.3
–65
Internally limited
Input supply voltage (survival)
Input supply voltage (operating)
Shutdown input voltage (survival)
Output voltage (survival)
(4)
I
OUT
(survival)
Input-output voltage (survival)
(5)
Storage temperature
(1)
(2)
(3)
Short-circuit protected
(4)
(5)
Stresses beyond those listed under
Absolute Maximum Ratings
may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under
Recommended
Operating Conditions.
Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
If Military/Aerospace-specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and
specifications.
The maximum allowable power dissipation is a function of the maximum junction temperature, T
J(MAX)
, the junction-to-ambient thermal
resistance, R
θJA
, and the ambient temperature, T
A
. The maximum allowable power dissipation at any ambient temperature is calculated
using P
(MAX)
= (T
J(MAX)
– T
A
) / R
θJA
. The value of R
θJA
for the SOT-23 package is 175.7°C/W. Exceeding the maximum allowable power
dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown.
If used in a dual-supply system where the regulator load is returned to a negative supply, the LP2980-N output must be diode-clamped
to ground.
The output PNP structure contains a diode between the IN and OUT pins that is normally reverse-biased. Reversing the polarity from
V
IN
to V
OUT
will turn on this diode (See
Reverse Current Path).
6.2 ESD Ratings
VALUE
V
(ESD)
(1)
Electrostatic
discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001
(1)
Pins 1, 2 and 5
Pins 3 and 4
±2000
±1000
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
Operating junction temperature
Input supply voltage (operating)
−40
2.1
MAX
125
16
UNIT
°C
V
4
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Copyright © 2000–2016, Texas Instruments Incorporated
LP2981-N
www.ti.com
SNOS773N – MARCH 2000 – REVISED APRIL 2016
6.4 Thermal Information
LP2981-N
THERMAL METRIC
R
θJA
R
θJC(top)
R
θJB
ψ
JT
ψ
JB
R
θJC(bot)
(1)
(1)
DBV (SOT-23)
5 PINS
175.7
78.0
30.8
2.8
30.3
N/A
UNIT
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
Junction-to-ambient thermal resistance, High-K
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
For more information about traditional and new thermal metrics, see the
Semiconductor and IC Package Thermal Metrics
application
report,
SPRA953.
6.5 Electrical Characteristics
Unless otherwise specified: T
J
= 25°C, V
IN
= V
O(NOM)
+ 1 V, I
L
= 1 mA, C
OUT
= 1
μF,
V
ON/OFF
= 2 V.
(1)
PARAMETER
TEST CONDITIONS
I
L
= 1 mA
ΔV
O
Output voltage
tolerance
1 mA < I
L
< 100 mA
1 mA < I
L
< 100 mA
–40°C
≤
T
J
≤
125°C
V
O(NOM)
+ 1 V
≤
V
IN
≤
16 V
V
O(NOM)
+ 1 V
≤
V
IN
≤
16 V
–40°C
≤
T
J
≤
125°C
I
L
= 0 mA
I
L
= 0 mA, –40°C
≤
T
J
≤
125°C
I
L
= 1 mA
V
IN
– V
O
Dropout voltage
(3)
I
L
= 1 mA, –40°C
≤
T
J
≤
125°C
I
L
= 25 mA
I
L
= 25 mA, –40°C
≤
T
J
≤
125°C
I
L
= 100 mA
I
L
= 100 mA, –40°C
≤
T
J
≤
125°C
I
L
= 0 mA
I
L
= 0 mA, –40°C
≤
T
J
≤
125°C
I
L
= 1 mA
I
L
= 1 mA, –40°C
≤
T
J
≤
125°C
I
L
= 25 mA
I
GND
Ground pin current
I
L
= 25 mA, –40°C
≤
T
J
≤
125°C
I
L
= 100 mA
I
L
= 100 mA, –40°C
≤
T
J
≤
125°C
V
ON/OFF
< 0.3 V
V
ON/OFF
< 0.15 V
–40°C
≤
T
J
≤
125°C
0.01
0.05
600
200
80
65
200
70
7
1
LP2981AI-XX
(2)
MIN
−0.75
−1
−2.5
0.007
TYP
MAX
0.75
1
2.5
0.014
0.032
3
5
10
15
100
150
250
375
95
125
110
170
300
550
800
1500
0.8
2
0.01
0.05
600
200
80
65
200
70
7
1
LP2981I-XX
(2)
MIN
−1.25
−2
−3.5
0.007
TYP
MAX
1.25
2
3.5
0.014
0.032
3
5
10
15
100
150
250
375
95
125
110
170
300
550
800
1500
0.8
2
μA
mV
%/V
%V
NOM
UNIT
ΔV
O
/ΔV
IN
Output voltage line
regulation
(1)
(2)
(3)
Minimum and maximum limits are ensured through test, design, or statistical correlation over the junction temperature (T
J
) range of
–40°C to 125°C, unless otherwise stated. Typical values represent the most likely parametric norm at T
A
= 25°C, and are provided for
reference purposes only.
Limits are 100% production tested at 25°C. Limits over the operating temperature range are ensured through correlation using Statistical
Quality Control (SQC) methods. The limits are used to calculate Average Outgoing Quality Level (AOQL).
Dropout voltage is defined as the input to output differential at which the output voltage drops 100 mV below the value measured with a
1-V differential.
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