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Single-Channel: 6N137, HCPL2601, HCPL2611 Dual-Channel: HCPL2630, HCPL2631 — High Speed 10MBit/s Logic Gate Optocouplers
January 2011
Single-Channel: 6N137, HCPL2601, HCPL2611
Dual-Channel: HCPL2630, HCPL2631
High Speed 10MBit/s Logic Gate Optocouplers
Features
■
Very high speed – 10 MBit/s
■
Superior CMR – 10 kV/µs
■
■
■
■
Description
The 6N137, HCPL2601, HCPL2611 single-channel and
HCPL2630, HCPL2631 dual-channel optocouplers
consist of a 850 nm AlGaAS LED, optically coupled to a
very high speed integrated photo-detector logic gate with
a strobable output. This output features an open collec-
tor, thereby permitting wired OR outputs. The coupled
parameters are guaranteed over the temperature range
of -40°C to +85°C. A maximum input signal of 5mA will
provide a minimum output sink current of 13mA (fan out
of 8).
An internal noise shield provides superior common
mode rejection of typically 10kV/µs. The HCPL2601 and
HCPL2631 has a minimum CMR of 5kV/µs. The
HCPL2611 has a minimum CMR of 10kV/µs.
Double working voltage-480V
Fan-out of 8 over -40°C to +85°C
Logic gate output
Strobable output
■
Wired OR-open collector
■
U.L. recognized (File # E90700)
Applications
■
Ground loop elimination
■
LSTTL to TTL, LSTTL or 5-volt CMOS
■
Line receiver, data transmission
■
Data multiplexing
■
Switching power supplies
■
Pulse transformer replacement
■
Computer-peripheral interface
Schematics
Package Outlines
N/C 1
8 V
CC
8
+ 1
V
F1
8 V
CC
1
+ 2
V
F
_
3
7 V
E
_ 2
7 V
01
8
6 V
O
_
V
3
6 V
02
8
1
1
F2
N/C 4
5 GND
+ 4
5 GND
Truth Table
(Positive Logic)
Input
H
Enable
H
H
L
L
NC
NC
Output
L
H
H
H
L
H
www.fairchildsemi.com
6N137
HCPL2601
HCPL2611
HCPL2630
HCPL2631
L
H
L
H
L
A 0.1µF bypass capacitor must be connected between pins 8 and 5
(1)
.
©2005 Fairchild Semiconductor Corporation
6N137, HCPL2601, HCPL2611, HCPL2630, HCPL2631 Rev. 1.0.8
Single-Channel: 6N137, HCPL2601, HCPL2611 Dual-Channel: HCPL2630, HCPL2631 — High Speed 10MBit/s Logic Gate Optocouplers
Absolute Maximum Ratings
(T
A
= 25°C unless otherwise specified)
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
T
STG
T
OPR
T
SOL
EMITTER
I
F
V
E
V
R
P
I
DETECTOR
Supply Voltage
V
CC
(1 minute max)
I
O
V
O
P
O
Output Current
Output Voltage
Collector Output
Power Dissipation
DC/Average Forward
Input Current
Storage Temperature
Operating Temperature
Parameter
Value
-55 to +125
-40 to +85
260 for 10 sec
50
30
5.5
5.0
100
45
7.0
Units
°C
°C
°C
mA
V
V
mW
Lead Solder Temperature (for wave soldering only)*
Single Channel
Dual Channel (Each Channel)
Single Channel
Each Channel
Single Channel
Dual Channel (Each Channel)
Enable Input Voltage Not to Exceed
V
CC
by more than 500mV
Reverse Input Voltage
Power Dissipation
V
mA
V
mW
Single Channel
Dual Channel (Each Channel)
Each Channel
Single Channel
Dual Channel (Each Channel)
50
50
7.0
85
60
*For peak soldering reflow, please refer to the Reflow Profile on page 11.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol
I
FL
I
FH
V
CC
V
EL
V
EH
T
A
N
Parameter
Input Current, Low Level
Input Current, High Level
Supply Voltage, Output
Enable Voltage, Low Level
Enable Voltage, High Level
Low Level Supply Current
Fan Out (TTL load)
Min.
0
*6.3
4.5
0
2.0
-40
Max.
250
15
5.5
0.8
V
CC
+85
8
Units
µA
mA
V
V
V
°C
*6.3mA is a guard banded value which allows for at least 20% CTR degradation. Initial input current threshold value
is 5.0mA or less.
©2005 Fairchild Semiconductor Corporation
6N137, HCPL2601, HCPL2611, HCPL2630, HCPL2631 Rev. 1.0.8
www.fairchildsemi.com
2
Single-Channel: 6N137, HCPL2601, HCPL2611 Dual-Channel: HCPL2630, HCPL2631 — High Speed 10MBit/s Logic Gate Optocouplers
Electrical Characteristics
(T
A
= 0 to 70°C unless otherwise specified)
Individual Component Characteristics
Symbol
EMITTER
V
F
B
VR
C
IN
∆
V
F
/
∆
T
A
DETECTOR
I
CCH
I
CCL
High Level Supply Current
Low Level Supply Current
V
CC
= 5.5V, I
F
= 0mA,
V
E
= 0.5V
Single Channel
Dual Channel
I
EL
I
EH
V
EH
V
EL
Low Level Enable Current
High Level Enable Current
High Level Enable Voltage
Low Level Enable Voltage
V
CC
= 5.5V, V
E
= 0.5V
V
CC
= 5.5V, V
E
= 2.0V
V
CC
= 5.5V, I
F
= 10mA
V
CC
= 5.5V, I
F
= 10mA
(3)
2.0
0.8
Single Channel
Dual Channel
V
CC
= 5.5V,
I
F
= 10mA
V
E
= 0.5V
7
10
9
14
-0.8
-0.6
10
15
13
21
-1.6
-1.6
mA
mA
V
V
mA
mA
Input Forward Voltage
Input Reverse Breakdown
Voltage
Input Capacitance
Input Diode Temperature
Coefficient
I
F
= 10mA
T
A
= 25°C
I
R
= 10µA
V
F
= 0, f = 1MHz
I
F
= 10mA
5.0
60
-1.4
1.4
1.8
1.75
V
pF
mV/°C
V
Parameter
Test Conditions
Min.
Typ.*
Max.
Unit
Switching Characteristics
(T
A
= -40°C to +85°C, V
CC
= 5V, I
F
= 7.5mA unless otherwise specified)
Symbol
T
PLH
AC Characteristics
Propagation Delay
Time to Output HIGH
Level
Propagation Delay
Time to Output LOW
Level
Output Rise Time
(10–90%)
Output Rise Time
(90–10%)
Enable Propagation
Delay Time to Output
HIGH Level
Enable Propagation
Delay Time to Output
LOW Level
Common Mode
Transient Immunity
(at Output HIGH Level)
Test Conditions
R
L
= 350
Ω
,
C
L
= 15pF
(4)
(Fig. 12)
T
A
= 25°C
(5)
R
L
= 350
Ω
, C
L
= 15pF (Fig. 12)
(R
L
= 350
Ω
, C
L
= 15pF (Fig. 12)
R
L
= 350
Ω
, C
L
= 15pF
(6)
(Fig. 12)
R
L
= 350
Ω
, C
L
= 15pF
(7)
(Fig. 12)
I
F
= 7.5mA, V
EH
= 3.5V, R
L
= 350
Ω
, C
L
= 15pF
(8)
(Fig. 13)
I
F
= 7.5mA, V
EH
= 3.5V, R
L
= 350Ω, C
L
= 15pF
(9)
(Fig. 13)
T
A
= 25°C, |V
CM
| = 50V 6N137, HCPL2630
(Peak), I
F
= 0mA,
HCPL2601, HCPL2631
V
OH
(Min.) = 2.0V,
R
L
= 350Ω
(10)
(Fig. 14)
|V
CM
| = 400V
HCPL2611
R
L
= 350Ω, I
F
= 7.5mA, 6N137, HCPL2630
V
OL
(Max.) = 0.8V,
HCPL2601, HCPL2631
T
A
= 25°C
(11)
(Fig. 14)
|V
CM
| = 400V
HCPL2611
T
A
= 25°C
Min.
20
Typ.*
45
Max. Unit
75
100
ns
T
PHL
25
45
75
100
ns
|T
PHL
–T
PLH
| Pulse Width Distortion
t
r
t
f
t
ELH
3
50
12
20
35
ns
ns
ns
ns
t
EHL
20
ns
|CM
H
|
10,000
5000
10,000
V/µs
10,000
5000
10,000
15,000
10,000
10,000
15,000
V/µs
|CM
L
|
Common Mode
Transient Immunity
(at Output LOW Level)
©2005 Fairchild Semiconductor Corporation
6N137, HCPL2601, HCPL2611, HCPL2630, HCPL2631 Rev. 1.0.8
www.fairchildsemi.com
3
Single-Channel: 6N137, HCPL2601, HCPL2611 Dual-Channel: HCPL2630, HCPL2631 — High Speed 10MBit/s Logic Gate Optocouplers
Electrical Characteristics
(Continued)
Transfer Characteristics
(T
A
= -40 to +85°C unless otherwise specified)
Symbol
I
OH
V
OL
I
FT
DC Characteristics
HIGH Level Output Current
LOW Level Output Current
Input Threshold Current
Test Conditions
V
CC
= 5.5V, V
O
= 5.5V,
I
F
= 250µA, V
E
= 2.0V
(2)
V
CC
= 5.5V, I
F
= 5mA, V
E
= 2.0V,
I
CL
= 13mA
(2)
V
CC
= 5.5V, V
O
= 0.6V, V
E
= 2.0V,
I
OL
= 13mA
Min.
Typ.*
Max.
100
Unit
µA
V
mA
.35
3
0.6
5
Isolation Characteristics
(T
A
= -40°C to +85°C unless otherwise specified.)
Symbol
I
I-O
Characteristics
Input-Output Insulation
Leakage Current
Withstand Insulation Test
Voltage
Resistance (Input to Output)
Capacitance (Input to Output)
Test Conditions
Relative humidity = 45%,
T
A
= 25°C, t = 5s,
V
I-O
= 3000 VDC
(12)
RH < 50%, T
A
= 25°C,
I
I-O
≤
2µA, t = 1 min.
(12)
V
I-O
= 500V
(12)
f = 1MHz
(12)
Min.
Typ.*
Max.
1.0*
Unit
µA
V
ISO
R
I-O
C
I-O
2500
10
12
0.6
V
RMS
Ω
pF
*All Typicals at V
CC
= 5V, T
A
= 25°C
Notes:
1. The V
CC
supply to each optoisolator must be bypassed by a 0.1µF capacitor or larger. This can be either a ceramic
or solid tantalum capacitor with good high frequency characteristic and should be connected as close as possible
to the package V
CC
and GND pins of each device.
2. Each channel.
3. Enable Input – No pull up resistor required as the device has an internal pull up resistor.
4. t
PLH
– Propagation delay is measured from the 3.75mA level on the HIGH to LOW transition of the input current
pulse to the 1.5 V level on the LOW to HIGH transition of the output voltage pulse.
5. t
PHL
– Propagation delay is measured from the 3.75mA level on the LOW to HIGH transition of the input current
pulse to the 1.5 V level on the HIGH to LOW transition of the output voltage pulse.
6. t
r
– Rise time is measured from the 90% to the 10% levels on the LOW to HIGH transition of the output pulse.
7. t
f
– Fall time is measured from the 10% to the 90% levels on the HIGH to LOW transition of the output pulse.
8. t
ELH
– Enable input propagation delay is measured from the 1.5V level on the HIGH to LOW transition of the input
voltage pulse to the 1.5V level on the LOW to HIGH transition of the output voltage pulse.
9. t
EHL
– Enable input propagation delay is measured from the 1.5V level on the LOW to HIGH transition of the input
voltage pulse to the 1.5V level on the HIGH to LOW transition of the output voltage pulse.
10. CM
H
– The maximum tolerable rate of rise of the common mode voltage to ensure the output will remain in the
HIGH state (i.e., V
OUT
> 2.0V). Measured in volts per microsecond (V/µs).
11. CM
L
– The maximum tolerable rate of rise of the common mode voltage to ensure the output will remain in the
LOW output state (i.e., V
OUT
< 0.8V). Measured in volts per microsecond (V/µs).
12. Device considered a two-terminal device: Pins 1, 2, 3 and 4 shorted together, and Pins 5, 6, 7 and 8 shorted
together.
©2005 Fairchild Semiconductor Corporation
6N137, HCPL2601, HCPL2611, HCPL2630, HCPL2631 Rev. 1.0.8
www.fairchildsemi.com
4
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