DATA SHEET
MOS INTEGRATED CIRCUIT
µ
PD77015,77017,77018
16 bits, Fixed-point Digital Signal Processor
µ
PD77015, 77017, 77018 are 16 bits fixed-point DSPs (Digital Signal Processors) developed for digital signal
processing with its demand for high speed and precision.
FEATURES
•
FUNCTIONS
• Instruction cycle: 30 ns (MIN.)
Operation clock: 33 MHz
External clock: 33, 16.5, 8.25, 4.125 MHz
Crystal: 33 MHz
• On-chip PLL to provide higher operation clock than the external clock
• Dual load/store
• Hardware loop function
• Conditional execution
• Executes product-sum operation in one instruction cycle
•
PROGRAMMING
• 16 bits
×
16 bits + 40 bits
→
40 bits multiply accumulator
• 8 general registers (40 bits each)
• 8 ROM/RAM data pointer: each data memory area has 4 registers
• 10 source interrupts (external: 4, internal: 6)
• 3 operand instructions (example: R0 = R0 +R1L∗R2L)
• Nonpipeline on execution stage
•
MEMORY AREAS
• Instruction memory area : 64K words
×
32 bits
• Data memory areas : 64K words
×
16 bits
×
2 (X memory, Y memory)
•
CLOCK GENERATOR
• Mask option for CLKOUT pin:
Fixed to the low level.
Does not output the internal system clock.
• Selectable source clock: external clock input and crystal resonator
[External clock]
On-chip PLL to provide higher operation clock (33 MHz MAX.) than the external clock.
Variable multiple rates (1, 2, 4, 8) by mask option.
[Crystal resonator]
Oscillation frequency corresponds directly to the system clock frequency (Sure to specify the mask option
frequency multiple as "1").
In this document, all descriptions of the
µ
PD77017 also apply to the
µ
PD77015 and
µ
PD77018, unless
otherwise specified.
The information in this document is subject to change without notice.
Document No. U10902EJ3V0DS00 (3rd edition)
Date Published June 1997 N
Printed in Japan
The mark
shows major revised points.
©
1993, 1994
µ
PD77015, 77017, 77018
•
ON-CHIP PERIPHERAL
• I/O port: 4 bits
• Serial I/O (16 bits): 2 channels
• Host I/O (8 bits): 1 channel
•
CMOS
•
+3 V single power supply
ORDERING INFORMATION
Part Number
Package
100-pin plastic TQFP (FINE PITCH) (14
×
14 mm)
100-pin plastic TQFP (FINE PITCH) (14
×
14 mm)
100-pin plastic TQFP (FINE PITCH) (14
×
14 mm)
µ
PD77015GC-×××-9EU
µ
PD77017GC-×××-9EU
µ
PD77018GC-×××-9EU
Remark
×××
indicates a code suffix.
2
BLOCK DIAGRAM
X–Bus
External
Memory
Y–Bus
Serial
I/O #1
X Memory
Data
Pointers
X Memory
Y Memory
Data
Pointers
Y Memory
R0–R7
Serial
I/O #2
Main Bus
ALU (40)
Ports
Loop
Control
Stack
Instruction
Memory
MPY
16×16+40
→
40
PC Stack
Interrupt
Control
Host I/O
µ
PD77015, 77017, 77018
CPU Control
Wait
Controller
INT1 – INT4
WAIT RESET CLKOUT
X1 X2
IE I/O
3
µ
PD77015, 77017, 77018
FUNCTIONAL PIN GROUPS
+3 V
SO1
SORQ1
SOEN1
Serial Interface #1
SCK1
SI1
SIEN1
SIAK1
SO2
SOEN2
SCK2
SI2
SIEN2
Ports
P0 - P3
HCS
HA0, HA1
HRD
HRE
HWR
HWE
HD0 - HD7
V
DD
RESET
INT1
INT2
INT3
INT4
X1
X2
CLKOUT
TDO, TICE
TCK, TDI, TMS
HOLDRQ
BSTB
HOLDAK
X/Y
DA0 - DA13
D0 - D15
WAIT
MRD
MWR
(14)
(16)
Interrupts
Serial Interface #2
(2)
(3)
Debugging
Interface
(4)
Data Bus
Control
(2)
Host Interface
External
Data
Memory
(8)
GND
4
Functional Differences among the
µ
PD7701× Family
Item
Internal instruction RAM
Internal instruction ROM
External instruction memory
Data RAM (X/Y memory)
Data ROM (X/Y memory)
External data memory
Instruction cycle
(Maximum operation speed)
External clock
(at maximum operation speed)
Crystal
(at maximum operation speed)
Instruction
Serial interface (2 Channels)
66 MHz
µ
PD77016
1.5K words
None
48K words
2K words each
None
48K words each
µ
PD77015
µ
PD77017
256 words
µ
PD77018
µ
PD77018A
µ
PD77019
4K words
4K words
12K words
None
24K words
1K words each
2K words each
2K words each
4K words each
16K words each
3K words each
12K words each
30 ns (33 MHz)
33/16.5/8.25/4.125 MHz
Variable multiple rate (1, 2, 4, 8 ) by mask option.
19 ns (52 MHz)
52/ 26/ 17.333/ 13/6.5 MHz
Variable multiple rate (1, 2, 3, 4, 8 ) by
mask option.
52 MHz
STOP instruction is added.
–
–
Channel 1 has the
same functions
as channel 2.
5V
160-pin plastic QFP
33 MHz
Channel 1 has the same functions as that of the
µ
PD77016.
Channel 2 has no SORQ2 or SIAK2 pin (Channel 2 is used for CODEC connection).
3V
Power supply
Package
µ
PD77015, 77017, 77018
100-pin plastic TQFP
5
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