NXP Semiconductors
Data Sheet: Technical Data
Document Number: MPC5606B
Rev. 5, 11/2017
MPC5606BK
100 LQFP
14 mm x 14 mm
144 LQFP
20 mm x 20 mm
MPC5606BK Microcontroller
Data Sheet
1
1.1
176 LQFP
24 mm x 24 mm
Introduction
Document overview
1
This document describes the features of the family and
options available within the family members, and highlights
important electrical and physical characteristics of the device.
2
3
1.2
Description
This family of 32-bit system-on-chip (SoC) microcontrollers
is the latest achievement in integrated automotive application
controllers. It belongs to an expanding family of
automotive-focused products designed to address the next
wave of body electronics applications within the vehicle.
The advanced and cost-efficient e200z0 host processor core of
this automotive controller family complies with the Power
Architecture
®
technology and only implements the VLE
(variable-length encoding) APU (Auxiliary Processor Unit),
providing improved code density. It operates at speeds of up
to 64 MHz and offers high performance processing optimized
for low power consumption. It capitalizes on the available
development infrastructure of current Power Architecture
devices and is supported with software drivers, operating
systems and configuration code to assist with users
implementations.
4
5
6
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 Document overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.3 Device comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.4 Block diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Package pinouts and signal descriptions . . . . . . . . . . . . . . . . . . 4
2.1 Package pinouts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.2 Pin muxing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.1 Parameter classification . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.2 NVUSRO register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
3.3 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . 27
3.4 Recommended operating conditions . . . . . . . . . . . . . . . 28
3.5 Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 31
3.6 I/O pad electrical characteristics . . . . . . . . . . . . . . . . . . 33
3.7 RESET electrical characteristics . . . . . . . . . . . . . . . . . . 45
3.8 Power management electrical characteristics . . . . . . . . 48
3.9 Power consumption in different application modes . . . . 53
3.10 Flash memory electrical characteristics . . . . . . . . . . . . . 54
3.11 Electromagnetic compatibility (EMC) characteristics . . . 56
3.12 Fast external crystal oscillator (4 to 16 MHz) electrical
characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
3.13 Slow external crystal oscillator (32 kHz) electrical
characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
3.14 FMPLL electrical characteristics. . . . . . . . . . . . . . . . . . . 63
3.15 Fast internal RC oscillator (16 MHz) electrical
characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
3.16 Slow internal RC oscillator (128 kHz) electrical
characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
3.17 ADC electrical characteristics. . . . . . . . . . . . . . . . . . . . . 66
3.18 On-chip peripherals . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
Package characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
4.1 Package mechanical data. . . . . . . . . . . . . . . . . . . . . . . . 85
Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
NXP reserves the right to change the production detail specifications as may be
required to permit improvements in the design of its products.
1.3
Device comparison
Table 1. MPC5606BK family comparison
1
Feature
MPC5605BK
100 LQFP
144 LQFP
176 LQFP
100 LQFP
MPC5606BK
144 LQFP
176 LQFP
Table 1
summarizes the functions of the blocks present on the MPC5606BK.
Package
CPU
Execution speed
2
Code flash memory
Data flash memory
SRAM
MPU
eDMA
10-bit ADC
dedicated
3
shared with 12-bit ADC
12-bit ADC
dedicated
4
shared with 10-bit ADC
Total timer I/O
5
eMIOS
Counter / OPWM / ICOC
6
O(I)PWM / OPWFMB / OPWMCB / ICOC
7
O(I)PWM / ICOC
8
OPWM / ICOC
9
SCI (LINFlex)
SPI (DSPI)
CAN (FlexCAN)
I
2
C
32 KHz oscillator
GPIO
10
Debug
1
2
e200z0h
Up to 64 MHz
768 KB
64 (4 x 16) KB
64 KB
8-entry
16 ch
Yes
7 ch
15 ch
29 ch
19 ch
Yes
5 ch
19 ch
37 ch,
16-bit
64 ch,
16-bit
10 ch
7 ch
7 ch
13 ch
4
3
6
5
8
6
6
1
Yes
77
121
149
JTAG
77
121
149
14 ch
33 ch
4
3
6
5
8
6
37 ch,
16-bit
64 ch,
16-bit
7 ch
15 ch
29 ch
80 KB
1 MB
Feature set dependent on selected peripheral multiplexing; table shows example.
Based on 125
°C
ambient operating temperature.
3
Not shared with 12-bit ADC, but possibly shared with other alternate functions.
4
Not shared with 10-bit ADC, but possibly shared with other alternate functions.
5
Refer to eMIOS section of device reference manual for information on the channel configuration and functions.
6
Each channel supports a range of modes including Modulus counters, PWM generation, Input Capture, Output Compare.
7
Each channel supports a range of modes including PWM generation with dead time, Input Capture, Output Compare.
8
Each channel supports a range of modes including PWM generation, Input Capture, Output Compare, Period and Pulse width
measurement.
9
Each channel supports a range of modes including PWM generation, Input Capture, and Output Compare.
10
Maximum I/O count based on multiplexing with peripherals.
MPC5606BK Microcontroller Data Sheet, Rev. 5
2
NXP Semiconductors
1.4
Block diagram
SRAM
80 KB
Code Flash Data Flash
1.0 MB
64 KB
Figure 1
shows a top-level block diagram of the MPC5606BK.
JTAG
JTAG Port
eDMA
(Master)
Instructions
e200z0h
(Master)
Data
(Master)
64-bit 3 × 3 Crossbar Switch
SRAM
Controller
MPU
Flash memory
controller
NMI
SIUL
Voltage
Regulator
NMI
Interrupt requests
from peripheral
blocks
INTC
Clocks
FMPLL
CMU
(Slave)
(Slave)
(Slave)
Interrupt
request with
wakeup
functionality
WKPU
MPU
Registers
RTC
STM
SWT
ECSM
PIT
MC_RGM MC_CGM
MC_ME MC_PCU
BAM
SSCM
Peripheral Bridge
Interrupt
Request
SIUL
Reset Control
External
Interrupt
Request
IMUX
GPIO &
Pad Control
19 ch 10-bit/12-bit
ADC
29 ch 10-bit
ADC
CTU
64 ch
eMIOS
8x
LINFlex
6x
DSPI
I
2
C
6x
FlexCAN
5 ch 12-bit
ADC
I/O
Legend:
ADC
BAM
FlexCAN
CFlash
CMU
CTU
DFlash
DSPI
eDMA
eMIOS
FMPLL
I
2
C
IMUX
INTC
JTAG
...
...
...
...
...
Analog-to-Digital Converter
Boot Assist Module
Controller Area Network
Code flash memory
Clock Monitor Unit
Cross Triggering Unit
Data flash memory
Deserial Serial Peripheral Interface
Enhanced Direct Memory Access
Enhanced Modular Input Output System
Frequency-Modulated Phase-Locked Loop
Inter-integrated Circuit Bus
Internal Multiplexer
Interrupt Controller
JTAG controller
LINFlex
MC_CGM
MC_ME
MPU
NMI
MC_PCU
MC_RGM
PIT
RTC
SIUL
SRAM
SSCM
STM
SWT
WKPU
Serial Communication Interface (LIN support)
Clock Generation Module
Mode Entry Module
Memory Protection Unit
Non-Maskable Interrupt
Power Control Unit
Reset Generation Module
Periodic Interrupt Timer
Real-Time Clock
System Integration Unit Lite
Static Random-Access Memory
System Status Configuration Module
System Timer Module
Software Watchdog Timer
Wakeup Unit
Figure 1. MPC5606BK block diagram
MPC5606BK Microcontroller Data Sheet, Rev. 5
NXP Semiconductors
3
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