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AD7701BNZ

产品描述16-Bit Sigma-Delta ADC
产品类别模拟混合信号IC    转换器   
文件大小347KB,共21页
制造商ADI(亚德诺半导体)
官网地址https://www.analog.com
标准
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AD7701BNZ概述

16-Bit Sigma-Delta ADC

AD7701BNZ规格参数

参数名称属性值
Brand NameAnalog Devices Inc
是否无铅含铅
是否Rohs认证符合
厂商名称ADI(亚德诺半导体)
零件包装代码DIP
包装说明DIP,
针数20
制造商包装代码N-20
Reach Compliance Codecompliant
ECCN代码EAR99
Samacsys DescriptionAD7701BNZ, 16 bit ADC, Serial, 20-Pin PDIP
最大模拟输入电压2.5 V
最小模拟输入电压-2.5 V
转换器类型ADC, DELTA-SIGMA
JESD-30 代码R-PDIP-T20
JESD-609代码e3
长度25.2 mm
最大线性误差 (EL)0.0015%
标称负供电电压-5 V
模拟输入通道数量1
位数16
功能数量1
端子数量20
最高工作温度85 °C
最低工作温度-40 °C
输出位码BINARY, OFFSET BINARY
输出格式SERIAL
封装主体材料PLASTIC/EPOXY
封装代码DIP
封装形状RECTANGULAR
封装形式IN-LINE
峰值回流温度(摄氏度)NOT APPLICABLE
认证状态Not Qualified
采样速率0.016 MHz
采样并保持/跟踪并保持SAMPLE
座面最大高度5.33 mm
标称供电电压5 V
表面贴装NO
技术CMOS
温度等级INDUSTRIAL
端子面层Matte Tin (Sn)
端子形式THROUGH-HOLE
端子节距2.54 mm
端子位置DUAL
处于峰值回流温度下的最长时间NOT APPLICABLE
宽度7.62 mm

AD7701BNZ文档预览

LC MOS
16-Bit A/D Converter
AD7701
FEATURES
Monolithic 16-Bit ADC
0.0015% Linearity Error
On-Chip Self-Calibration Circuitry
Programmable Low-Pass Filter
0.1 Hz to 10 Hz Corner Frequency
0 V to +2.5 V or 2.5 V Analog Input Range
4 kSPS Output Data Rate
Flexible Serial Interface
Ultralow Power
APPLICATIONS
Industrial Process Control
Weigh Scales
Portable Instrumentation
Remote Data Acquisition
FUNCTIONAL BLOCK DIAGRAM
AV
DD
14
DV
DD
AV
SS
DV
SS
15
7
6
SC1
4
SC2
17
2
AD7701
CALIBRATION
SRAM
CALIBRATION
MICROCONTROLLER
13 CAL
A
IN
9
16-BIT A/D CONVERTER
12 BP/UP
ANALOG
MODULATOR
6-POLE GAUSSIAN
LOW-PASS
DIGITAL FILTER
V
REF
10
11
SLEEP
AGND
8
CLOCK
GENERATOR
SERIAL INTERFACE
LOGIC
20 SDATA
19 SCLK
DGND
5
3
CLKIN
2
CLKOUT
1
MODE
16
CS
18
DRDY
GENERAL DESCRIPTION
PRODUCT HIGHLIGHTS
The AD7701 is a 16-bit ADC that uses a sigma-delta conversion
technique. The analog input is continuously sampled by an analog
modulator whose mean output duty cycle is proportional to the
input signal. The modulator output is processed by an on-chip
digital filter with a six-pole Gaussian response, which updates
the output data register with 16-bit binary words at word rates up
to 4 kHz. The sampling rate, filter corner frequency, and output
word rate are set by a master clock input that may be supplied
externally, or by a crystal controlled on-chip clock oscillator.
The inherent linearity of the ADC is excellent and endpoint
accuracy is ensured by self-calibration of zero and full scale,
which may be initiated at any time. The self-calibration scheme
can also be extended to null system offset and gain errors in the
input channel.
The output data is accessed through a flexible serial port, which
has an asynchronous mode compatible with UARTs and two
synchronous modes suitable for interfacing to shift registers or
the serial ports of industry-standard microcontrollers.
CMOS construction ensures low power dissipation, and a power-
down mode reduces the idle power consumption to only 10
µW.
1. The AD7701 offers 16-bit resolution coupled with outstand-
ing 0.0015% accuracy.
2. No missing codes ensures true, usable, 16-bit dynamic range,
removing the need for programmable gain and level-setting
circuitry.
3. The effects of temperature drift are eliminated by on-chip
self-calibration, which removes zero and gain error. External
circuits can also be included in the calibration loop to remove
system offsets and gain errors.
4. A flexible synchronous/asynchronous interface allows the
AD7701 to interface directly to UARTs or to the serial ports
of industry-standard microcontrollers.
5. Low operating power consumption and an ultralow power
standby mode make the AD7701 ideal for loop-powered
remote sensing applications, or battery-powered portable
instruments.
REV. E
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© 2003 Analog Devices, Inc. All rights reserved.
AD7701* PRODUCT PAGE QUICK LINKS
Last Content Update: 02/23/2017
COMPARABLE PARTS
View a parametric search of comparable parts.
DESIGN RESOURCES
AD7701 Material Declaration
PCN-PDN Information
Quality And Reliability
Symbols and Footprints
DOCUMENTATION
Application Notes
AN-368: Evaluation Board for the AD7701/AD7703 Sigma-
Delta ADCs
AN-375: ADM2xxL Family for RS-232 Communications
AN-607: Selecting a Low Bandwidth (<15 kSPS) Sigma-
Delta ADC
Data Sheet
AD7701: LC MOS 16-Bit A/D Converter Data Sheet
2
DISCUSSIONS
View all AD7701 EngineerZone Discussions.
SAMPLE AND BUY
Visit the product page to see pricing options.
TECHNICAL SUPPORT
TOOLS AND SIMULATIONS
Sigma-Delta ADC Tutorial
Submit a technical question or find your regional support
number.
REFERENCE MATERIALS
Technical Articles
Delta-Sigma Rocks RF, As ADC Designers Jump On Jitter
MS-2210: Designing Power Supplies for High Speed ADC
DOCUMENT FEEDBACK
Submit feedback for this data sheet.
This page is dynamically generated by Analog Devices, Inc., and inserted into this data sheet. A dynamic change to the content on this page will not
trigger a change to either the revision number or the content of the product data sheet. This dynamic page may be frequently modified.
= 25
= DV
V; AV = DV
–5 V;
AD7701–SPECIFICATIONS
1k (T with 1C;nFAVto AGND at = +5unless otherwise=noted.)V
Bipolar Mode: MODE = +5 V; A Source Resistance =
A ;
IN
A
1
DD
DD
SS
SS
IN
REF
= +2.5 V; f
CLKIN
= 4.096 MHz;
Test Conditions/Comments
Parameter
STATIC PERFORMANCE
Resolution
Integral Nonlinearity
T
MIN
to T
MAX
Differential Nonlinearity
T
MIN
to T
MAX
Positive Full-Scale Error
3
Full-Scale Drift
4
Unipolar Offset Error
3
Unipolar Offset Drift
4
Bipolar Zero Error
3
Bipolar Zero Drift
4
Bipolar Negative Full-Scale Error
3
Bipolar Negative Full-Scale Drift
4
Noise (Referred to Output)
DYNAMIC PERFORMANCE
Sampling Frequency, f
S
Output Update Rate, f
OUT
Filter Corner Frequency, f
–3 dB
Settling Time to
±
0.0007% FS
SYSTEM CALIBRATION
Positive Full-Scale Overrange
Positive Full-Scale Overrange
Negative Full-Scale Overrange
Maximum Offset Calibration Range
5, 6
Unipolar Input Range
Bipolar Input Range
Input Span
7
ANALOG INPUT
Unipolar Input Range
Bipolar Input Range
Input Capacitance
Input Bias Current
1
LOGIC INPUTS
All Inputs Except CLKIN
V
INL
, Input Low Voltage
V
INH
, Input High Voltage
CLKIN
V
INL
, Input Low Voltage
V
INH
, Input High Voltage
I
IN
, Input Current
LOGIC OUTPUTS
V
OL
, Output Low Voltage
V
OH
, Output High Voltage
Floating State Leakage Current
Floating State Output Capacitance
A, S Version
2
16
B, T Version
2
16
±
0.0007
±
0.0015
±
0.125
±
0.5
±
0.13
±
0.5
±
1.2 (± 2.3 T Version)
±
0.25
±
1
±
1.6 (+3/–25 T Version)
±
0.25
±
1
±
0.8 (+1.5/–12.5 T Version)
±
0.5
±
2
±
0.6 (± 1.2 T Version)
0.1
f
CLKIN
/256
f
CLKIN
/1024
f
CLKIN
/409,600
507904/f
CLKIN
V
REF
+ 0.1
V
REF
+ 0.1
–(V
REF
+ 0.1)
–(V
REF
+ 0.1)
–0.4 V
REF
to +0.4 V
REF
0.8 V
REF
2 V
REF
+ 0.2
0 to 2.5
±
2.5
10
1
Unit
Bits
% FSR typ
% FSR max
LSB typ
LSB max
LSB typ
LSB max
LSB typ
LSB typ
LSB max
LSB typ
LSB typ
LSB max
LSB typ
LSB typ
LSB max
LSB typ
LSB rms typ
Hz
Hz
Hz
sec
V max
V max
V max
V max
V max
V min
V max
V
V
pF typ
nA typ
±
0.003
±
0.125
±
0.5
±
0.13
±
0.5
±
1.2 (± 2.3 S Version)
±
0.25
±
1
±
1.6 (+3/–25 S Version)
±
0.25
±
1
±
0.8 (+1.5/–12.5 S Version)
±
0.5
±
2
±
0.6 (± 1.2 S Version)
0.1
f
CLKIN
/256
f
CLKIN
/1024
f
CLKIN
/409,600
507904/f
CLKIN
V
REF
+ 0.1
V
REF
+ 0.1
–(V
REF
+ 0.1)
–(V
REF
+ 0.1)
–0.4 V
REF
to +0.4 V
REF
0.8 V
REF
2 V
REF
+ 0.2
0 to 2.5
±
2.5
10
1
Guaranteed No Missing Codes
For Full-Scale Input Step
Applies to unipolar and
bipolar ranges. After cali-
bration, if A
IN
> V
REF
, the
device will output all 1s.
If A
IN
< 0 (unipolar) or
–V
REF
(bipolar), the device
will output all 0s.
0.8
2.0
0.8
3.5
10
0.4
DV
DD
– 1
±
10
9
0.8
2.0
0.8
3.5
10
0.4
DV
DD
– 1
±
10
9
V max
V min
V max
V min
µA
max
V max
V min
µA
max
pF typ
I
SINK
= 1.6 mA
I
SOURCE
= 100
µA
–2–
REV. E
AD7701
Parameter
POWER REQUIREMENTS
8
Power Supply Voltages
Analog Positive Supply (AV
DD
)
Digital Positive Supply (DV
DD
)
Analog Negative Supply (AV
SS
)
Digital Negative Supply (DV
SS
)
Calibration Memory Retention
Power Supply Voltage
DC Power Supply Currents
8
Analog Positive Supply (AI
DD
)
Digital Positive Supply (DI
DD
)
Analog Negative Supply (AI
SS
)
Digital Negative Supply (DI
SS
)
Power Supply Rejection
9
Positive Supplies
Negative Supplies
Power Dissipation
Normal Operation
Standby Operation
10
A, S Version
2
B, T Version
2
Unit
Test Conditions/Comments
4.5/5.5
4.5/AV
DD
–4.5/–5.5
–4.5/–5.5
2.0
2.7
2
2.7
0.1
70
75
37
20 (40 S Version)
4.5/5.5
4.5/AV
DD
–4.5/–5.5
–4.5/–5.5
2.0
2.7
2
2.7
0.1
70
75
37
20 (40 T Version)
V min/V max
V min/V max
V min/V max
V min/V max
V min
mA max
mA max
mA max
mA max
dB typ
dB typ
mW max
µW
max
SLEEP
= Logic 1,
Typically 25 mW
SLEEP
= Logic 0,
Typically 10
µW
Typically 2 mA
Typically 1 mA
Typically 2 mA
Typically 0.03 mA
NOTES
1
The A
IN
pin presents a very high impedance dynamic load that varies with clock frequency.
2
Temperature ranges are as follows: A, B Versions: –40°C to +85°C; S, T Versions: –55°C to +125°C.
3
Apply after calibration at the temperature of interest. Full-scale error applies for both unipolar and bipolar input ranges.
4
Total drift over the specified temperature range since calibration at power-up at 25
°C.
This is guaranteed by design and/or characterization. Recalibration at
any temperature will remove these errors.
5
In Unipolar mode, the offset can have a negative value (–V
REF
) such that the Unipolar mode can mimic Bipolar mode operation.
6
The specifications for input overrange and for input span apply additional constraints on the offset calibration range.
7
For Unipolar mode, input span is the difference between full scale and zero scale. For Bipolar mode, input span is the difference between positive and
negative full-scale points. When using less than the maximum input span, the span range may be placed anywhere within the range of
±
(V
REF
+0.1).
8
All digital outputs unloaded. All digital inputs at 5 V CMOS levels.
9
Applies in 0.1 Hz to 10 Hz bandwidth. PSRR at 60 Hz will exceed 120 dB due to the digital filter.
10
CLKIN is stopped. All digital inputs are grounded.
Specifications subject to change without notice.
REV. E
–3–
AD7701
ABSOLUTE MAXIMUM RATINGS
1
(T
A
= 25°C, unless otherwise noted.)
DV
DD
to AGND . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +6 V
DV
DD
to AV
DD
. . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +0.3 V
DV
SS
to AGND . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V to –6 V
AV
DD
to AGND . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +6 V
AV
SS
to AGND . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V to –6 V
AGND to DGND . . . . . . . . . . . . . . . . . . . . . –0.3 V to +0.3 V
Digital Input Voltage to DGND . . . . –0.3 V to DV
DD
+ 0.3 V
Analog Input
Voltage to AGND . . . . . . . . AV
SS
– 0.3 V to AV
DD
+ 0.3 V
Input Current to Any Pin Except Supplies
2
. . . . . . . .
±
10 mA
Operating Temperature Range
Commercial Plastic (A, B Versions) . . . . . –40°C to +85°C
Industrial CERDIP (A, B Versions) . . . . . . –40°C to +85°C
Extended CERDIP (S, T Versions) . . . . . –55°C to +125°C
Storage Temperature Range. . . . . . . . . . . . . –65°C to +150°C
Lead Temperature (Soldering, 10 secs) . . . . . . . . . . . . . 300°C
Power Dissipation (Any Package) to 75°C . . . . . . . . . 450 mW
Derates above 75°C by . . . . . . . . . . . . . . . . . . . . . 10 mW/°C
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
2
Transient currents of up to 100 mA will not cause SCR latch-up.
ORDERING GUIDE
Model
AD7701AN
AD7701BN
AD7701AR
AD7701BR
AD7701ARS
AD7701AQ
AD7701BQ
AD7701SQ
AD7701TQ
Temperature
Range
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–55°C to +125°C
–55°C to +125°C
Linearity
Error (% FSR)
0.003
0.0015
0.003
0.0015
0.003
0.003
0.0015
0.003
0.0015
Package
Options*
N-20
N-20
R-20
R-20
RS-28
Q-20
Q-20
Q-20
Q-20
*N
= PDIP; Q = CERDIP; R = SOIC; RS = SSOP.
PIN CONFIGURATIONS
PDIP, CERDIP, SOIC
MODE 1
CLKOUT 2
CLKIN 3
SC1 4
DGND 5
20 SDATA
19 SCLK
18
DRDY
SSOP
MODE 1
CLKOUT 2
CLKIN 3
SC1 4
DGND 5
NC 6
NC 7
DV
SS
8
NC 9
AV
SS
10
NC 11
AGND 12
A
IN
13
V
REF
14
28 SDATA
27 SCLK
26
DRDY
25 SC2
24
CS
23 NC
22 NC
TOP VIEW
(Not to Scale) 21 NC
20 DV
DD
19 AV
DD
18 NC
17 CAL
16 BP/UP
15
SLEEP
16
CS
TOP VIEW
(Not to Scale) 15 DV
DD
DV
SS
6
AV
SS
7
14 AV
DD
13 CAL
12 BP/UP
11
SLEEP
AD7701
17 SC2
AD7701
AGND 8
A
IN
9
V
REF
10
NC = NO CONNECT
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although the
AD7701 features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended
to avoid performance degradation or loss of functionality.
–4–
REV. E

 
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