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TMP108
SBOS663A – APRIL 2013 – REVISED SEPTEMBER 2019
TMP108 Low Power Digital Temperature Sensor With Two-Wire Serial Interface in WCSP
1 Features
1
3 Description
TMP108 is a digital-output temperature sensor with a
dynamically-programmable limit window, and under-
and overtemperature alert functions. These features
provide optimized temperature control without the
need of frequent temperature readings by the
controller or application processor.
The TMP108 features SMBus and two-wire interface
compatibility, and allows up to four devices on one
bus with the SMBus alert function.
The TMP108 is designed for thermal management
optimization in a variety of consumer, computer, and
environmental applications. The device is specified
over a temperature range of –40°C to +125°C.
Device Information
(1)
PART NUMBER
TMP108
PACKAGE
DSBGA (6)
BODY SIZE (NOM)
1.20 mm × 0.80 mm
•
•
•
•
•
•
Dynamically-programmable limit window with
under- and overtemperature alerts
Accuracy:
±0.75°C (maximum) from –20°C to +85°C
±1°C (maximum) from –40°C to +125°C
Low quiescent current:
6
μA
active (maximum) from –40°C to +125°C
Supply range: 1.4 V to 3.6 V
Resolution: 12 bits (0.0625°C)
Package: 1.2-mm × 0.8-mm, 6-ball WCSP
2 Applications
•
•
•
•
•
Smartphone and tablet thermal management
Battery management
Thermostat control
Under- and overtemperature protection
Environmental monitoring and HVAC
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Block Diagram
TMP108
Diode
Temp
Sensor
V+
A1
Control
Logic
A2
GND
A0
B1
DS
ADC
Serial
Interface
B2
SCL
ALERT
C1
OSC
Config
and Temp
Register
C2
SDA
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TMP108
SBOS663A – APRIL 2013 – REVISED SEPTEMBER 2019
www.ti.com
Table of Contents
1
2
3
4
5
6
Features
..................................................................
Applications
...........................................................
Description
.............................................................
Revision History.....................................................
Pin Configuration and Functions
.........................
Specifications.........................................................
6.1
6.2
6.3
6.4
6.5
6.6
6.7
Absolute Maximum Ratings .....................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Timing Diagrams .......................................................
Typical Characteristics ..............................................
1
1
1
2
3
3
3
3
4
4
4
5
8
7.4 Device Functional Modes........................................
11
7.5 Programming...........................................................
12
8
Application and Implementation
........................
17
8.1 Application Information............................................
17
8.2 Typical Application .................................................
17
9 Power Supply Recommendations......................
18
10 Layout...................................................................
19
10.1 Layout Guidelines .................................................
19
10.2 Layout Example ....................................................
19
11 Device and Documentation Support
.................
20
11.1
11.2
11.3
11.4
11.5
Receiving Notification of Documentation Updates
Support Resources ...............................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
20
20
20
20
20
7
Detailed Description
..............................................
9
7.1 Overview ...................................................................
9
7.2 Functional Block Diagram .........................................
9
7.3 Feature Description...................................................
9
12 Mechanical, Packaging, and Orderable
Information
...........................................................
20
4 Revision History
Changes from Original (April 2013) to Revision A
•
Page
Added
Pin Configuration and Functions
section,
ESD Ratings
table,
Feature Description
section,
Device Functional
Modes, Application and Implementation
section,
Power Supply Recommendations
section,
Layout
section,
Device
and Documentation Support
section, and
Mechanical, Packaging, and Orderable Information
section ..............................
1
Changed supply voltage maximum value from: 3.6 V to: 4 V ...............................................................................................
3
Changed input voltage maximum value for the SDA and SCL pins from: 3.6 V to: 4 V .......................................................
3
Changed input voltage maximum value for the A0 and ALERT pins from: (V+) + 0.3 V to: ((V+) + 0.5) and
≤
4 V .............
3
Changed
Temperature Error at +25°C
graph .........................................................................................................................
8
•
•
•
•
2
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TMP108
Copyright © 2013–2019, Texas Instruments Incorporated
TMP108
www.ti.com
SBOS663A – APRIL 2013 – REVISED SEPTEMBER 2019
5 Pin Configuration and Functions
YFF Package
6-Pin DSBGA
Top View
1
2
A
V+
GND
B
A0
SCL
C
ALERT
SDA
Not to scale
Pin Functions
PIN
NAME
A0
ALERT
GND
SCL
SDA
V+
NO.
B1
C1
A2
B2
C2
A1
I/O
I
O
—
I
I/O
I
DESCRIPTION
Address selection pin. Connect to GND, V+, SDA, or SCL.
Alert output pin
Ground
Input clock pin
Input/output data pin
Supply voltage (1.4 V to 3.6 V)
6 Specifications
6.1 Absolute Maximum Ratings
(1)
MIN
Supply voltage
SDA and SCL
(2)
Input voltage
A0 and ALERT
–0.5
–0.5
–55
–60
MAX
4
4
((V+) + 0.5) and
≤
4
150
150
150
UNIT
V
V
V
°C
°C
°C
Operating temperature
Junction temperature
Storage temperature, T
stg
(1)
(2)
Stresses beyond those listed under
Absolute Maximum Ratings
may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under
Recommended
Operating Conditions.
Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
If A0 is connected to SCL or SDA, the input voltage rating for A0 applies to SCL or SDA.
6.2 ESD Ratings
VALUE
V
(ESD)
(1)
(2)
Electrostatic
discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001
(1)
Charged-device model (CDM), per JEDEC specification JESD22-C101
(2)
UNIT
V
±2000
±1000
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
Copyright © 2013–2019, Texas Instruments Incorporated
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TMP108
SBOS663A – APRIL 2013 – REVISED SEPTEMBER 2019
www.ti.com
6.3 Recommended Operating Conditions
MIN
V+
T
A
Supply voltage
Operating free-air temperature
1.4
–40
MAX
3.6
+125
UNIT
V
°C
6.4 Thermal Information
TMP108
THERMAL METRIC
YFF (DSBGA)
6 PINS
θ
JA
θ
JC(top)
θ
JB
ψ
JT
ψ
JB
θ
JC(bottom)
Junction-to-ambient thermal resistance
Junction-to-case(top) thermal resistance
Junction-to-board thermal resistance
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case(bottom) thermal resistance
132.7
1.7
23
6
22.6
N/A
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
UNIT
6.5 Electrical Characteristics
At T
A
= +25°C, and V+ = +1.8 V, unless otherwise noted.
PARAMETER
TEMPERATURE INPUT
Range
Accuracy (temperature error)
Accuracy vs supply
DIGITAL INPUT/OUTPUT
V
IH
V
IL
I
IN
V
OL
Input logic high level
Input logic low level
Input current
Output logic low level
ALERT internal pullup resistor
Resolution
Conversion time
One-Shot mode
CR1 = 0, CR0 = 0
Conversion modes
CR1 = 0, CR0 = 1 (default)
CR1 = 1, CR0 = 0
CR1 = 1, CR0 = 1
Timeout time
POWER SUPPLY
Serial bus inactive, CR1 = 0, CR0 = 1 (default)
Serial bus inactive, CR1 = 0, CR0 = 1 (default), –40°C
to +125°C
I
Q
Quiescent current
Serial bus active, SCL frequency = 400 kHz, CR1 = 0,
CR0 = 1 (default)
Serial bus active, SCL frequency = 3.4 MHz, CR1 = 0,
CR0 = 1 (default)
Serial bus inactive
I
SD
Shutdown current
Serial bus active, SCL frequency = 400 kHz
Serial bus active, SCL frequency = 3.4 MHz
12
82
0.3
10
80
1
2
3.5
6
μA
μA
μA
μA
μA
μA
μA
21
21
0 V < V
IN
< (V+) +0.3 V
V+ > 2 V, I
OUT
= 3 mA
V+ < 2 V, I
OUT
= 3 mA
ALERT to V+
80
100
12
27
0.25
1
4
16
28
35
33
0.7 (V+)
–0.5
V+
0.3 (V+)
1
0.4
0.2 (V+)
120
V
V
μA
V
V
kΩ
Bit
ms
Conv/s
Conv/s
Conv/s
Conv/s
ms
–20°C to +85°C
–40°C to +125°C
–40
–0.75
–1
–0.3
±0.15
±0.3
±0.03
+125
0.75
1
0.3
°C
°C
°C
°C/V
TEST CONDITIONS
MIN
TYP
MAX
UNIT
4
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Copyright © 2013–2019, Texas Instruments Incorporated
TMP108
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SBOS663A – APRIL 2013 – REVISED SEPTEMBER 2019
6.6 Timing Diagrams
The TMP108 is two-wire and SMBus compatible.
Figure 1
to
Figure 4
describe the various operations on the
TMP108. Parameters for
Figure 1
are defined in
Table 1.
Bus definitions are:
Bus Idle:
Both SDA and SCL lines remain high.
Start Data Transfer:
A change in the state of the SDA line, from high to low, while the SCL line is high defines a
start condition. Each data transfer is initiated with a start condition.
Stop Data Transfer:
A change in the state of the SDA line from low to high while the SCL line is high defines a
stop condition. Each data transfer is terminated with a repeated start or stop condition.
Data Transfer:
The number of data bytes transferred between a start and a stop condition is not limited, and is
determined by the master device. The receiver acknowledges the transfer of data. It is also possible to use the
TMP108 for single-byte updates. To update only the MS byte, terminate communication by issuing a start or stop
condition on the bus.
Acknowledge:
Each receiving device, when addressed, must generate an acknowledge bit. A device that
acknowledges must pull down the SDA line during the acknowledge clock pulse so that the SDA line is stable
low during the high period of the acknowledge clock pulse. Setup and hold times must be taken into account.
When a master receives data, the termination of the data transfer can be signaled by the master generating a
not-acknowledge
(1) on the last byte transmitted by the slave.
Table 1. Timing Diagram Definitions
FAST MODE
MIN
f
(SCL)
SCL operating frequency, V+
≥
1.8 V
SCL operating frequency, V+ < 1.8 V
Bus free time between stop and start conditions, V+
≥
1.8 V
Bus free time between stop and start conditions, V+
< 1.8 V
Hold time after repeated start condition.
After this period, the first clock is generated.
Repeated start condition setup time
Stop condition setup time
Data hold time, V+
≥
1.8 V
Data hold time, V+ < 1.8 V
Data setup time, V+
≥
1.8 V
Data setup time, V+ < 1.8 V
SCL clock low period, V+
≥
1.8 V
SCL clock low period, V+ < 1.8 V
SCL clock high period
Data rise/fall time
Clock rise/fall time
Clock/data rise time for SCLK
≤
100 kHz
0.001
0.001
1300
1300
600
600
600
0
0
100
100
1300
1300
600
300
300
1000
900
900
MAX
0.4
0.4
HIGH-SPEED MODE
MIN
0.001
0.001
160
260
160
160
160
0
0
10
50
160
260
60
80
40
70
130
MAX
3.4
2.5
UNIT
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
t
(BUF)
t
(HDSTA)
t
(SUSTA)
t
(SUSTO)
t
(HDDAT)
t
(SUDAT)
t
(LOW)
t
(HIGH)
t
R
, t
F
- SDA
t
R
, t
F
- SCL
t
R
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