SC16C2550B
5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with
16-byte FIFOs
Rev. 02 — 14 December 2004
Product data
1. Description
The SC16C2550B is a two channel Universal Asynchronous Receiver and
Transmitter (UART) used for serial data communications. Its principal function is to
convert parallel data into serial data and vice versa. The UART can handle serial data
rates up to 5 Mbit/s.
The SC16C2550B is pin compatible with the ST16C2550. It will power-up to be
functionally equivalent to the 16C2450. The SC16C2550B provides enhanced UART
functions with 16-byte FIFOs, modem control interface, DMA mode data transfer. The
DMA mode data transfer is controlled by the FIFO trigger levels and the TXRDY and
RXRDY signals. On-board status registers provide the user with error indications and
operational status. System interrupts and modem control features may be tailored by
software to meet specific user requirements. An internal loop-back capability allows
on-board diagnostics. Independent programmable baud rate generators are provided
to select transmit and receive baud rates.
The SC16C2550B operates at 5 V, 3.3 V and 2.5 V and the Industrial temperature
range, and is available in plastic PLCC44, LQFP48 and DIP40 packages.
2. Features
s
s
s
s
s
s
s
s
s
s
s
s
2 channel UART
5 V, 3.3 V and 2.5 V operation
Industrial temperature range
Pin and functionally compatible to 16C2450 and software compatible with
INS8250, SC16C550
Up to 5 Mbit/s data rate at 5 V and 3.3 V, and 3 Mbit/s at 2.5 V
16 byte transmit FIFO to reduce the bandwidth requirement of the external CPU
16 byte receive FIFO with error flags to reduce the bandwidth requirement of the
external CPU
Independent transmit and receive UART control
Four selectable Receive FIFO interrupt trigger levels
Software selectable Baud Rate Generator
Standard asynchronous error and framing bits (Start, Stop, and Parity Overrun
Break)
Transmit, Receive, Line Status, and Data Set interrupts independently controlled
Philips Semiconductors
SC16C2550B
5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 16-byte FIFOs
s
Fully programmable character formatting:
x
5, 6, 7, or 8-bit characters
x
Even, Odd, or No-Parity formats
x
1, 1
1
⁄
2
, or 2-stop bit
x
Baud generation (DC to 5 Mbit/s)
s
False start-bit detection
s
Complete status reporting capabilities
s
3-State output TTL drive capabilities for bi-directional data bus and control bus
s
Line Break generation and detection
s
Internal diagnostic capabilities:
x
Loop-back controls for communications link fault isolation
s
Prioritized interrupt system controls
s
Modem control functions (CTS, RTS, DSR, DTR, RI, DCD).
3. Ordering information
Table 1:
Ordering information
Package
Name
SC16C2550BIN40
SC16C2550BIA44
SC16C2550BIB48
DIP40
PLCC44
LQFP48
Description
plastic dual in-line package; 40 leads (600 mil)
plastic leaded chip carrier; 44 leads
plastic low profile quad flat package; 48 leads; body 7
×
7
×
1.4 mm
Version
SOT129-1
SOT187-2
SOT313-2
Type number
9397 750 14449
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 02 — 14 December 2004
2 of 42
Philips Semiconductors
SC16C2550B
5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 16-byte FIFOs
4. Block diagram
SC16C2550B
TRANSMIT
FIFO
REGISTER
D0–D7
IOR
IOW
RESET
DATA BUS
AND
CONTROL LOGIC
TRANSMIT
SHIFT
REGISTER
TXA, TXB
INTERCONNECT BUS LINES
AND
CONTROL SIGNALS
RECEIVE
FIFO
REGISTER
RECEIVE
SHIFT
REGISTER
RXA, RXB
A0–A2
CSA
CSB
REGISTER
SELECT
LOGIC
DTRA, DTRB
RTSA, RTSB
OP2A, OP2B
MODEM
CONTROL
LOGIC
INTA, INTB
TXRDYA, TXRDYB
RXRDYA, RXRDYB
INTERRUPT
CONTROL
LOGIC
CLOCK AND
BAUD RATE
GENERATOR
CTSA, CTSB
RIA, RIB
CDA, CDB
DSRA, DSRB
002aaa595
XTAL1
XTAL2
Fig 1. SC16C2550B block diagram.
9397 750 14449
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 02 — 14 December 2004
3 of 42
Philips Semiconductors
SC16C2550B
5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 16-byte FIFOs
5. Pinning information
5.1 Pinning
D0 1
D1 2
D2 3
D3 4
D4 5
D5 6
D6 7
D7 8
RXB 9
RXA 10
TXA 11
TXB 12
OP2B 13
CSA 14
CSB 15
XTAL1 16
XTAL2 17
IOW 18
CDB 19
GND 20
002aaa596
40 V
CC
39 RIA
38 CDA
37 DSRA
36 CTSA
35 RESET
34 DTRB
33 DTRA
SC16C2550BIN40
32 RTSA
31 OP2A
30 INTA
29 INTB
28 A0
27 A1
26 A2
25 CTSB
24 RTSB
23 RIB
22 DSRB
21 IOR
Fig 2. DIP40 pin configuration.
9397 750 14449
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 02 — 14 December 2004
4 of 42
Philips Semiconductors
SC16C2550B
5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 16-byte FIFOs
1 TXRDYA
41 DSRA
D5
D6
D7
7
8
9
40 CTSA
42 CDA
44 V
CC
43 RIA
6 D4
5 D3
4 D2
3 D1
2 D0
39 RESET
38 DTRB
37 DTRA
36 RTSA
35 OP2A
RXB 10
RXA 11
TXRDYB 12
TXA 13
TXB 14
OP2B 15
CSA 16
CSB 17
SC16C2550BIA44
34 RXRDYA
33 INTA
32 INTB
31 A0
30 A1
29 A2
XTAL1 18
XTAL2 19
IOW 20
CDB 21
GND 22
RXRDYB 23
IOR 24
DSRB 25
RIB 26
RTSB 27
CTSB 28
002aaa597
Fig 3. PLCC44 pin configuration.
9397 750 14449
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 02 — 14 December 2004
5 of 42
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