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MC14067B
Analog Multiplexers /
Demultiplexers
The MC14067 multiplexer/demultiplexer is a digitally controlled
analog switch featuring low ON resistance and very low leakage
current. This device can be used in either digital or analog
applications.
The MC14067 is a 16−channel multiplexer/demultiplexer with an
inhibit and four binary control inputs A, B, C, and D. These control
inputs select 1−of−16 channels by turning ON the appropriate analog
switch (see MC14067 truth table.)
Features
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MARKING
DIAGRAMS
PDIP−24
P SUFFIX
CASE 709
MC14067BCP
AWLYYWWG
•
•
•
•
•
•
•
•
Low OFF Leakage Current
Matched Channel Resistance
Low Quiescent Power Consumption
Low Crosstalk Between Channels
Wide Operating Voltage Range: 3 to 18 V
Low Noise
Pin for Pin Replacement for CD4067B
These are Pb−Free Devices
Parameter
DC Supply Voltage Range
Input or Output Voltage Range
(DC or Transient)
Input Current (DC or Transient),
per Control Pin
Switch Through Current
Power Dissipation, per Package
(Note 1)
Ambient Temperature Range
Storage Temperature Range
Lead Temperature
(8–Second Soldering)
Value
– 0.5 to + 18.0
– 0.5 to V
DD
+ 0.5
±
10
±
25
500
– 55 to + 125
– 65 to + 150
260
Unit
V
V
mA
mA
mW
_C
_C
_C
SOIC−24
DW SUFFIX
CASE 751E
A
WL
YY
WW
G
14067BG
AWLYYWW
MAXIMUM RATINGS
(Voltages Referenced to V
SS
)
Symbol
V
DD
V
in
, V
out
I
in
I
sw
P
D
T
A
T
stg
T
L
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Temperature Derating:
Plastic “P and D/DW” Packages:
−
7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high−impedance circuit. For proper operation, V
in
and V
out
should be constrained
to the range V
SS
v
(V
in
or V
out
)
v
V
DD
.
Unused inputs must always be tied to an appropriate logic voltage level
(e.g., either V
SS
or V
DD
). Unused outputs must be left open.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
©
Semiconductor Components Industries, LLC, 2009
October, 2009
−
Rev. 6
1
Publication Order Number:
MC14067B/D
MC14067B
TRUTH TABLE
Control Inputs
A
X
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
B
X
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
C
X
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
D
X
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
Inh
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Selected
Channel
None
X0
X1
X2
X3
X4
X5
X6
X7
X8
X9
X10
X11
X12
X13
X14
X15
PIN ASSIGNMENT
X
X7
X6
X5
X4
X3
X2
X1
X0
A
B
V
SS
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
V
DD
X8
X9
X10
X11
X12
X13
X14
X15
INHIBIT
C
D
SWITCHES
IN/OUT
CONTROLS
16−Channel Analog
Multiplexer/Demultiplexer
15
10
11
14
13
9
8
7
6
5
4
3
2
23
22
21
20
19
18
17
16
INHIBIT
A
B
C
D
X0
X1
X2
X3
X4
X5
X6
X7
X8
X9
X10
X11
X12
X13
X14
X15
X
1
COMMON
OUT/IN
V
DD
= PIN 24
V
SS
= PIN 12
FUNCTIONAL DIAGRAM
CONTROL
INPUTS
INHIBIT
A
B
C
D
X0
X1
X2
X3
X4
X5
X6
X7
X8
X9
X10
X11
X12
X13
X14
X15
1-OF-16 DECODER
X
IN/OUT
X
OUT/IN
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2
MC14067B
ELECTRICAL CHARACTERISTICS
−
55°C
Characteristic
Power Supply Voltage
Range
Quiescent Current Per
Package
Symbol
V
DD
I
DD
V
DD
−
5.0
10
15
Control Inputs: V
in =
V
SS
or V
DD
,
Switch I/O: V
SS
v
V
I/O
v
V
DD
, and
DV
switch
v
500 mV
(3)
T
A
= 25_C only (The
channel component,
(V
in
– V
out
)/R
on
, is
not included.)
R
on
= per spec,
I
off
= per spec
R
on
= per spec,
I
off
= per spec
V
in
= 0 or V
DD
−
−
−
3.5
7.0
11
−
−
Channel On or Off
0
Test Conditions
Min
3.0
−
−
−
Max
18
5.0
10
20
Min
3.0
−
−
−
25_C
Typ
(2)
−
0.005
0.010
0.015
Max
18
5.0
10
20
125_C
Min
3.0
−
−
−
Max
18
150
300
600
Unit
V
mA
SUPPLY REQUIREMENTS
(Voltages Referenced to V
SS
)
Total Supply Current
(Dynamic Plus
Quiescent,
Per Package
Low−Level Input Voltage
I
D(AV)
5.0
10
15
Typical
(0.07
mA/kHz)
f + I
DD
(0.20
mA/kHz)
f + I
DD
(0.36
mA/kHz)
f + I
DD
mA
CONTROL INPUTS — INHIBIT, A, B, C, D
(Voltages Referenced to V
SS
)
V
IL
5.0
10
15
5.0
10
15
15
—
−
1.5
3.0
4.0
−
−
−
±
0.1
−
V
DD
−
−
−
3.5
7.0
11
−
−
0
2.25
4.50
6.75
2.75
5.50
8.25
±
0.00001
5.0
−
1.5
3.0
4.0
−
−
−
±
0.1
7.5
V
DD
−
−
−
3.5
7.0
11
−
−
0
1.5
3.0
4.0
−
−
−
1.0
−
V
DD
V
High−Level Input Voltage
V
IH
V
Input Leakage Current
Input Capacitance
Recommended Peak−to−
Peak Voltage Into or
Out of the Switch
Recommended Static or
Dynamic Voltage
Across the Switch
(3)
(Figure 1)
Output Offset Voltage
ON Resistance
I
in
C
in
V
I/O
mA
pF
V
p−p
SWITCHES IN/OUT AND COMMONS OUT/IN — X, Y
(Voltages Referenced to V
SS
)
DV
switch
−
Channel On
0
600
0
−
600
0
300
mV
V
OO
R
on
−
5.0
10
15
5.0
10
15
15
V
in
= 0 V, No Load
DV
switch
v
500 mV
(3)
,
V
in
= V
IL
or V
IH
(Control), and V
in
0 to V
DD
(Switch)
−
−
−
−
−
−
−
−
800
400
220
70
50
45
±
100
−
−
−
−
−
−
−
−
10
250
120
80
25
10
10
±
0.05
−
1050
500
280
70
50
45
±100
−
−
−
−
−
−
−
−
−
1300
550
320
135
95
65
±
1000
mV
W
DON
Resistance
Between
Any Two Channels
in the Same Package
Off−Channel Leakage
Current (Figure 2)
DR
on
W
I
off
V
in
= V
IL
or V
IH
(Control) Channel to
Channel or Any One
Channel
Inhibit = V
DD
Inhibit = V
DD
(MC14067B)
(MC14097B)
Pins Not Adjacent
Pins Adjacent
−
nA
Capacitance, Switch I/O
Capacitance, Common O/I
C
I/O
C
O/I
−
−
−
−
−
−
—
−
−
−
—
−
−
−
10
100
60
0.47
−
−
−
−
−
−
−
−
−
−
−
−
pF
pF
Capacitance, Feedthrough
(Channel Off)
C
I/O
−
−
pF
2. Data labeled “Typ” is not to be used for design purposes, but is intended as an indication of the IC’s potential performance.
3. For voltage drops across the switch (DV
switch
) > 600 mV ( > 300 mV at high temperature), excessive V
DD
current may be drawn; i.e.
the current out of the switch may contain both V
DD
and switch input components. The reliability of the device will be unaffected unless the
Maximum Ratings are exceeded. (See first page of this data sheet.)
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3
MC14067B
ELECTRICAL CHARACTERISTICS
(C
L
= 50 pF, T
A
= 25_C)
Characteristic
Propagation Delay Times
Channel Input−to−Channel Output (R
L
= 200 kW)
MC14067B
Symbol
t
PLH
, t
PHL
(Figure 3)
5.0
10
15
35
15
12
90
40
30
ns
5.0
10
15
50
30
20
ns
5.0
10
15
240
115
75
600
290
190
ns
5.0
10
15
250
120
75
625
300
190
ns
5.0
10
15
Any Pair of Address Inputs to Output
MC14067B
t
PLH
, t
PHL
5.0
10
15
Second Harmonic Distortion
(R
L
= 10 kW, f = 1 kHz, V
in
= 5 V
p−p
)
ON Channel Bandwidth
[R
L
= 50
W,
V
in
= 1/2 (V
DD
– V
SS
)
p−p
(sine−wave)]
20 Log10 (V
out
/V
in
) =
−
3 dB
−
BW
MC14067B
(Figure 5)
−
(Figure 5)
−
f
in
= 20 MHz
(Figure 6)
−
(Figure 7)
10
30
−
mV
10
– 40
−
dB
10
10
15
– 40
−
−
dB
10
280
115
85
0.3
700
290
215
−
%
MHz
625
450
350
ns
V
DD
– V
SS
Vdc
Typ
(4)
Max
Unit
ns
Propagation Delay Times
Channel Input−to−Channel Output (R
L
= 1.0 kW)
MC14067B
t
PLH
, t
PHL
(Figure 3)
Control Input−to−Channel Output
Channel Turn−On Time (R
L
= 10 kW)
MC14067B
t
PZH
, t
PZL
Channel Turn−Off Time (R
L
= 300 kW)
MC14067B
(Figure 4)
t
PHZ
, t
PLZ
Channel Turn−Off Time (R
L
= 10 kW)
MC14067B
(Figure 4)
Off Channel Feedthrough Attenuation
[R
L
= 50
W,
V
in
= 1/2 (V
DD
−V
SS
)
p−p
(sine−wave)]
f
in
= 20 MHz – MC14067B
Channel Separation
[R
L
= 1 kW, V
in
= 1/2 (V
DD
−V
SS
)
p−p
(sine−wave)]
Crosstalk, Control Inputs−to−Common O/I
(R1 = 1 kW, R
L
= 10 kW,
Control t
r
= t
f
= 20 ns, Inhibit = V
SS
)
4. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
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