电子工程世界电子工程世界电子工程世界

关键词

搜索

型号

搜索

10113949-L0E-70DLF

产品描述high speed / modular connectors LT mod
产品类别连接器   
文件大小1MB,共4页
制造商FCI [First Components International]
标准  
下载文档 详细参数 全文预览

10113949-L0E-70DLF概述

high speed / modular connectors LT mod

10113949-L0E-70DLF规格参数

参数名称属性值
ManufactureFCI
产品种类
Product Category
High Speed / Modular Connectors
RoHSYes
工厂包装数量
Factory Pack Quantity
128

文档预览

下载PDF文档
BAcKpAneL connectors
XCede
®
HigH-PerformanCe
BaCkPlane ConneCtor SyStem
Description
Fci’s Xcede
®
connector platform is designed for 25 Gb/s
performance to provide the headroom to support future
high-speed, serial data rate requirements demanded by
next-generation equipment in data centers and service
provider networks. the use of engineering polymers in a
resonance-damping shield enables very low crosstalk
across a wide frequency range.
Xcede connectors also address requirements for higher
linear signal density at the interface of backplane and
daughter card. signal connectors can be configured with
2, 4 or 6 differential pairs per column, providing up to 82.4
differential pairs/inch, suiting architectures with multiple
front or rear fabric slots and blade systems with cooling
straight through the backplane. complementary guidance
and power modules are also included in the product
range. A wafer organizer can be used to combine groups
of right-angle signal, guidance and power modules as an
integrated daughter-card connector.
the Xcede backplane header system provides the
ruggedness and long-term reliability required by today’s
systems. the wide ground contacts feature a stiffness-
enhancing rib and are advanced well ahead of the signals
for exceptional robustness and signal pin protection.
FeAtures & BeneFits
High-speed backplane system designed for 25 Gb/s
Use of engineering materials in the shield aids in
reduction of crosstalk resonances
1.85 mm column pitch offers high linear signal density
• Configurations with 6 differential pairs/column fit 36 mm
card slot pitch and provide 82.4 pairs/inch
• 4 pairs/column fit 25 mm slot pitch with 54.9 pairs/inch
• 2 pairs/column fit 15 mm slot pitch with 27.5 pairs/inch
Two ground vias between differential pairs allow elongated
antipads to further improve impedance
Optional short compliant pin permits deeper backdrilling and
dual diameter vias to enhance return loss performance
Wide ground contacts feature a stiffening rib and are
advanced well ahead of signals for exceptional robustness
and signal pin protection
Intermateable, electrically and mechanically interchangeable
licensed second source to Amphenol TCS
Xcede® is a registered trademark of Amphenol corporation
tArGet MArKets / AppLicAtions
Communications
Routers
Switches
Networking
Access
Transport
Wireless
Data
Servers
Storage Systems
Industrial
Medical
Test & Measurement
【设计工具】xilinx fpga开发实用教程
xilinx fpga开发实用教程 100多M 下面看下介绍: 内容简介 《Xilinx FPGA开发实用教程》系统讲述了Xilinx FPGA的开发知识,包括FPGA开发简介、Verilog HDL语言基础、基于Xilinx芯片的 ......
fuli247012412 FPGA/CPLD
【公告】购买了real6410 real210的坛友请注意
刚得到消息,针对板子的LINUX内核即将(大约是两周左右)更新到3.0,并且real6410将支持录音等多数功能,需要的朋友到时可以去华天正的ftp下载! 本帖最后由 wanghongyang 于 2011-12-2 10:45 ......
wanghongyang 淘e淘
不小心抽了15金币
哈哈,活动抽奖,第一次抽了15金币,第二次抽不到了,呜呜 253949 ...
suoma 聊聊、笑笑、闹闹
看一下这个,相信你对开关电源驱动电路有了更深一步的了解
:handshake 有兴趣的看看,应该有点用的:)...
peter_yu 模拟电子
【设计工具】《Xilinx_fpga_设计培训中文教程-工具流程实验
本实验的目的是熟悉实现进程 结构向导和 PACE 的使用 在本实验中 我们在 ISE中将一 个设计的主要阶段走了一遍 建立项目 添加源文件 使用结构向导来改进和/或完成我们 的代码 指定管脚和区域 ......
nwx8899 FPGA/CPLD
CC3200用wifi模块传数据问题
本人是小白,第一次接触这方面的问题,我现在用的CC3200这块板子,想让前面电路模拟信号送到这块板子的ADC之后,由wifi传送到手机上,但是现在按照例程可以让ADC转换之后的数据送到USB模拟的串 ......
打啵客油 嵌入式系统

 
EEWorld订阅号

 
EEWorld服务号

 
汽车开发圈

 
机器人开发圈

About Us 关于我们 客户服务 联系方式 器件索引 网站地图 最新更新 手机版

站点相关: 大学堂 TI培训 Datasheet 电子工程 索引文件: 1413  897  2805  2534  2029  32  8  9  37  41 

器件索引   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z

北京市海淀区中关村大街18号B座15层1530室 电话:(010)82350740 邮编:100190

电子工程世界版权所有 京B2-20211791 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号 Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved