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S1D13505F00A200

产品描述CRT OR FLAT PNL GRPH DSPL CTLR, PQFP128, QFP15-128
产品类别嵌入式处理器和控制器    微控制器和处理器   
文件大小109KB,共2页
制造商Seiko Epson Corporation
标准
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S1D13505F00A200概述

CRT OR FLAT PNL GRPH DSPL CTLR, PQFP128, QFP15-128

S1D13505F00A200规格参数

参数名称属性值
是否无铅不含铅
是否Rohs认证符合
厂商名称Seiko Epson Corporation
零件包装代码QFP
包装说明FQFP,
针数128
Reach Compliance Codecompliant
Is SamacsysN
地址总线宽度21
总线兼容性ISA; PCMCIA; 68000; 68030; MPC821; E0C33
外部数据总线宽度16
JESD-30 代码S-PQFP-G128
JESD-609代码e6
长度14 mm
湿度敏感等级3
端子数量128
最高工作温度85 °C
最低工作温度-40 °C
封装主体材料PLASTIC/EPOXY
封装代码FQFP
封装形状SQUARE
封装形式FLATPACK, FINE PITCH
峰值回流温度(摄氏度)260
认证状态Not Qualified
最大供电电压5.5 V
最小供电电压2.7 V
标称供电电压3 V
表面贴装YES
技术CMOS
温度等级INDUSTRIAL
端子面层Tin/Bismuth (Sn/Bi)
端子形式GULL WING
端子节距0.4 mm
端子位置QUAD
处于峰值回流温度下的最长时间10
宽度14 mm
uPs/uCs/外围集成电路类型DISPLAY CONTROLLER, CRT OR FLAT PANEL GRAPHICS DISPLAY
Base Number Matches1

文档解析

这份文档是关于S1D13505嵌入式RAMDAC LCD/CRT控制器的数据手册,它包含了一些关键的技术信息,以下是一些值得关注的点:

  1. 产品描述:S1D13505是一款面向嵌入式市场的彩色/单色LCD/CRT图形控制器,设计用于满足低成本和低功耗的要求。

  2. CPU接口:支持多种CPU接口,包括Hitachi SH-4、SH-3、Motorola M68K、Philips MIPS PR31500/PR31700、Toshiba MIPS TX3912、Motorola Power PC MPC821、NEC MIPS VR4102/VR4111、Epson E0C33、PC Card (PCMCIA)、StrongARM (PC Card)、ISA和MPU总线。

  3. 内存接口:支持16位EDO-DRAM或FPM-DRAM接口,具有512K字节和2M字节的内存大小选项。

  4. 显示支持:支持4/8位单色被动LCD接口、4/8/16位彩色被动LCD接口、单面板单驱动显示、双面板双驱动显示,以及对9/12位TFT/D-TFD的直接支持。

  5. 分辨率和颜色深度:最大分辨率为800x600像素,颜色深度为16位每像素(bpp)。

  6. 显示模式:支持1/2/4/8/16位每像素的LCD/CRT显示,包括分屏显示、虚拟显示支持、双缓冲/多页显示、SwivelView(90°显示图像旋转)等。

  7. 硬件光标和墨水层:硬件64x64像素2位光标或全屏2位墨水层。

  8. 时钟源:单一时钟输入用于像素和内存时钟,提供灵活性以使用CPU总线时钟作为输入。

  9. 功耗模式:包括软件节能模式和LCD电源序列。

  10. 通用I/O引脚:最多3个通用I/O引脚可用。

  11. 操作电压:2.7伏至5.5伏。

  12. 封装:128引脚QFP15表面贴装封装。

  13. 系统块图:文档中提供了S1D13505的系统块图,展示了与CPU、平板显示器、CRT、EDO-DRAM、FPM-DRAM的连接。

  14. 设计工具和支持:提供了技术手册、Linux控制台驱动、评估板、Windows® CE显示驱动、独立于CPU的软件工具、VXWorks® TornadoTM显示驱动等设计工具。

  15. 法律声明:文档包含了版权和专利信息,以及Epson公司和产品的商标声明。

文档预览

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GRAPHICS
S1D13505
S1D13505 Embedded RAMDAC LCD/CRT Controller
DESCRIPTION
The S1D13505 is a color/monochrome LCD/CRT graphics controller interfacing to a wide range of CPUs and display
devices. The S1D13505 architecture is designed to meet the low cost, low power requirements of the embedded
markets, such as Mobile Communications, Hand-Held PCs, and Office Automation.
The S1D13505 supports multiple CPUs, all LCD panel types, CRT, and additionally provides a number of
differentiating features. Products requiring a “Portrait” mode display can take advantage of the SwivelView feature.
Simultaneous, Virtual and Split Screen Display are just some of the display modes supported, while the Hardware
Cursor, Ink Layer, and the Memory Enhancement Registers offer substantial performance benefits. These features,
combined with the S1D13505’s Operating System independence, make it an ideal display solution for a wide variety
of applications.
February 2009
FEATURES
Memory Interface
16-bit EDO-DRAM or FPM-DRAM interface.
Memory size options:
512K bytes using one 256K×16 device.
2M bytes using one 1M×16 device.
Addressable as a single linear address space.
CPU Interface
Supports the following interfaces:
Hitachi SH-4.
Hitachi SH-3.
Motorola M68K.
Philips MIPS PR31500/PR31700.
Toshiba MIPS TX3912.
Motorola Power PC MPC821.
NEC MIPS VR4102/VR4111.
Epson E0C33.
PC Card (PCMCIA).
StrongARM (PC Card).
ISA bus.
MPU bus interface with programmable READY.
CPU write buffer.
Display Support
4/8-bit monochrome passive LCD interface.
4/8/16-bit color passive LCD interface.
Single-panel, single-drive displays.
Dual-panel, dual-drive displays.
Direct support for 9/12-bit TFT/D-TFD; 18-bit TFT/D-TFD
is supported up to 64K color depth (16-bit data).
Embedded RAMDAC with direct analog CRT drive.
Simultaneous display of CRT and passive or TFT/D-TFD
panels.
Display Modes
1/2/4/8/16 bit-per-pixel (bpp) support on LCD/CRT.
Up to 16 shades of gray using FRM on monochrome
passive LCD panels.
Up to 4096 colors on passive LCD panels.
Up to 64K colors on active matrix TFT/D-TFD LCD
panels and CRT in 16 bpp modes.
Split Screen Display: allows two different images to be
simultaneously viewed on the same display.
Virtual Display Support: displays images larger than the
display size through the use of panning.
Double Buffering/multi-pages: provides smooth
animation and instantaneous screen update.
SwivelView: direct hardware 90° rotation of
display image for portrait mode display.
Acceleration of screen updates by allocating full
display memory bandwidth to CPU.
Hardware 64x64 pixel 2-bit cursor or full screen
2-bit ink layer.
Clock Source
Single clock input for both pixel and memory clocks.
Memory clock can be input clock or (input clock/2),
providing flexibility to use CPU bus clock as input.
Pixel clock can be memory clock or (memory clock/2) or
(memory clock/3) or (memory clock/4).
Power Down Modes
Software power save mode.
LCD power sequencing.
General Purpose IO Pins
Up to 3 General Purpose IO pins are available.
Operating Voltage
Maximum resolution of 800x600 pixels at a color
depth of 16 bpp.
2.7 volts to 5.5 volts.
Package
128-pin QFP15 surface mount package.
X23A-C-002-15
Revision 15.2
1

 
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