TSC80251G2D
8/16-bit Microcontroller
Interfaces
1. Description
The TSC80251G2D products are derivatives of the
T
EMIC
Microcontroller family based on the 8/16-bit
C251 Architecture. This family of products is tailored
to 8/16-bit microcontroller applications requiring an
increased instruction throughput, a reduced operating
frequency or a larger addressable memory space. The
architecture can provide a significant code size reduction
when compiling C programs while fully preserving the
legacy of C51 assembly routines.
The TSC80251G2D derivatives are pin and software
compatible with standard 80C51/Fx/Rx/Rx+ with
extended on-chip data memory (1 Kbyte RAM) and up
to 256 Kbytes of external code and data. Additionally,
the TSC83251G2D and TSC87251G2D provide on-chip
code memory: 32 Kbytes ROM and 32 Kbytes EPROM/
OTPROM respectively.
They provide transparent enhancements to Intel’s
8xC251Sx family with an additional Synchronous Serial
Link Controller (SSLC supporting I
2
C,
µWire
and SPI
protocols), a Keyboard interrupt interface, a dedicated
Baud Rate Generator for UART, and Power Management
features.
TSC80251G2D derivatives are optimized for speed and
for low power consumption on a wide voltage range.
with
Serial
Communication
Note:
This Datasheet provides the technical description of the TSC80251G2D derivatives. For further information on the device usage, please request
the TSC80251 Programmer’s Guide and the TSC80251G1D Design Guide.
2. Typical Applications
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ISDN Terminals
High-Speed Modems
PABX (SOHO)
Line Cards
DVD ROM and Players
Printers
Plotters
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Scanners
Banking Machines
Barcode Readers
Smart Cards Readers
High-End Digital Monitors
High-End Joysticks
Rev. A - May 7, 1999
1
TSC80251G2D
3. Features
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Pin and Software Compatibility with Standard 80C51
Products and 80C51Fx/Rx/Rx+
Plug-In Replacement of Intel’s 8xC251Sx
C251 core: Intel’s MCS
®
251 D-step Compliance
•
40-byte register file
•
Registers accessible as Bytes, Words or Dwords
•
Three-stage instruction pipeline
•
16-bit internal code fetch
Enriched C51 Instruction Set
•
16-bit and 32-bit ALU
•
Compare and conditional jump instructions
•
Expanded set of move instructions
•
16-bit watchdog timer/counter capability
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Secure 14-bit Hardware Watchdog Timer
Power Management
•
Power-On reset (integrated on the chip)
•
Power-Off flag (cold and warm resets)
•
Software programmable system clock
•
Idle mode
•
Power-Down mode
Keyboard Interrupt Interface on Port 1
Non Maskable Interrupt Input (NMI)
Real-Time Wait States Inputs (WAIT#/AWAIT#)
ONCE mode and full speed Real-Time In-Circuit
Emulation support (Third Party Vendors)
High Speed Versions:
•
4.5 to 5.5 V
•
16 MHz and 24 MHz
•
Typical operating current: 35 mA @ 24 MHz
24 mA @ 16 MHz
•
Typical power-down current: 2
µA
Low Voltage Version:
•
2.7 to 5.5 V
•
16 MHz
•
Typical operating current: 11 mA @ 3V
•
Typical power-down current: 1
µA
Temperature Ranges:
•
Commercial (0°C to +70°C)
•
Industrial (-40°C to +85°C)
•
Option: extended range (-55°C to +125°C)
Packages:
•
PDIL 40, PLCC 44 and VQFP 44
•
CDIL 40 and CQPJ 44 with window
•
Options: known good dice and ceramic packages
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Linear Addressing
1 Kbyte of On-Chip RAM
External Memory Space (Code/Data) Programmable
from 64 Kbytes to 256 Kbytes
TSC87251G2D: 32 Kbytes of On-Chip EPROM/
OTPROM
•
SINGLE PULSE Programming Algorithm
TSC83251G2D: 32 Kbytes of On-Chip Masked ROM
TSC80251G2D: ROMless Version
Four 8-bit Parallel I/O Ports (Ports 0, 1, 2 and 3 of
the standard 80C51)
Serial I/O Port: full duplex UART (80C51
compatible) with independent Baud Rate Generator
SSLC: Synchronous Serial Link Controller
•
I
2
C multi-master protocol
• µWire
and SPI master and slave protocols
Three 16-bit Timers/Counters (Timers 0, 1 and 2 of
the standard 80C51)
EWC: Event and Waveform Controller
•
Compatible with Intel’s Programmable Counter
Array (PCA)
•
Common 16-bit timer/counter reference with four
possible clock sources (Fosc/4, Fosc/12, Timer 1
and external input)
•
Five modules, each with four programmable
modes:
- 16-bit software timer/counter
- 16-bit timer/counter capture input and
software pulse measurement
- High-speed output and 16-bit software pulse
width modulation (PWM)
- 8-bit hardware PWM without overhead
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Rev. A - May 7, 1999
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