Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer
for PAL and NTSC standards
1
FEATURES
TDA6500TT; TDA6501TT
•
Single-chip 5 V mixer/oscillator and synthesizer for
TV and VCR tuners
•
I
2
C-bus protocol compatible with 3.3 V and 5 V
microcontrollers:
– Address + 6 data bytes transmission
– Address + 1 status byte (I
2
C-bus read mode)
– Four independent I
2
C-bus addresses.
•
Two PMOS open-drain ports with 5 mA source
capability to switch high band and FM sound trap
(P2 and P3)
•
One PMOS open-drain port with 20 mA source
capability to switch the mid band (P1)
•
One PMOS open-drain port with 10 mA source
capability to switch the low band (P0)
•
Five step, 3-bit Analog-to-Digital Converter (ADC) and
NPN open-collector general purpose port with 5 mA
sinking capability (P6)
•
NPN open-collector general purpose port with 5 mA
sinking capability (P4)
•
Internal AGC flag
•
In-lock flag
•
33 V tuning voltage output
•
15-bit programmable divider
•
Programmable reference divider ratio: 64, 80 or 128
•
Programmable charge pump current: 60 or 280
µA
•
Varicap drive disable
•
Balanced mixer with a common emitter input for the low
band (single input)
•
Balanced mixer with a common base input for the mid
and high bands (balanced input)
•
2-pin asymmetrical oscillator for the low band
•
2-pin asymmetrical oscillator for the mid band
•
4-pin symmetrical oscillator for the high band
•
Frequency ranges: see Table 1
•
IF preamplifier with asymmetrical 75
Ω
output
impedance to drive a SAW filter (500
Ω/40
pF)
•
Wide-band AGC detector for internal tuner AGC:
– Five programmable take-over points
– Two programmable time constants.
2
APPLICATIONS
•
TV and VCR tuners
•
Specially suited for switched concepts, all systems
•
Specially suited for strong off-air reception.
2003 Jun 05
3
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer
for PAL and NTSC standards
3
GENERAL DESCRIPTION
TDA6500TT; TDA6501TT
The synthesizer consists of a 15-bit programmable divider,
a crystal oscillator and its programmable reference divider
and a phase/frequency detector combined with a charge
pump, which drives the tuning amplifier including 33 V
output.
Depending on the reference divider ratio (64, 80 or 128)
the phase comparator operates at 62.50 kHz, 50.00 kHz
or 31.25 kHz with a 4 MHz crystal.
The device can be controlled according to the I
2
C-bus
format. The lock detector bit FL is set to logic 1 when the
loop is locked. The AGC bit is set to logic 1 when the
internal AGC is active (level below 3 V). These two flags
are read on the SDA line (status byte) during a read
operation (see Table 8).
The ADC input is available on pin P6/ADC for digital AFC
control. The ADC code is read during a read operation
(see Table 8). In test mode, pin P6/ADC is used as a test
output for
1
⁄
2
f
ref
and
1
⁄
2
f
div
(see Table 5).
A minimum of seven bytes, including address byte, is
required to address the device, select the VCO frequency,
program the ports, set the charge pump current, set the
reference divider ratio, select the AGC take-over point and
select the AGC time constant. The device has
four independent I
2
C-bus addresses which can be
selected by applying a specific voltage on input AS
(see Table 4).
TDA6500TT and TDA6501TT are programmable 2-mixer,
3-oscillator and synthesizer MOPLL intended for pure
3-band tuner concepts (see Fig.1).
The device includes two double balanced mixers for the
low and mid/high bands and three oscillators for the low,
mid and high bands respectively. The band limits for PAL
tuners are shown in Table 1. Other functions are an
IF amplifier, a wide-band AGC detector and a PLL
synthesizer. Two pins are available between the mixer
output and the IF amplifier input to enable IF filtering for
improved signal handling.
Table 1
BAND
MIN.
Low
Mid
High
45.25
161.25
455.25
MAX.
154.25
439.25
855.25
MIN.
84.15
200.15
494.15
MAX.
193.15
478.15
894.15
Low, mid and high band limits
RFpix INPUT (MHz) OSCILLATOR (MHz)
Bit P0 enables Port P0 and the low band mixer and
oscillator. Bit P1 enables Port P1, the mid/high band mixer
and the mid band oscillator. Bit P2 enables Port P2 and
bit P3 enables Port P3. When P0 and P1 are disabled, the
mid/high band mixer and the high band oscillator are
enabled.
The AGC detector provides information about the
IF amplifier level. Five AGC take-over points are available
by software. Two programmable AGC time constants are
available for search tuning and normal tuner operation.
4
ORDERING INFORMATION
PACKAGE
TYPE NUMBER
NAME
TDA6500TT
TDA6501TT
DESCRIPTION
VERSION
SOT487-1
TSSOP32 plastic thin shrink small outline package; 32 leads; body width 6.1 mm;
lead pitch 0.65 mm
2003 Jun 05
4
stm32/stm8
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