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TPS650531, TPS650532
TPS65053, TPS65058
SLVS754D – MARCH 2007 – REVISED JANUARY 2015
TPS6505xx 5-Channel Power Management IC With Two Step-Down Converters
and Three Low-Input Voltage LDOs
1 Features
•
•
1
3 Description
The TPS6505xx family of devices are integrated
power management ICs for applications powered by
one Li-Ion or Li-Polymer cell, which require multiple
power rails. The TPS6505xx devices provide two
highly efficient, 2.25-MHz step-down converters
targeted at providing the core voltage and I/O voltage
in a processor-based system. Both step-down
converters enter a low power mode at light load for
maximum efficiency across the widest possible range
of load currents. For low noise applications the
devices can be forced into fixed frequency PWM
mode by pulling the MODE pin high. The TPS6505xx
devices also integrate one 400-mA LDO and two 200-
mA LDO voltage regulators. Each LDO operates with
an input voltage range between 1.5 V and 6.5 V
allowing them to be supplied from one of the step-
down converters or directly from the main battery.
Device Information
(1)
PART NUMBER
TPS65053
TPS650531
TPS650532
TPS65058
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
VQFN (24)
4.00 mm x 4.00 mm
PACKAGE
BODY SIZE (NOM)
•
•
•
•
•
•
•
•
•
•
•
•
•
Up To 95% Efficiency
Output Current for DC-DC Converters:
– TPS65053: DCDC1 = 1 A; DCDC2 = 0.6 A
– TPS650531, TPS650532: DCDC1 = 1 A;
DCDC2 = 1 A
– TPS65058: DCDC1 = 0.6 A; DCDC2 = 1 A
TPS65053, TPS650531, TPS650532: DC-DC
Converters Externally Adjustable
TPS65058: DCDC1 Fixed at 3.3V, DCDC2
selectable between 1.8V and 1.2V with Dynamic
Voltage Scaling for Core Processor Supply
V
IN
Range for DC-DC Converters
From 2.5 V to 6 V
2.25-MHz Fixed Frequency Operation
Power Save Mode at Light Load Current
180° Out-of-Phase Operation
Output Voltage Accuracy in PWM Mode ±1%
Total Typical 32-μA Quiescent Current for Both
DC-DC Converters
100% Duty Cycle for Lowest Dropout
One General-Purpose 400-mA LDO
Two General-Purpose 200-mA LDOs
V
IN
Range for LDOs from 1.5 V to 6.5 V
Output Voltage for LDOs:
– TPS65053 / TPS650531 / TPS650532: VLDO1
and VLDO2 Externally Adjustable, VLDO3 =
1.3 V / 1.2 V / 1.5 V
– TPS65058: VLDO1 = 3.3 V, VLDO2 selectable
between 1.8V and 1.2V, VLDO2 selectable
between 1.8V and 1.3V
Typical Application Schematic
TPS65053
1
W
VIN
1
m
F
DCDC1 (I/O)
ENABLE
EN_DCDC1
STEP-DOWN
CONVERTER
1000 mA
L1
FB_DCDC1
PGND1
R1
R2
Cff
VCC
22
m
F
2.2
m
H
VINDCDC1/2
10
m
F
MODE
2.2
m
H
L2
DCDC2 (core)
FB_DCDC2
EN_DCDC2
ENABLE
STEP-DOWN
CONVERTER
600 mA
R3
R4
Cff
10
m
F
PGND2
2 Applications
•
•
•
•
•
•
•
Cell Phones, Smart Phones
WLAN
PDAs, Pocket PCs, GPS
OMAP™ and Low-Power DSP Supply
Portable Media Players
Digital Cameras
Satellite Radio Modules
VIN
2.2
m
F
ENABLE
VIN_LDO1
EN_LDO1
VLDO1
VLDO1
400 mA LDO
FB1
R5
R6
4.7
m
F
VIN
2.2
m
F
ENABLE
VIN_LDO2/3
VLDO2
EN_LDO2
200 mA LDO
VLDO2
FB2
R7
R8
2.2
m
F
ENABLE
EN_LDO3
VLDO3
200 mA LDO
VLDO3
2.2
m
F
I/O voltage
THRESHOLD
Reset
RESET
R19
AGND
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TPS650531, TPS650532
TPS65053, TPS65058
SLVS754D – MARCH 2007 – REVISED JANUARY 2015
www.ti.com
Table of Contents
1
2
3
4
5
6
Features
..................................................................
Applications
...........................................................
Description
.............................................................
Revision History.....................................................
Pin Configuration and Functions
.........................
Specifications.........................................................
6.1
6.2
6.3
6.4
6.5
6.6
6.7
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Dissipation Ratings ..................................................
Electrical Characteristics...........................................
Typical Characteristics ..............................................
1
1
1
2
3
5
5
5
5
6
6
7
9
7.3 Feature Description.................................................
16
7.4 Device Functional Modes........................................
20
8
Application and Implementation
........................
21
8.1 Application Information............................................
21
8.2 Typical Application .................................................
21
9 Power Supply Recommendations......................
26
10 Layout...................................................................
26
10.1 Layout Guidelines .................................................
26
10.2 Layout Example ....................................................
27
11 Device and Documentation Support
.................
28
11.1
11.2
11.3
11.4
11.5
Device Support ....................................................
Related Links ........................................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
28
28
28
28
28
7
Detailed Description
............................................
13
7.1 Overview .................................................................
13
7.2 Functional Block Diagrams .....................................
14
12 Mechanical, Packaging, and Orderable
Information
...........................................................
28
4 Revision History
Changes from Revision C (June 2009) to Revision D
•
Page
Added
ESD Ratings
table,
Feature Description
section,
Device Functional Modes, Application and Implementation
section,
Power Supply Recommendations
section,
Layout
section,
Device and Documentation Support
section, and
Mechanical, Packaging, and Orderable Information
section ..................................................................................................
1
Changes from Revision B (February 2008) to Revision C
•
Page
Changed devices TPS650531 and TPS650532 to the Features and Ordering Information table. ........................................
1
Changes from Revision A (September 2007) to Revision B
•
Page
Changed the Functional Block Diagram - DCDC1 (I/O) Step-Down Converter From: 600 mA To: 1000 mA. ....................
14
Changes from Original (March 2007) to Revision A
•
•
Page
Added Output voltage range for LDO1, LDO2 and LDO3 to the Abs Max table....................................................................
5
Changed Output voltage range for LDO1 and LDO2 In the ROC table From: Max = V
INLDO1
, V
INLDO2
To: 3.6V ...................
5
2
Submit Documentation Feedback
Copyright © 2007–2015, Texas Instruments Incorporated
Product Folder Links:
TPS650531 TPS650532 TPS65053 TPS65058
TPS650531, TPS650532
TPS65053, TPS65058
www.ti.com
SLVS754D – MARCH 2007 – REVISED JANUARY 2015
5 Pin Configuration and Functions
RGE Package - TPS65053x
24 Pins
Top View
PGND1
L1
VINDCDC1/2
L2
PGND2
FB_DCDC2
18 17 16 15 14 13
FB_DCDC1
EN_DCDC1
EN_DCDC2
EN_LDO1
MODE
AGND
19
20
21
22
23
24
1 2 3 4 5 6
12
11
10
9
8
7
EN_LDO3
EN_LDO2
RESET
VLDO3
VINLDO2/3
VLDO2
RGE Package - TPS65058
24 Pins
Top View
PGND1
L1
VINDCDC1/2
L2
PGND2
FB_DCDC2
18 17 16 15 14 13
Vcc
VIN_LDO1
VLDO1
FB_LDO1
THRESH
FB_LDO2
FB_DCDC1
EN_DCDC1
EN_DCDC2
EN_LDO1
MODE
AGND
19
20
21
22
23
24
1 2 3 4 5 6
12
11
10
9
8
7
EN_LDO3
EN_LDO2
RESET
VLDO3
VINLDO2/3
VINLDO2
V
CC
VIN_LDO1
VLDO1
DEF_LDO
DEF_DCDC2
V
CC
Copyright © 2007–2015, Texas Instruments Incorporated
Submit Documentation Feedback
3
Product Folder Links:
TPS650531 TPS650532 TPS65053 TPS65058
TPS650531, TPS650532
TPS65053, TPS65058
SLVS754D – MARCH 2007 – REVISED JANUARY 2015
www.ti.com
Pin Functions
PIN
NAME
AGND
DEF_DCDC2
DEF_LDO
EN_DCDC1
EN_DCDC2
EN_LDO1
EN_LDO2
EN_LDO3
FB_DCDC1
FB_DCDC2
FB_LDO1
FB_LDO2
L1
L2
MODE
PGND1
PGND2
PowerPAD™
V
CC
VINDCDC1/2
VINLDO1
VINLDO2/3
VLDO1
VLDO2
VLDO3
THRESHOLD
RESET
TPS65053,
TPS650531,
TPS650532
24
—
—
20
21
22
11
12
19
13
4
6
17
15
23
18
14
—
1
16
2
8
3
7
9
5
10
TPS65058
24
5
4
20
21
22
11
12
19
13
—
—
17
15
23
18
14
—
1, 6
16
2
8
3
7
9
—
10
I/O
DESCRIPTION
I
I
I
I
I
I
I
I
I
I
1
I
O
O
I
I
I
—
I
I
I
I
O
O
O
I
O
Analog GND, connect to PGND and PowerPAD™
Switches output votlage at DCDC2, logic HIGH = 1.8V, logic LOW = 1.2V
Switches output votlage at LDO2, logic HIGH = 1.8V, logic LOW = 1.2V
Switches output votlage at LDO3, logic HIGH = 1.8V, logic LOW = 1.3V
Enable Input for converter 1, active high
Enable Input for converter 2, active high
Enable input for LDO1. Logic high enables the LDO, logic low disables the LDO.
Enable input for LDO2. Logic high enables the LDO, logic low disables the LDO.
Enable input for LDO3. Logic high enables the LDO, logic low disables the LDO.
Input to adjust output voltage of converter 1 between 0.6 V and V
I
. Connect
external resistor divider between VOUT1, this pin and GND.
Input to adjust output voltage of converter 2 between 0.6V and VIN. Connect
external resistor divider between VOUT2, this pin and GND.
Feedback input for the external voltage divider.
Feedback input for the external voltage divider.
Switch pin of converter 1. Connected to Inductor
Switch Pin of converter 2. Connected to Inductor.
Select between Power Save Mode and forced PWM Mode for DCDC1 and
DCDC2. In Power Save Mode, PFM is used at light loads, PWM for higher
loads. If PIN is set to high level, forced PWM Mode is selected. If Pin has low
level, then the device operates in Power Save Mode.
GND for converter 1
GND for converter 2
Connect to GND
Power supply for digital and analog circuitry of DCDC1, DCDC2 and LDOs. This
pin must be connected to the same voltage supply as VINDCDC1/2.
Input voltage for VDCDC1 and VDCDC2 step-down converter. This must be
connected to the same voltage supply as V
CC
.
Input voltage for LDO1
Input voltage for LDO2 and LDO3
Output voltage of LDO1
Output voltage of LDO2
Output voltage of LDO3
Reset input
Open drain active low reset output, 100 ms reset delay time.
4
Submit Documentation Feedback
Copyright © 2007–2015, Texas Instruments Incorporated
Product Folder Links:
TPS650531 TPS650532 TPS65053 TPS65058
TPS650531, TPS650532
TPS65053, TPS65058
www.ti.com
SLVS754D – MARCH 2007 – REVISED JANUARY 2015
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
(1)
MIN
V
I
I
I
V
O
T
A
T
J
T
stg
(1)
Input voltage on all pins except AGND, PGND, and EN_LDO1 pins with respect to AGND
Input voltage on EN_LDO1 pin with respect to AGND
Current at VINDCDC1/2, L1, PGND1, L2, PGND2
Current at all other pins
Output voltage for LDO1, LDO2 and LDO3
Operating free-air temperature
Maximum junction temperature
Storage temperature
–65
–0.3
–0.3
1800
1000
–0.3
–40
MAX
7
Vcc + 0.5
1800
1000
4.0
85
125
150
UNIT
V
V
mA
mA
V
°C
°C
°C
Stresses beyond those listed under
Absolute Maximum Ratings
may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under
Recommended Operating
Conditions
is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
6.2 ESD Ratings
VALUE
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001
(1)
V
(ESD)
(1)
(2)
Electrostatic discharge
Charged-device model (CDM), per JEDEC specification JESD22-
C101
(2)
±2000
±500
V
UNIT
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Manufacturing with
less than 500-V HBM is possible with the necessary precautions.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Manufacturing with
less than 250-V CDM is possible with the necessary precautions.
6.3 Recommended Operating Conditions
MIN
V
INDCDC1/2
V
DCDC1
V
DCDC2
V
INLDO1
,
V
INLDO2/3
Input voltage range for step-down converters
Output voltage range for VDCDC1 step-down converter for externally adjustable
versions
Output voltage range for VDCDC2 step-down converter for externally adjustable
versions
Input voltage range for LDOs
Output voltage range for LDO1 and LDO2 for externally adjustable versions
V
LDO1-2
Output voltage for LDO1 on TPS65058
Output voltage for LDO2 on TPS65058 (DEF_LDO = 1 / 0)
Output voltage for LDO3 on TPS65053
Output voltage for LDO3 on TPS650531
V
LDO3
Output voltage for LDO3 on TPS650532
Output voltage for LDO3 on TPS65058 (DEF_LDO = 1 / 0)
I
OUTDCDC1
L1
C
INDCDC1/2
C
OUTDCDC1
I
OUTDCDC2
Output current at L1 for TPS65053, TPS650531, TPS650532
Output current at L1 for TPS65058
Inductor at L1
(1)
(1)
NOM
MAX
6
V
INDCDC1
V
INDCDC2
6.5
3.6
UNIT
V
V
V
V
V
V
V
2.5
0.6
0.6
1.5
1
3.3
1.8 /
1.2
1.3
1.2
1.5
1.8 /
1.3
V
V
1000
600
mA
mA
μH
μF
μF
600
1000
mA
1.5
22
10
(1)
2.2
22
Input capacitor at V
INDCDC1/2
Output capacitor at V
DCDC1
Output current at L2 for TPS65053
Output current at L2 for TPS650531, TPS650532, TPS65058
(1)
See the
Application Information
section of this data sheet for more details.
Submit Documentation Feedback
5
Copyright © 2007–2015, Texas Instruments Incorporated
Product Folder Links:
TPS650531 TPS650532 TPS65053 TPS65058
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