TPS61180/1/2
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SLVS801E – DECEMBER 2007 – REVISED APRIL 2013
WLED DRIVER FOR NOTEBOOK DISPLAY
Check for Samples:
TPS61180/1/2
1
FEATURES
5 V to 24 V Input Voltage
Integrated 1.5 A 40 V MOSFET
1.0 MHz/1.3 MHz Switching Frequency
Boost Output Auto-Adaptive to WLED Voltages
Small External Components
Integrated Loop Compensation
Six Current Sink of 25 mA
Up to 10 WLED in Series
Less Than 3% Current Matching and Accuracy
Up to 1000:1 PWM Brightness DImming Range
Minimized Output Ripple Under PWM Dimming
•
•
•
•
•
•
Driver for Input/Output Isolation PFET
True Shutdown
Over Voltage Protection
WLED Open/Short Protection
Built-in Soft Start
16L 3 mm×3 mm QFN
•
•
•
•
•
•
•
•
•
•
•
APPLICATIONS
•
•
•
Notebook LCD Display Backlight
UMPC LCD Display Backlight
Backlight for Media Form Factor LCD display
DESCRIPTION
The TPS61180/1/2 ICs provide highly integrated solutions for media size LCD backlight. These devices have a
built-in high efficiency boost regulator with integrated 1.5A/40V power MOSFET. The six current sink regulators
provide high precision current regulation and matching. In total, the device can support up to 60 WLED. In
addition, the boost output automatically adjusts its voltage to the WLED forward voltage to improve efficiency.
The devices support pulse width modulation (PWM) brightness dimming. During dimming, the WLED current is
turned on/off at the duty cycle and frequency determined by the PWM signal input on the DCRTL pin. One
potential issue of PWM dimming is audible noises from the output ceramic capacitors. The TPS61180/1/2 family
is designed to minimize this output AC ripple across a wide dimming duty cycle and frequency range; therefore,
reducing the audible noise.
The TPS61180/1/2 ICs provide a driver output for an external PFET connected between the input and inductor.
During short circuit or over-current conditions, the ICs turn off the external PFET and disconnect the battery from
the WLEDs. The PFET is also turned off during IC shutdown (true shutdown) to prevent any leakage current of
the battery. The device also integrates over-voltage protection, soft-start and thermal shutdown.
The TPS61180 IC requires external 3.3V IC supply, while TPS61181 and TPS61182 ICs have a built-in linear
regulator for the IC supply. All the devices are in a 3×3 mm QFN package.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2007–2013, Texas Instruments Incorporated
TPS61180/1/2
SLVS801E – DECEMBER 2007 – REVISED APRIL 2013
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
Optional
5 V to 24 V
R3
100 kW
Q1
L1
10
m
H
D1
C2
4.7
m
F 10 WLED in series,120 mA total
C1
4.7
m
F
R2
51Ω
D2
Fault
C3
1
m
F
C4
0.1
m
F
EN
PWM Dimming
EN
DCTRL
ISET
R1
62 kW
VBAT
TPS61181/2
Cin
SW
V
O
IFB1
IFB2
IFB3
IFB4
IFB5
IFB6
PGND
GND
Figure 1. TPS61181/2 TYPICAL APPLICATION
ORDERING INFORMATION
(1)
PACKAGE
TPS61180RTE
TPS61181RTE
TPS61182RTE
(1)
IC SUPPLY
External 3.3 V
Built-in LDO
Built-in LDO
SWITCHING FREQUENCY
(TYP)
1.0 MHz
1.0 MHz
1.3 MHz
PACKAGE MARKING
CCG
CCH
CCI
For the most current package and ordering information, see the Package Option Addendum at the end
of this document, or see the TI website at
www.ti.com.
2
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TPS61180/1/2
Copyright © 2007–2013, Texas Instruments Incorporated
TPS61180/1/2
www.ti.com
SLVS801E – DECEMBER 2007 – REVISED APRIL 2013
PINOUT
QFN PACKAGE
16 Pin 3x3
(TOP VIEW)
Fault
IFB6
14
16
15
PGND
SW
V
BAT
V
O
1
13
12
IFB5
EN
IFB4
DCTRL
GND
IFB3
2
11
3
10
4
5
6
7
8
9
ISET
IFB1
TERMINAL FUNCTIONS
TERMINAL
NO.
1
2
3
4
5
6
NAME
PGND
SW
V
BAT
V
O
ISET
Cin
I
I
I
O
I
I
I
I
I
I
I
Power ground of the IC. Internally, it connects to the source of the PWM switch.
This pin connects to the drain of the internal PWM switch, external Schottky diode and inductor.
This pin is connected to the battery supply. It provides the pull-up voltage for the Fault pin and battery
voltage signal. For TPS61181/2, this is also the input to the internal LDO.
This pin monitors the output of the boost regulator. Connect this pin to the anode of the WLED strings.
The resistor on this pin programs the WLED output current.
Supply voltage of the IC. For TPS61181/2, it is the output of the internal LDO. Connect 0.1
μF
bypass
capacitor to this pin. For TPS61180, connect an external 3.3 V supply to power the IC.
Current sink regulation inputs. They are connected to the cathode of WLEDs. The PWM loop regulates
the lowest V
IFB
to 400 mV. Each channel is limited to 25 mA current.
Signal ground of the IC.
Dimming control logic input. The dimming frequency range is 100 Hz to 1 kHz.
The enable pin to the IC. For TPS61181/2, a logic high signal turns on the internal LDO and enables the
IC. Therefore, do not connect the EN pin to the Cin pin.
Gate driver output for an external PFET used for fault protection. It can also be used as signal output for
system fault report.
I/O
DESCRIPTION
7, 8, 9
IFB1-IFB3
12, 13, 14 IFB4-IFB6
10
11
15
16
GND
DCTRL
EN
Fault
IFB2
Cin
Copyright © 2007–2013, Texas Instruments Incorporated
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TPS61180/1/2
SLVS801E – DECEMBER 2007 – REVISED APRIL 2013
www.ti.com
FUNCTIONAL BLOCK DIAGRAM
Optional
5 V to 24 V
R3
100 kW
Fault
VBAT
C3
1
m
F
Cin
C4
0.1
m
F
Q1
R3
51
W
D2
SW
VO
L1
10
m
H
D1
10 WLED in series,120 mA total
C1
4.7
m
F
C2
4.7
m
F
Fault
Protection
Current Mode IFB 1... IFB 6
PWM Control
Internal Regulator
(TPS61181/2 only)
Dimming
Control
GND
EN
PWM Dimming
EN
DCTRL
Current
Regulator
IFB1
IFB2
IFB3
IFB4
IFB5
IFB6
PGND
ISET
R1
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)
Voltages on pin V
BAT
and Fault
Voltage on pin Cin
(2)
Voltage on pin SW and V
O
Voltage on all other pins
(2)
(2)
(2)
(2)
(1)
VALUE
–0.3 to 24
–0.3 to 3.6
–0.3 to 40
–0.3 to 20
–0.3 to 7
See Dissipation Rating Table
–40 to 150
–65 to 150
UNIT
V
V
V
V
V
°C
°C
Voltage on pin IFB1 to IFB6
Continuous power dissipation
Operating junction temperature range
Storage temperature range
(1)
(2)
Stresses beyond those listed under
absolute maximum ratings
may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under
recommended operating
conditions
is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values are with respect to network ground terminal.
DISSIPATION RATINGS
PACKAGE
TPS61180/1/2RTE
(1)
TPS61180/1/2RTE
(1)
(2)
(2)
R
θJA
270°C/W
48.7°C/W
T
A
≤
25°C
POWER RATING
370 mW
2.05 W
T
A
= 70°C
POWER RATING
204 mW
1.13 W
T
A
= 85°C
POWER RATING
148 mW
821 mW
The JEDEC low-K (1s) board used to derive this data was a 3in×3in, two-layer board with 2-ounce copper traces on top of the board.
The JEDEC high-K (2s2p) board used to derive this data was a 3in×3in, multilayer board with 1-ounce internal power and ground.
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Copyright © 2007–2013, Texas Instruments Incorporated
TPS61180/1/2
www.ti.com
SLVS801E – DECEMBER 2007 – REVISED APRIL 2013
RECOMMENDED OPERATING CONDITIONS
MIN
V
bat
C
in
V
O
L
C
I
C
O
F
PWM
T
A
T
J
Battery input voltage range
IC supply voltage range
Output voltage range
Inductor
Input capacitor
Output capacitor
PWM dimming frequency
Operating ambient temperature
Operating junction temperature
5.0
2.7
Vin
4.7
1
2.2
0.1
–40
–40
10
1
85
125
TYP
MAX
24
3.6
38
10
UNIT
V
V
V
μH
μF
μF
kHz
°C
°C
ELECTRICAL CHARACTERISTICS
V
BAT
= 10.8 V, 0.1
μF
at Cin, EN = Logic High, IFB current = 15m A, IFB voltage = 500 mV, T
A
= –40°C to 85°C, typical
values are at T
A
= 25°C (unless otherwise noted)
PARAMETER
SUPPLY CURRENT
V
BAT
V
cc
V
cin
I
q_bat
I
q_Vcc
I
Q_sw
I
SD
V
cc_UVLO
V
bat_UVLO
V
bat_hys
V
H
V
L
R
PD
T
SD
Battery input voltage range
IC supply voltage range
Cin pin output voltage
Operating quiescent current into V
BAT
Operating quiescent current into Cin pin
Operating quiescent current into V
O
Shutdown current
Cin pin under-voltage lockout threshold
V
BAT
under-voltage lockout threshold
V
BAT
under-voltage lockout hysteresis
Logic high voltage
Logic low voltage
Pull down resistor on both pins
EN pulse width to shutdown
EN high to low
TPS61180/1
TPS61182
400
27
21
1.204
ISET current = 15
μA
and 25
μA
Riset = 62K
ISET current = 15
μA
and 25
μA
IFB voltage = 20 V on all pins
IFB = 425 mV
Measured on V
IFB
(min)
Measured on V
IFB
(min)
25
400
700
16
100
V
CC
= 3.3 V for TPS61180
V
O
= 0 V
100
0.2
150
0.45
300
970
19.4
1.229
1000
20
1
800
TPS61180 only
TPS61181/TPS61182 only
Device enable, switching
no load, Vin = 24 V
TPS61180 only
V
O
= 35V
EN=GND
TPS61180 only
When Vin ramp down
When Vin ramp up
1.2
0.4
1600
37
28
1.253
1030
20.6
2.5
3
mA
%
μA
mA
mV
mV
V
mV
Ω
Ω
2
2.2
4.2
300
TPS61180
TPS61181/2
5.0
2.7
2.7
3.15
3.15
24
3.6
3.6
1
3
2
50
18
2.4
4.5
V
V
V
mA
mA
μA
μA
V
V
mV
V
V
kΩ
ms
TEST CONDITIONS
MIN
TYP
MAX
UNIT
EN AND DCTRL
CURRENT REGULATION
V
ISET
K
ISET
IFB
K
m
I
leak
I
IFB_MAX
V
IFB_L
V
IFB_H
V
reg_L
V
o_step
R
PWM_SW
R
start
ISET pin voltage
Current multiple Iout/ISET
Current accuracy
(I
max
–I
min
)/I
AVG
IFB pin leakage current
Current sink max output current
V
O
dial up threshold
V
O
dial down threshold
Min Vout regulation voltage
V
O
stepping voltage
PWM FET on-resistance
Start up charging resistance
V
BOOST OUTPUT REGULATION
POWER SWITCH
Copyright © 2007–2013, Texas Instruments Incorporated
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TPS61180/1/2
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