FDC655BN Single N-Channel, Logic Level, PowerTrench
®
MOSFET
Electrical Characteristics
T
A
= 25°C unless otherwise noted
Symbol
Off Characteristics
BV
DSS
∆
BV
DSS
∆
T
J
I
DSS
I
GSS
V
GS(th)
∆
V
GS(th)
∆
T
J
R
DS(on)
Drain–Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate–Body Leakage
V
GS
= 0 V, I
D
= 250
µ
A
I
D
= 250
µ
A, Referenced to 25
°
C
V
DS
= 24 V, V
GS
= 0 V
V
DS
= 24 V, V
GS
= 0 V, T
J
= -55
°
C
V
GS
=
±
20 V, V
DS
= 0 V
V
DS
= V
GS
, I
D
= 250
µ
A
I
D
= 250
µ
A, Referenced to 25
°
C
V
GS
= 10 V, I
D
= 6.3 A
V
GS
= 4.5 V, I
D
= 5.5 A
V
GS
= 10 V, I
D
= 6.3 A, T
J
=125
°
C
V
DS
= 10 V, I
D
= 6.3 A
V
DS
= 15 V, V
GS
= 0 V,
f = 1.0 MHz
1
1.9
– 4.1
20
26
27
20
25
33
45
30
23
1
10
±
100
3
V
mV/
°
C
µ
A
nA
Parameter
Test Conditions
Min
Typ
Max
Units
On Characteristics
(Note 2)
Gate Threshold Voltage
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
Forward Transconductance
V
mV/
°
C
m
Ω
g
FS
C
iss
C
oss
C
rss
R
G
t
d(on)
t
r
t
d(off)
t
f
Q
g(TOT)
Q
g(TOT)
Q
gs
Q
gd
I
S
V
SD
t
rr
Q
rr
Notes:
1.
S
Dynamic Characteristics
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
V
GS
= 15 mV, f = 1.0 MHz
V
DD
= 15 V, I
D
= 1 A,
V
GS
= 10 V, R
GEN
= 6
Ω
570
140
70
2.1
pF
pF
pF
Ω
16
8
35
6
15
8
ns
ns
ns
ns
nC
nC
nC
nC
Switching Characteristics
(Note 2)
Turn–On Delay Time
Turn–On Rise Time
Turn–Off Delay Time
Turn–Off Fall Time
Total Gate Charge at Vgs=10V
Total Gate Charge at Vgs=5V
Gate–Source Charge
Gate–Drain Charge
V
DD
= 15 V, I
D
= 6.3 A,
8
4
22
3
10
6
1.7
2.1
Drain–Source Diode Characteristics and Maximum Ratings
Maximum Continuous Drain–Source Diode Forward Current
Drain–Source Diode Forward Voltage V
GS
= 0 V, I
S
= 1.3 A
Diode Reverse Recovery Time
Diode Reverse Recovery Charge
(Note 2)
0.8
18
9
I
F
= 6.3 A, d
IF
/d
t
= 100 A/
µ
s
1.3
1.2
A
V
ns
nC
R
θ
JA
is the sum of the junction-to-case and case-to-ambient resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R
θ
JC
is
guaranteed by design while R
θ
CA
is determined by the user's board design.
a.
b.
78°C/W when mounted on a 1in
2
pad of 2oz copper on FR-4 board.
156°C/W when mounted on a minimum pad.
2.
Pulse Test: Pulse Width
≤
300
µ
s, Duty Cycle
≤
2.0%
2
FDC655BN Rev. C(W)
www.fairchildsemi.com
FDC655BN Single N-Channel, Logic Level, PowerTrench
®
MOSFET
Typical Characteristics
25
V
GS
= 10V
20
4.0V
2.2
V
GS
= 3.5V
2
1.8
1.6
1.4
1.2
1
0.8
0
1
2
3
0
5
10
15
20
25
V
DS
, DRAIN-SOURCE VOLTAGE (V)
I
D
, DRAIN CURRENT (A)
I
D
, DRAIN CURRENT (A)
6.0V
4.5V
15
3.5V
10
R
DS(ON)
, NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
4.0V
4.5V
5.0V
6.0V
10V
5
3.0V
0
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
0.09
1.6
R
DS(ON)
, NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
I
D
= 6.3A
V
GS
= 10.0V
I
D
= 3.2A
1.4
R
DS(ON)
, ON-RESISTANCE (OHM)
0.07
1.2
0.05
T
A
= 125
o
C
0.03
1
0.8
T
A
= 25 C
o
0.6
-50
-25
0
25
50
75
100
T
J
, JUNCTION TEMPERATURE (°C)
125
150
0.01
2
4
6
8
V
GS
, GATE TO SOURCE VOLTAGE (V)
10
Figure 3. On-Resistance Variation
withTemperature.
25
V
DS
= 5V
20
100
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
V
GS
= 0V
I
S
, REVERSE DRAIN CURRENT (A)
10
I
D
, DRAIN CURRENT (A)
1
15
T
A
= 125°C
25°C
-55°C
0.1
10
T
A
= 125° C
-55°C
5
25°C
0
1.5
2
2.5
3
3.5
4
4.5
V
GS
, GATE TO SOURCE VOLTAGE (V)
0.01
0.001
0.0001
0
0.2
0.4
0.6
0.8
1
1.2
V
SD
, BODY DIODE FORWARD VOLTAGE (V)
1.4
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
3
FDC655BN Rev. C(W)
www.fairchildsemi.com
FDC655BN Single N-Channel, Logic Level, PowerTrench
®
MOSFET
Typical Characteristics
10
800
I
D
= 6.3A
V
DS
= 10V
20V
f = 1MHz
V
GS
= 0 V
V
GS
, GATE-SOURCE VOLTAGE (V)
8
15V
CAPACITANCE (pF)
600
6
C
iss
400
4
C
oss
200
2
C
rss
0
0
2
4
6
8
Q
g
, GATE CHARGE (nC)
10
12
0
0
5
10
15
20
25
30
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics.
100
R
DS(ON)
LIMIT
100
µs
1ms
10ms
100ms
1s
1
DC
V
GS
= 10.0V
SINGLE PULSE
R
JA
= 156
o
C/W
T
A
= 25 C
0.01
0.1
1
10
100
V
DS
, DRAIN-SOURCE VOLTAGE (V)
o
Figure 8. Capacitance Characteristics.
5
P(pk), PEAK TRANSIENT POWER (W)
I
D
, DRAIN CURRENT (A)
10
4
SINGLE PULSE
R
JA
= 156°C/W
T
A
= 25°C
3
10s
2
0.1
1
0
0.1
1
10
t
1
, TIME (sec)
100
1000
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum
Power Dissipation.
r(t), NORMALIZED EFFECTIVE
TRANSIENT THERMAL RESISTANCE
1
D = 0.5
0.2
0.1
0.1
0.05
0.02
0.01
R
JA
(t) = r(t) * R
JA
R
JA
= 156°C/W
P(pk)
t
1
t
2
SINGLE PULSE
0.01
T
J
- T
A
= P * R
JA
(t)
Duty Cycle, D = t
1
/ t
2
0.01
0.1
t
1
, TIME (sec)
1
10
100
1000
0.001
0.0001
0.001
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c.
Transient thermal response will change depending on the circuit board design.
4
FDC655BN Rev. C(W)
www.fairchildsemi.com
FDC655BN Single N-Channel, Logic Level, PowerTrench
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
