Model 353
HCMOS VCXO
FEATURES
•
•
•
•
•
•
•
•
•
•
Standard 5.0mm x 3.2mm 6-Pad Surface Mount Package
HCMOS Output
Low Jitter Performance
Fundamental Crystal Designs
Frequency Range 1 – 80 MHz
Operating Voltages +2.5Vdc, +3.3Vdc or +5.0Vdc
Operating Temperature to -40°C to +85°C
Output Enable Standard
Tape & Reel Packaging Standard, EIA-418
RoHS/Green Compliant [6/6]
APPLICATIONS
Model 353 is ideal for applications such as broadband access, Ethernet/Gigabit Ethernet,
SONET/SDH, xDSL, PCMIA, digital video, Picocells and base stations.
ORDERING INFORMATION
353
SUPPLY VOLTAGE
N = +2.5 Vdc, Pin 2 Enable
L = +3.3 Vdc, Pin 2 Enable
S = +5.0 Vdc, Pin 2 Enable
T = +2.5 Vdc, Pin 5 Enable
V = +3.3 Vdc, Pin 5 Enable
W = +5.0 Vdc, Pin 5 Enable
ABSOLUTE PULL RANGE [APR]
B = ± 50 ppm APR
FREQUENCY STABILITY
6 = ± 20 ppm
3 = ± 50 ppm
5 = ± 25 ppm
2
PACKAGING OPTIONS
T - 1k pcs./reel
R - 3k pcs./reel
FREQUENCY
Product Frequency Code
1
OPERATING TEMPERATURE RANGE
A = -10°C to +60°C
C = -20°C to +70°C
I = -40°C to +85°C
2
1] Refer to document 016-1454-0, Frequency Code Tables.
3-digits required for frequencies below 100MHz and 4-digits for frequencies 100MHz or greater.
2] Consult factory for availability of 6I Stability/Temperature combination.
Not all performance combinations and frequencies may be available.
Contact your local CTS Representative or CTS Customer Service for availability.
PACKAGING INFORMATION
[reference]
Device quantity is 1k pcs. maximum per 180mm reel.
Document No. 008-0369-0
Page 1- 3
Rev. A
www.ctscorp.com
5.0mm x 3.2mm HCMOS VCXO
ELECTRICAL CHARACTERISTICS
PARAMETER
Maximum Supply Voltage
Maximum Control Voltage
Storage Temperature
Frequency Range
Frequency Stability
(See Note 1 and Ordering Information)
Model 353
SYMBOL
V
CC
V
C
T
STG
f
O
Δf/f
O
APR
Δf/f
25
T
A
CONDITIONS
-
-
-
-
-
-
First Year @ +25°C, nominal V
CC
and V
C
-
Model 353N, 353T, ±5%
Model 353L, 353V, ±5%
Model 353S, 353W, ±5%
C
L
= 15 pF
@ +2.5Vdc
@ +3.3Vdc
@ +5.0Vdc
-
Model 353N, 353T, V
CC
= 2.5V
Model 353L, 353V, V
CC
= 3.3V
Model 353S, 353W, V
CC
= 5.0V
+25°C @ Time of Shipment, over V
C
range
Best Straight Line Fit
-
-
@ 50% Level
Logic '1' Level, CMOS Load
Logic '0' Level, CMOS Load
@ 20%/80% Levels
Application of V
CC
@ -3dB
Pin 2 or Pin 5 Logic '1', Output Enabled
Pin 2 or Pin 5 Logic '0', Output Disabled
Pin 2 or Pin 5 Logic '1'
Bandwidth 12 kHz - 20 MHz
MIN
-0.5
-0.5
-40
-
±50
-3
-10
-20
-40
2.38
3.14
4.75
-
-
-
-
0.20
0.15
0.50
±100
-
10
45
0.9V
CC
-
-
-
12
0.7V
CC
-
-
-
TYP
-
-
-
1 - 80
-
-
-
+25
2.5
3.3
5.0
-
-
-
-
1.25
1.65
2.50
-
-
-
Positive
-
-
-
3
5
-
-
-
-
0.5
MAX
5.0
V
CC
+100
20, 25 or 50
-
3
+60
+70
+86
2.63
3.47
5.25
25
25
30
15
2.30
3.15
4.50
-
10
-
55
-
0.1V
CC
8.0
10
-
-
0.3V
CC
100
1
UNIT
V
V
°C
MHz
± ppm
ppm
ppm
°C
Absolute Pull Range
(See Note 2 and Ordering Information)
Aging
Operating Temperature
Supply Voltage
ELECTRICAL PARAMETERS
V
CC
V
Supply Current
I
CC
Output Load
Control Voltage
C
L
V
C
Frequency Deviation
Linearity
Input Impedance
Transfer Function
Output Duty Cycle
Output Voltage Levels
Rise and Fall Time
Start Up Time
Modulation Roll-off
Enable Function
Enable Input Voltage
Disable Input Voltage
Enable Time
Phase Jitter, RMS
Δf
L
Z
Vc
-
SYM
V
OH
V
OL
T
R
, T
F
T
S
-
V
IH
V
IL
T
PLZ
tjrms
mA
pF
V
ppm
%
kOhms
-
%
V
ns
ms
kHz
V
ns
ps
1. Notes:
2. Inclusive of initial tolerance at time of shipment, changes in supply voltage, load, temperature and 1year aging.
Minimum guaranteed frequency shift from f
O
over variations in temperature, aging, power supply and load.
ENABLE TRUTH TABLE
PIN 2 or Pin 5
Logic ‘1’
Open
Logic ‘0’
PIN 4
Output
Output
High Imp.
SINGLE SIDE BAND PHASE NOISE
(typical maximum)
Frequency Phase Noise Frequency
(dBc/Hz) *
Offset
Offset
10 Hz
-60
10k Hz
100 Hz
-90
100k Hz
1k Hz
-120
>100k Hz
* Results may vary depending on frequency.
Phase Noise
(dBc/Hz) *
-135
-150
-150
Document No. 008-0369-0
Page 2 - 3
Rev. A
5.0mm x 3.2mm HCMOS VCXO
TEST CIRCUIT, CMOS LOAD
OUTPUT WAVEFORM, CMOS
Model 353
MECHANICAL SPECIFICATIONS
PACKAGE DRAWING
MARKING INFORMATION
1. ** - Manufacturing Site Code.
2. D – Date Code. See Table I for codes.
3. ST – Frequency stability/temperature code.
[Refer to Ordering Information.]
CTS**D
353STV
●
xxx
4. V – Voltage code. N or T = 2.5V, L or V = 3.3V,
S or W = 5.0V
5. xxx – Frequency Code.
3-digits, frequencies below 100MHz
Refer to document 016-1454-0, Frequency Code Tables.
NOTES
1. Complete CTS part number, frequency value and
date code information must appear on reel and
carton labels.
2. Termination pads [e4]. Barrier-plating is nickel [Ni]
with gold [Au] flash plate.
3. Reflow conditions per JEDEC J-STD-020; 260°C
maximum, 20 seconds.
4. MSL = 1.
D.U.T. PIN ASSIGNMENTS
PIN
SYMBOL
1
2
3
4
5
6
V
C
EOH or N.C.
GND
Output
N.C. or EOH
V
CC
SUGGESTED SOLDER PAD GEOMETRY
C
BYPASS
should be
≥
0.01 uF.
DESCRIPTION
Control Voltage
Enable [std] or No Connect
Circuit & Package Ground
RF Output
No Connect or Enable [opt]
Supply Voltage
TABLE I – DATE CODE
MONTH
YEAR
2001
2002
2003
2004
2005
2006
2007
2008
2009
2010
2011
2012
2013
2014
2015
2016
2017
2018
2019
2020
JAN
A
N
a
n
FEB
B
P
b
p
MAR
C
Q
c
q
APR
D
R
d
r
MAY
E
S
e
s
JUN
F
T
f
t
JUL
G
U
g
u
AUG
H
V
h
v
SEP
J
W
j
w
OCT
K
X
k
x
NOV
L
Y
l
y
DEC
M
Z
m
z
Document No. 008-0369-0
Page 3 - 3
Rev. A
DSP 与 ARM 处理器
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