1. FEATURES ........................................................................................................................................................ 4
2. GENERAL DESCRIPTION ............................................................................................................................... 6
6. DATA PROTECTION.......................................................................................................................................... 9
Table 2. Protected Area Sizes ..............................................................................................................10
9-17. Page Program (PP) .............................................................................................................................35
9-18. 4 x I/O Page Program (4PP) ................................................................................................................36
9-19. Deep Power-down (DP) .......................................................................................................................37
9-20. Release from Deep Power-down (RDP), Read Electronic Signature (RES) .......................................38
9-21. Read Electronic Manufacturer ID & Device ID (REMS), (REMS2), (REMS4) .....................................40
9-22. ID Read ................................................................................................................................................41
10. POWER-ON STATE ....................................................................................................................................... 50
12-1. Initial Delivery State .............................................................................................................................56
14. ERASE AND PROGRAMMING PERFORMANCE ........................................................................................ 59
15. DATA RETENTION ........................................................................................................................................ 59
17. ORDERING INFORMATION .......................................................................................................................... 60
18. PART NAME DESCRIPTION ......................................................................................................................... 61
19. REVISION HISTORY ..................................................................................................................................... 64
P/N: PM1850
3
REV. 1.2, NOV. 11, 2013
MX25L1675E
16M-BIT [x 1/x 2/x 4] CMOS MXSMIO
®
(SERIAL MULTI I/O) FLASH MEMORY
1. FEATURES
GENERAL
• Serial Peripheral Interface compatible -- Mode 0 and Mode 3
•
16,777,216 x 1 bit structure or 8,388,608 x 2 bits (two I/O read mode) structure or 4,194,304 x 4 bits (four I/O
read mode) structure
• 512 Equal Sectors with 4K byte each
- Any Sector can be erased individually
• 32 Equal Blocks with 64K byte each
- Any Block can be erased individually
• Single Power Supply Operation
- 2.7 to 3.6 volt for read, erase, and program operations
• Latch-up protected to 100mA from -1V to Vcc +1V
• Default QE=1 (4 I/O) before factory shipping
PERFORMANCE
• High Performance
- Fast read
- 1 I/O: 104MHz with 8 dummy cycles
- 2 I/O: 85MHz with 4 dummy cycles
- 4 I/O: 85MHz with 6 dummy cycles
- Fast access time: 104MHz serial clock
- Serial clock of four I/O read mode : 85MHz, which is equivalent to 340MHz
- Fast program time: 0.6ms(typ.) and 3ms(max.)/page (256-byte per page)
- Byte program time: 9us (typical)
- Fast erase time: 40ms (typ.)/sector (4K-byte per sector) ; 0.4s(typ.) /block (64K-byte per block); 5s(typ.) /chip
• Low Power Consumption
- Low active read current: 25mA(max.) at 104MHz and 10mA(max.) at 33MHz
- Low active programming current: 15mA (typ.)
- Low active sector erase current: 9mA (typ.)
- Low standby current: 15uA (typ.)
• Typical 100,000 erase/program cycles
• 20 years data retention
P/N: PM1850
4
REV. 1.2, NOV. 11, 2013
MX25L1675E
SOFTWARE FEATURES
• Input Data Format
- 1-byte Command code
• Advanced Security Features
- Block lock protection
The BP0-BP3 status bit defines the size of the area to be software protection against program and erase
instructions
- Additional 512-bit secured OTP for unique identifier
• Auto Erase and Auto Program Algorithm
- Automatically erases and verifies data at selected sector
- Automatically programs and verifies data at selected page by an internal algorithm that automatically times the
program pulse widths (Any page to be programed should have page in the erased state first)
•
Status Register Feature
•
Electronic Identification
- JEDEC 1-byte manufacturer ID and 2-byte device ID
- RES command for 1-byte Device ID
- Both REMS,REMS2 and REMS4 commands for 1-byte manufacturer ID and 1-byte device ID
•
Support Serial Flash Discoverable Parameters (SFDP) mode
HARDWARE FEATURES
•
SCLK Input
- Serial clock input
• SI/SIO0
- Serial Data Input or Serial Data Input/Output for 2 x I/O read mode and 4 x I/O read mode
• SO/SIO1
- Serial Data Output or Serial Data Input/Output for 2 x I/O read mode and 4 x I/O read mode
• WP#/SIO2
- Hardware write protection or serial data Input/Output for 4 x I/O read mode
• NC/SIO3
- NC pin or serial data Input/Output for 4 x I/O read mode
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