VC-820
CMOS Crystal Oscillator
VC-820
Description
Vectron’s VC-820 Crystal Oscillator (XO) is a quartz stabilized square wave generator with a CMOS output. The VC-820 uses a
fundamental or a 3rd overtone crystal, oscillating in a fundamental tone, resulting in very low jitter performance, and a monolithic
IC which improves reliability and reduces cost.
Features
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CMOS output XO
Output Frequencies from 625kHz to 133.000 MHz
3.3V, 2.5 V and 1.8V Operation
Low Jitter Performance
Output Disable Feature
Operating Temperature ranging from -55°C to 125°C
Small Industry Standard Package, 2.5 x 3.2 x 1.0mm
Product is compliant to RoHS directive
and fully compatible with lead free assembly
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Applications
SONET/SDH/DWDM
Ethernet, GE, SynchE
Storage Area Networking
Fiber Channel
Digital Video
Broadband Access
Base Stations, Picocells
Block Diagram
V
DD
Output
Crystal
Oscillator
E/D
Page1
Gnd
Specifications
Performance Specifications
Table 1. Electrical Performance, 3.3V Option
Parameter
Voltage
1
Maximum Voltage
Current
2
≤20.000MHz
20.000 to 39.999MHz
40.000 to 49.999MHz
50.000 to 79.999MHz
80.000 to 99.999MHz
100.000 to 133.000MHz
Current, Output Disabled
Frequency
Nominal Frequency
3
Stability
4,8
(Ordering Option)
Output Logic Levels
2
, <40MHz
Output Logic High
Output Logic Low
Output Logic High Drive
Output Logic Low Drive
Output Logic Levels
2
, 40-99.99MHz
Output Logic High
Output Logic Low
Output Logic High Drive
Output Logic Low Drive
Output Logic Levels
2
, 100-133.000MHz
Output Logic High
Output Logic Low
Output Logic High Drive
Output Logic Low Drive
Load
Output Rise /Fall Time
2
Duty Cycle
2
,
5
Period Jitter
6
RMS
Peak-Peak
Random Jitter
Deterministic Jitter
RMS Jitter, 12k-20MHz, 125MHz
Output Enable/Disable
7
Output Enable
Output Disable
Disable time
Start-Up Time
Operating Temp (Ordering Option)
1]
2]
3]
4]
5]
6]
7]
8]
Symbol
V
DD
I
DD
Min
3.15
-0.5
Typical
3.3
Max
3.45
5
6
7
8
9
10
40
5
Units
V
V
mA
Supply Voltage
uA
MHz
ppm
f
N
0.625
±20, ±25, ±50, ±100
Outputs
133.000
V
OH
V
OL
I
OH
I
OL
V
OH
V
OL
I
OH
I
OL
V
OH
V
OL
I
OH
I
OL
I
OUT
t
R
/t
F
0.9*V
DD
0.1*V
DD
4
4
V
DD
-0.4
0.4
4
4
2.3
0.4
8
8
15
4
45
50
2.4
20.2
2.4
0
55
V
V
mA
mA
V
V
mA
mA
V
V
mA
mA
pF
ns
%
ps
фJ
фJ
Enable/Disable
V
IH
V
IL
t
D
t
SU
T
OP
0.7*V
DD
0.06
0.3
ps
0.3*V
DD
150
5
-10/70, -40/85, -40/105, -40/125, -55/105, -55/125
V
V
ns
ms
°C
The power supply should have by-pass capacitors as close to the supply and to ground as possible, for example 0.1 and 0.01uF.
Parameters are tested with the test circuit shown Figure 1.
See Standard Frequencies and Ordering Information tables for more specific information.
Includes initial accuracy, operating temperature, supply voltage, shock and vibration (not under operation) and aging.
Duty Cycle is measured as On Time/Period, see Fig 2.
Broadband Period Jitter measured using Wavecrest SIA3300C, 90K samples.
The Output is Enabled if the Enable/Disable is left open.
Only ±50 and ±100ppm stability options are available for -40/105 °C, -40/125 °C, -55/105 °C and -55/125 °C temperature range.
Page2
Specifications
Performance Specifications
Table 2. Electrical Performance, 2.5V Option
Parameter
Voltage
1
Maximum Voltage
Current
2
≤20.000MHz
20.000 to 39.999MHz
40.000 to 79.999MHz
80.000 to 99.999MHz
100.000 to 125.000MHz
Current, Output Disabled
Frequency
Nominal Frequency
3
Stability
4,8
(Ordering
Option)
Output Logic Levels
2,3
, <40MHz
Output Logic High
Output Logic Low
Output Logic High Drive
Output Logic Low Drive
Output Logic Levels
2
, 40-99.99MHz
Output Logic High
Output Logic Low
Output Logic High Drive
Output Logic Low Drive
Output Logic Levels
2
, 100-125.000MHz
Output Logic High
Output Logic Low
Output Logic High Drive
Output Logic Low Drive
Load
Output Rise /Fall Time
2
Duty Cycle
2,5
Period Jitter
6
, 125.000MHz
RMS
Peak-Peak
Random Jitter
Deterministic Jitter
RMS Jitter, 12k-20MHz, 125.000MHz
Output Enable/Disable
7
Output Enable
Output Disable
Disable time
Start-Up Time
Operating Temp (Ordering Option)
1]
2]
3]
4]
5]
6]
7]
8]
Symbol
V
DD
I
DD
Min
2.375
-0.5
Typical
2.5
Max
2.625
5
4.5
5.5
7
7.5
30
5
Units
V
V
mA
Supply Voltage
uA
MHz
ppm
f
N
0.625
±20, ±25, ±50, ±100
Outputs
125.000
V
OH
V
OL
I
OH
I
OL
V
OH
V
OL
I
OH
I
OL
V
OH
V
OL
I
OH
I
OL
I
OUT
t
R
/t
F
0.9*V
DD
0.1*V
DD
4
4
V
DD
-0.4
0.4
4
4
1.65
0.4
8
8
15
4
45
50
2.4
20.2
2.4
0
55
V
V
mA
mA
V
V
mA
mA
V
V
mA
mA
pF
ns
%
ps
фJ
фJ
Enable/Disable
V
IH
V
IL
t
D
t
SU
T
OP
0.7*V
DD
0.061
0.3
ps
0.3*V
DD
150
5
-10/70, -40/85, -40/105, -40/125, -55/105, -55/125
V
V
ns
ms
°C
The power supply should have by-pass capacitors as close to the supply and to ground as possible, for example 0.1 and 0.01uF.
Parameters are tested with the test circuit shown Figure 1.
See Standard Frequencies and Ordering Information tables for more specific information.
Includes initial accuracy, operating temperature, supply voltage, shock and vibration (not under operation) and aging.
Duty Cycle is measured as On Time/Period, see Fig 2.
Broadband Period Jitter measured using Wavecrest SIA3300C, 90K samples.
The Output is Enabled if the Enable/Disable is left open.
Only ±50 and ±100ppm stability options are available for -40/105 °C, -40/125 °C, -55/105 °C and -55/125 °C temperature range.
Page3
Performance Specifications
Table 3. Electrical Performance, 1.8V Option
Parameter
Voltage
1
Maximum Voltage
Current
2
≤40.000MHz
40.000 to 49.999MHz
50.000 to 79.999MHz
80.000 to 99.999MHz
100.0000 to 125.000MHz
Current, Output Disabled
Frequency
Nominal Frequency
3
Stability
4,8
(Ordering Option)
Outputs
Output Logic Levels
2,3
, <40.000MHz
Output Logic High
Output Logic Low
Output Logic High Drive
Output Logic Low Drive
Output Logic Levels
2,3
, 40.00-125MHz
Output Logic High
Output Logic Low
Output Logic High Drive
Output Logic Low Drive
Load
Output Rise /Fall Time
2
Duty Cycle
2,5
Period Jitter
6
RMS
Peak-Peak
Random Jitter
Deterministic Jitter
RMS Jitter, 12kHz-20MHz, 62.500MHz
Output Enable/Disable
7
Output Enable
Output Disable
Disable time
Start-Up Time
Operating Temp (Ordering Option )
1]
2]
3]
4]
5]
6]
7]
8]
Symbol
V
DD
I
DD
Min
Supply
1.71
-0.5
Typical
1.8
Max
1.89
3.6
2.5
3.5
6.5
7
20
10
Units
V
V
mA
uA
MHz
ppm
f
N
0.625
±20, ±25, ±50, ±100
125.000
V
OH
V
OL
I
OH
I
OL
V
OH
V
OL
I
OH
I
OL
I
OUT
t
R
/t
F
0.9*V
DD
0.1*V
DD
2.8
2.8
V
DD
-0.4
0.4
4
4
15
5
45
50
2.4
20.2
2.4
0
55
V
V
mA
mA
V
V
mA
mA
pF
ns
%
ps
фJ
фJ
Enable/Disable
V
IH
V
IL
t
D
t
SU
T
OP
0.7*V
DD
0.4
0.9
ps
0.3*V
DD
150
5
-10/70, -40/85, -40/105, -40/125, -55/105, -55/125
V
V
ns
ms
°C
The power supply should have by-pass capacitors as close to the supply and to ground as possible, for example 0.1 and 0.01uF.
Parameters are tested with the test circuit shown Figure 1.
See Standard Frequencies and Ordering Information tables for more specific information.
Includes initial accuracy, operating temperature, supply voltage, shock and vibration (not under operation) and aging.
Duty Cycle is measured as On Time/Period, see Fig 2.
Broadband Period Jitter measured using Wavecrest SIA3300C, 90K samples.
The Output is Enabled if the Enable/Disable is left open.
Only ±50 and ±100ppm stability options are available for -40/105 °C, -40/125 °C, -55/105 °C and -55/125 °C temperature range.
Page4
t
R
I
DD
+
V
DD
4
.1µF
.01µF
1
+
Period
Fig 1: Test Circuit
Fig 2: Waveform
t
F
V
OH
3
2
15pF
50%
V
OL
On Time
Outline Drawing & Pad Layout
1.0
XXXMXX
YYWW C
1.1
0.8
1.2max
1.3
Table 4. Pin Out
Pin
1
2
3
Dimensions in mm
4
Symbol
E/D
GND
Output
Function
Enable Disable
Case and Electrical Ground
Output
Power Supply Voltage
V
DD
Reliability
VI qualification will include aging at various extreme temperatures, shock and vibration, temperature cycling, and IR reflow
Typical Characteristics - Phase Noise and Gain Curve
simulation. The VC-820 family is capable of meeting the following qualification tests:
Table 4. Environmental Compliance
Parameter
Mechanical Shock
Mechanical Vibration
Solderability
Gross and Fine Leak
Resistance to Solvents
Moisture Sensitivity Level
Contact Pads
Conditions
MIL-STD-883, Method 2002
MIL-STD-883, Method 2007
MIL-STD-883, Method 2003
MIL-STD-883, Method 1014
MIL-STD-883, Method 2015
MSL 1
Gold (0.3um min - 1.um max) over Nickel
Although ESD protection circuitry has been designed into the VC-820 proper precautions should be taken when handling
and mounting. VI employs a human body model (HBM) and a charged device model (CDM) for ESD susceptibility testing
and design protection evaluation.
Table 5. ESD Ratings
Model
Human Body Model
Charged Device Model
Minimum
1500V
1000V
Page5
Conditions
MIL-STD-883, Method 3015
JESD22-C101
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