Surface Mount Chip Capacitors
Capacitance Table - Ultra-stable Dielectric C0G
Size
Rated voltage d.c.
Cap. range
0.5pF
1.0
1.2
1.5
1.8
2.2
2.7
3.3
3.9
4.7
5.6
6.8
8.2
10
12
15
18
22
27
33
39
47
56
68
82
100
120
150
180
220
270
330
390
470
560
680
820
1.0nF
1.2
1.5
1.8
2.2
2.7
3.3
3.9
4.7
5.6
6.8
8.2
10
12
15
18
22
27
33
39
47
56
68
82
100
16, 25, 50/63V
1206
1210
50
63
0603
16
Code
0p5
1p0
1p2
1p5
1p8
2p2
2p7
3p3
3p9
4p7
5p6
6p8
8p2
100
120
150
180
220
270
330
390
470
560
680
820
101
121
151
181
221
271
331
391
471
561
681
821
102
122
152
182
222
272
332
392
472
562
682
822
103
123
153
183
223
273
333
393
473
563
683
823
104
0805
50
63
1812
50
63
2220
50
63
2225
50
63
25
16
25
50
63
16 25
16 25
16
25
16
25
16
25
50
63
Minimum and Maximum capacitance values available
Maximum chip mm
0.8
1.3
1.6
Thickness
inches
0.031
0.051
0.063
Max. Reeled
7 inch
4000
3000
2500
Quantities
13 inch
16000
12000
10000
Minimum and Maximum values approved to CECC Specification (in capacitance
100-102
100-332
1B/CG
n/a
1.8
0.070
2000
8000
code), 50/63V
100-682
1.8
0.070
1000
4000
only.
221-183
1.8
0.070
1000
4000
471-333
1.8
0.070
1000
4000
561-473
Notes: 1. For details of ordering see page 37.
2. Capacitance values to the E24 range also available.
3. Higher capacitance values may be available with a corresponding increase in thickness.
4. Chips to a specified thickness can be supplied as a special requirement.
5. See page 12 for chip physical dimensions.
13
Syfer Technology Limited
Old Stoke Road
Arminghall
Norwich, Norfolk
NR14 8SQ
ENGLAND
Telephone
+44 (0)1603 723300
Telephone (Sales)
+44 (0)1603 723310
Fax
+44 (0)1603 723301
Email
sales@syfer.co.uk
Website
www.syfer.com
© Copyright Syfer Technology Limited - 1998.
FPGA/CPLD
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