Datasheet> 器件分类 > 逻辑> 逻辑> 74LV165DB,112

文档预览

74LV165DB,112: 产品描述counter shift registers 3.3V parallel load; 产品类别逻辑逻辑; 文件大小796KB，共20页; 制造商NXP(恩智浦); 官网地址https://www.nxp.com; 标准

下载文档详细参数选型对比全文预览

74LV165DB,112概述

counter shift registers 3.3V parallel load

74LV165DB,112规格参数

参数名称	属性值
Brand Name	NXP Semiconduc
是否Rohs认证	符合
厂商名称	NXP(恩智浦)
零件包装代码	SSOP1
包装说明	SSOP, SSOP16,.3
针数	16
制造商包装代码	SOT338-1
Reach Compliance Code	compli
其他特性	CLOCK INHIBIT
计数方向	RIGHT
系列	LV/LV-A/LVX/H
JESD-30 代码	R-PDSO-G16
JESD-609代码	e4
长度	6.2 mm
负载电容（CL）	50 pF
逻辑集成电路类型	PARALLEL IN SERIAL OUT
最大频率@ Nom-Su	20000000 Hz
湿度敏感等级	1
位数	8
功能数量	1
端子数量	16
最高工作温度	125 °C
最低工作温度	-40 °C
输出极性	COMPLEMENTARY
封装主体材料	PLASTIC/EPOXY
封装代码	SSOP
封装等效代码	SSOP16,.3
封装形状	RECTANGULAR
封装形式	SMALL OUTLINE, SHRINK PITCH
峰值回流温度（摄氏度）	260
电源	3.3 V
传播延迟（tpd）	90 ns
认证状态	Not Qualified
座面最大高度	2 mm
最大供电电压 (Vsup)	5.5 V
最小供电电压 (Vsup)	1 V
标称供电电压 (Vsup)	3.3 V
表面贴装	YES
技术	CMOS
温度等级	AUTOMOTIVE
端子面层	NICKEL PALLADIUM GOLD
端子形式	GULL WING
端子节距	0.65 mm
端子位置	DUAL
处于峰值回流温度下的最长时间	30
触发器类型	POSITIVE EDGE
宽度	5.3 mm
最小 fmax	78 MHz
Base Number Matches	1

文档预览

下载PDF文档

全文
预览

74LV165

8-bit parallel-in/serial-out shift register

Rev. 7 — 9 March 2016

Product data sheet

1. General description

The 74LV165 is an 8-bit parallel-load or serial-in shift register with complementary serial

outputs (Q7 and Q7) available from the last stage. When the parallel-load input (PL) is

LOW, parallel data from the inputs D0 to D7 are loaded into the register asynchronously.

When input PL is HIGH, data enters the register serially at the input DS. It shifts one place

to the right (Q0 Q1 Q2, etc.) with each positive-going clock transition. This feature

allows parallel-to-serial converter expansion by tying the output Q7 to the input DS of the

succeeding stage.

The clock input is a gate-OR structure which allows one input to be used as an active

LOW clock enable input (CE) input. The pin assignment for the inputs CP and CE is

arbitrary and can be reversed for layout convenience. The LOW-to-HIGH transition of the

input CE should only take place while CP HIGH for predictable operation. Either the CP or

the CE should be HIGH before the LOW-to-HIGH transition of PL to prevent shifting the

data when PL is activated.

2. Features and benefits



Wide supply voltage range from 1.0 V to 5.5 V

Synchronous parallel-to-serial applications

Optimized for low voltage applications: 1.0 V to 3.6 V

Synchronous serial input for easy expansion

Latch-up performance exceeds 250 mA

5.5 V tolerant inputs/outputs

Direct interface with TTL levels (2.7 V to 3.6 V)

Power-down mode

Complies with JEDEC standards:



JESD8-5 (2.3 V to 2.7 V)



JESD8B/JESD36 (2.7 V to 3.6 V)



JESD8-1A (4.5 V to 5.5 V)



ESD protection:



HBM JESD22-A114-A exceeds 2000 V



MM JESD22-A115-A exceeds 200 V



Specified from

40 C

to +85

C

and from

40 C

to +125

C

74LV165DB,112相似产品对比

	74LV165DB,112	74LV165PW-Q100J	74LV165D-Q100J	74LV165DB,118	74LV165PW,112	74LV165D,118
描述	counter shift registers 3.3V parallel load	counter shift registers 8bit serial-in parallel-out	counter shift registers 8bit serial-in parallel-out	counter shift registers 3.3V parallel load	counter shift registers prllel-load 8bit S/R	counter shift registers 3.3V parallel load
Brand Name	NXP Semiconduc	NXP Semiconduc	-	NXP Semiconduc	NXP Semiconduc	NXP Semiconductor
是否Rohs认证	符合	-	-	符合	符合	符合
厂商名称	NXP(恩智浦)	NXP(恩智浦)	-	NXP(恩智浦)	NXP(恩智浦)	NXP(恩智浦)
零件包装代码	SSOP1	TSSOP	-	SSOP1	TSSOP	SOP
包装说明	SSOP, SSOP16,.3	4.40 MM, PLASTIC, MO-153, SOT403-1, TSSOP-16	-	SSOP,	TSSOP, TSSOP16,.25	-
针数	16	16	-	16	16	16
制造商包装代码	SOT338-1	SOT403-1	-	SOT338-1	SOT403-1	SOT109-1
Reach Compliance Code	compli	unknow	-	compli	compli	compliant
其他特性	CLOCK INHIBIT	-	-	CLOCK INHIBIT	CLOCK INHIBIT	CLOCK INHIBIT
计数方向	RIGHT	-	-	RIGHT	RIGHT	RIGHT
系列	LV/LV-A/LVX/H	-	-	LV/LV-A/LVX/H	LV/LV-A/LVX/H	LV/LV-A/LVX/H
JESD-30 代码	R-PDSO-G16	-	-	R-PDSO-G16	R-PDSO-G16	R-PDSO-G16
JESD-609代码	e4	-	-	e4	e4	e4
长度	6.2 mm	-	-	6.2 mm	5 mm	9.9 mm
负载电容（CL）	50 pF	-	-	50 pF	50 pF	50 pF
逻辑集成电路类型	PARALLEL IN SERIAL OUT	-	-	PARALLEL IN SERIAL OUT	PARALLEL IN SERIAL OUT	PARALLEL IN SERIAL OUT
湿度敏感等级	1	-	-	1	1	1
位数	8	-	-	8	8	8
功能数量	1	-	-	1	1	1
端子数量	16	-	-	16	16	16
最高工作温度	125 °C	-	-	125 °C	125 °C	125 °C
最低工作温度	-40 °C	-	-	-40 °C	-40 °C	-40 °C
输出极性	COMPLEMENTARY	-	-	COMPLEMENTARY	COMPLEMENTARY	COMPLEMENTARY
封装主体材料	PLASTIC/EPOXY	-	-	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
封装代码	SSOP	-	-	SSOP	TSSOP	SOP
封装形状	RECTANGULAR	-	-	RECTANGULAR	RECTANGULAR	RECTANGULAR
封装形式	SMALL OUTLINE, SHRINK PITCH	-	-	SMALL OUTLINE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE
峰值回流温度（摄氏度）	260	-	-	260	260	260
传播延迟（tpd）	90 ns	-	-	90 ns	90 ns	90 ns
认证状态	Not Qualified	-	-	Not Qualified	Not Qualified	Not Qualified
座面最大高度	2 mm	-	-	2 mm	1.1 mm	1.75 mm
最大供电电压 (Vsup)	5.5 V	-	-	5.5 V	5.5 V	5.5 V
最小供电电压 (Vsup)	1 V	-	-	1 V	1 V	1 V
标称供电电压 (Vsup)	3.3 V	-	-	3.3 V	3.3 V	3.3 V
表面贴装	YES	-	-	YES	YES	YES
技术	CMOS	-	-	CMOS	CMOS	CMOS
温度等级	AUTOMOTIVE	-	-	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE
端子面层	NICKEL PALLADIUM GOLD	-	-	Nickel/Palladium/Gold (Ni/Pd/Au)	NICKEL PALLADIUM GOLD	NICKEL PALLADIUM GOLD
端子形式	GULL WING	-	-	GULL WING	GULL WING	GULL WING
端子节距	0.65 mm	-	-	0.65 mm	0.65 mm	1.27 mm
端子位置	DUAL	-	-	DUAL	DUAL	DUAL
处于峰值回流温度下的最长时间	30	-	-	30	30	30
触发器类型	POSITIVE EDGE	-	-	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE
宽度	5.3 mm	-	-	5.3 mm	4.4 mm	3.9 mm
最小 fmax	78 MHz	-	-	78 MHz	78 MHz	78 MHz
Base Number Matches	1	1	-	1	1	1

74LV165DB,112

74LV165DB,112概述

74LV165DB,112规格参数

文档预览

74LV165DB,112相似产品对比

推荐资源