Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed,
damage may occur and reliability may be affected.
Allowable Operating Ranges
at Ta =
40
to +105C, VSS = 0 V
Parameter
Supply voltage
Input high-level voltage
Input low-level voltage
Recommended external
resistor for RC oscillation
Recommended external
capacitor for RC oscillation
Guaranteed range of RC
oscillation
External clock operating
frequency
External clock duty cycle
Data setup time
Data hold time
CE wait time
CE setup time
CE hold time
High-level clock pulse width
Low-level clock pulse width
Rise time
Fall time
INH switching time
Symbol
VDD
VLCD
VIH1
VIH2
VIL1
VIL2
Rosc
Cosc
fosc
fCK
DCK
tds
tdh
tcp
tcs
tch
tH
tL
tr
tf
tc
VDD
VLCD
CE, CL, DI, INH
OSC external clock operating mode
CE, CL, DI, INH
OSC external clock operating mode
OSC RC oscillator operating mode
OSC RC oscillator operating mode
OSC RC oscillator operating mode
OSC external clock operating mode
[Figure 3]
OSC external clock operating mode
[Figure 3]
CL, DI
[Figure 1] [Figure 2]
CL, DI
CE, CL
CE, CL
CE, CL
CL
CL
CE, CL, DI
CE, CL, DI
INH, CE
[Figure 1] [Figure 2]
[Figure 1] [Figure 2]
[Figure 1] [Figure 2]
[Figure 1] [Figure 2]
[Figure 1] [Figure 2]
[Figure 1] [Figure 2]
[Figure 1] [Figure 2]
[Figure 1] [Figure 2]
[Figure 4] to [Figure 7]
10
19
19
30
160
160
160
160
160
160
160
160
160
Conditions
Ratings
min
2.7
2.7
0.8VDD
0.7VDD
0
0
39
1000
38
38
50
76
76
70
typ
max
6.0
6.0
6.0
VDD
0.2VDD
0.3VDD
unit
V
V
V
k
pF
kHz
kHz
%
ns
ns
ns
ns
ns
ns
ns
ns
ns
s
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended
Operating Ranges limits may affect device reliability.
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2
LC75832E, LC75832W
Electrical Characteristics
for the Allowable Operating Ranges
Parameter
Hysteresis
Input high-level
current
Input low-level
current
Output high-
level voltage
Symbol
VH
IIH1
IIH2
IIL1
IIL2
VOH1
VOH2
VOH3
Output low-level
voltage
VOL1
VOL2
VOL3
Output
middle-level
voltage
Oscillator
frequency
Current drain
VMID
fosc
IDD1
IDD2
ILCD1
ILCD2
ILCD3
Pin
CE, CL, DI, INH
CE, CL, DI, INH
OSC
CE, CL, DI, INH
OSC
S1 to S54
COM1, COM2
P1 to P4
S1 to S54
COM1, COM2
P1 to P4
COM1, COM2
OSC
VDD
VDD
VLCD
VLCD
VLCD
VI = 6.0 V
VI = VDD
external clock operating mode
VI = 0 V
VI = 0 V
external clock operating mode
IO =
20 A
IO =
100 A
IO =
1
mA
IO = 20
A
IO = 100
A
IO = 1 mA
1/2 bias IO =
100 A
RC oscillator operating mode
Rosc = 39kΩ, Cosc = 1000 pF
Power-saving mode
VDD = 6.0 V output open
fosc = 38 kHz
Power-saving mode
VLCD = 6.0 V output open
Static
fosc = 38 kHz
VLCD = 6.0 V output open
1/2 duty
fosc = 38 kHz
1/2VLCD
0.9
30.4
38
Conditions
Ratings
min
typ
0.1VDD
5.0
5.0
5.0
5.0
VLCD
0.9
VLCD
0.9
VLCD
0.9
0.9
0.9
0.9
1/2VLCD
+0.9
45.6
10
250
500
15
100
200
A
V
kHz
V
A
A
max
unit
V
V
1300
2600
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be
indicated by the Electrical Characteristics if operated under different conditions.
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3
LC75832E, LC75832W
1. When CL is stopped at the low level
CE
VIH1
VIL1
tH
CL
VIH1
50%
VIL1
tL
tr
tf
tcp
tcs
tch
DI
VIH1
VIL1
tds
tdh
Figure 1
2. When CL is stopped at the high level
VIH1
CE
VIL1
tL
CL
tf
DI
tds
tH
VIH1
50%
VIL1
tr
VIH1
VIL1
tcp
tcs
tch
tdh
Figure 2
3. OSC pin clock timing in external clock operating mode
tCKH
OSC
VIH2
50%
VIL2
tCKL
fCK=
1
tCKH+ tCKL
[kHz]
tCKH
100[%]
DCK=
tCKH+ tCKL
Figure 3
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4
LC75832E, LC75832W
Package Dimensions
unit : mm
[LC75832E]
PQFP64 14x14 / QIP64E
CASE 122BP
ISSUE A
14.00.1
14.00.1
64
1 2
17.20.2
0.8
(1.0)
0.35
0.15
0.15
3.0 MAX
(2.7)
0 to 10
0.10.1
0.10
SOLDERING FOOTPRINT*
16.30
GENERIC
MARKING DIAGRAM*
(Unit: mm)
XXXXXXXX
YMDDD
16.30
XXXXX = Specific Device Code
Y = Year
M = Month
DDD = Additional Traceability Data
*This information is generic. Please refer to
device data sheet for actual part marking.
NOTE: The measurements are not to guarantee but for reference only.
*For additional information on our Pb-Free strategy and soldering
details, please download the ON Semiconductor Soldering and
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