HFC0100
QUASI RESONANT CONTROLLER
The Future of Analog IC Technology
DESCRIPTION
The HFC0100 is a peak current mode controller
with Green Mode Operation. Its high efficiency
feature over the entire line and load range
meets the stringent world-wide energy
efficiency requirements.
The HFC0100 integrated with a high voltage
current source, its valley detector ensures
minimum Drain-Source voltage switching
(Quasi-Resonant operation). When the output
power falls below a given level, the controller
enters the burst mode.
The HFC0100 features variable protections like
Thermal Shutdown (TSD), Vcc Under voltage
Lockout (UVLO), Over Load Protection (OLP),
Over Voltage Protection (OVP).
The HFC0100 is available in the 8-pin SOIC8
package.
FEATURES
•
•
•
•
•
•
•
•
•
•
•
•
•
Universal Main Input Voltage (85~265VAC)
Quasi-Resonant Operation
Valley Switching for high efficiency and EMI
Active Burst Mode for low standby power
consumption
Internal High Voltage Current Source
High level of integration, allows a very low
number external component count
Maximum Frequency Limited
Internal Soft Start
Internal 250nS Leading Edge Blanking
Thermal shutdown (auto restart with
hysteresis)
Vcc Under Voltage Lockout with Hysteresis
(UVLO)
Over Voltage Protection
Over Load Protection.
APPLICATIONS
•
•
•
Battery charger: cellular phone, digital
camera, video camera, electrical shaver,
emergency lighting system, etc
Standby power supply: CRT-TV, Projection-
TV, LCD-TV, PDP-TV, Desk top PC, Audio
system, etc
SMPS: Inc jet printer, DVD player/recorder,
VCR, CD player, Set top box, Air
conditioner, refrigerator, washing machine,
dish washer, Adapter for NB, etc
For MPS green status, please visit MPS website under Quality Assurance.
“MPS” and “The Future of Analog IC Technology” are Registered Trademarks of
Monolithic Power Systems, Inc.
HFC0100 Rev. 1.01
www.MonolithicPower.com
9/23/2011
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
1
HFC0100—QUASI RESONANT CONTROLLER
TYPICAL APPLICATION
T1
*
+
+
*
RTN
*
HV
N/C
VCC
VSD
4
3
2
1
5
6
7
8
Drive
CS
GND
FB
HFC0100 Rev. 1.01
www.MonolithicPower.com
9/23/2011
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
2
HFC0100—QUASI RESONANT CONTROLLER
ORDERING INFORMATION
Part Number*
HFC0100HS
Package
SOIC8
Top Marking
HFC100
Free Air Temperature (T
A
)
-40°C to +125°C
*For Tape & Reel, add suffix –Z (e.g. HFC0100HS–Z);
For RoHS compliant packaging, add suffix –LF (e.g. HFC0100HS–LF–Z)
PACKAGE REFERENCE
TOP VIEW
VSD
VCC
NC
HV
1
2
3
4
8
7
6
5
FB
GND
CS
Drive
ABSOLUTE MAXIMUM RATINGS
(1)
Recommended Operation Conditions
(3)
HV Break Down Voltage .............. -0.7V to 700V
Vcc, DRV to GND ...........................-0.3V to 22V
FB, CS, VSD to GND ........................-0.3V to 7V
(2)
Continuous Power Dissipation…(T
A
= +25°C)
………………………………………………....1.3W
Junction Temperature ...............................150°C
Thermal Shut Down ..................................150°C
Thermal Shut Down Hysteresis ..................50°C
Lead Temperature ....................................260°C
Storage Temperature .............. -60°C to +150°C
ESD Capability Human Body Model (All Pins
except HV) ............................................... 2.0kV
ESD Capability Machine Model ................. 200V
Operating Vcc range ...........................8V to 20V
Maximum Junction Temp. (T
J
) ............. +125°C
Thermal Resistance
(4)
SOIC8 .....................................96 ...... 45 ...
°C/W
Notes:
1) Exceeding these ratings may damage the device.
2) The maximum allowable power dissipation is a function of the
maximum junction temperature T
J
(MAX), the junction-to-
ambient thermal resistance
θ
JA
, and the ambient temperature
T
A
. The maximum allowable continuous power dissipation at
any ambient temperature is calculated by P
D
(MAX) = (T
J
(MAX)-T
A
)/θ
JA
. Exceeding the maximum allowable power
dissipation will cause excessive die temperature, and the
regulator will go into thermal shutdown. Internal thermal
shutdown circuitry protects the device from permanent
damage.
3) The device is not guaranteed to function outside of its
operating conditions.
4) Measured on JESD51-7, 4-layer PCB.
θ
JA
θ
JC
HFC0100 Rev. 1.01
www.MonolithicPower.com
9/23/2011
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
3
HFC0100—QUASI RESONANT CONTROLLER
ELECTRICAL CHARACTERICS
For typical value T
J
=25℃
Parameter
Start-up Current Source (Pin HV)
Charging current from Pin HV
Leakage current from Pin HV
Symbol
I
charge
I
leak
Conditions
Vcc=6V;V
HV
=400V
With
auxiliary
supply; V
HV
=400V,
Vcc=13V
Min
1.4
--
700
10.6
7.2
--
Fs=100kHz,
Vcc=12V
VCC=6V
--
--
--
--
--
--
--
--
--
40
--
High
State;
Ipin2=3.0mA
Low State;
Ipin2=-2.0mA
Pull down from 2V
to -100mV
7
-0.8
120
6.6
--
--
--
--
--
--
--
Typ
2
20
--
11.8
8
5.5
2.0
450
10
4.5
3
2.4
0.5
0.7
3.7
55
10
7.5
-0.65
160
7.8
4.6
3.5
6
24
250
17
7
Max
2.6
--
--
13
8.8
--
--
--
--
--
--
--
--
--
--
70
--
8
V
-0.5
200
9
--
--
--
--
--
--
--
nS
μS
μS
μS
V
kΩ
nS
Ω
Ω
Unit
mA
μA
V
V
V
V
mA
μA
kΩ
V
--
mS
V
V
V
mV
mV
Break Down Voltage
V
BR
Supply Voltage Management (Pin Vcc)
Vcc Upper Level at which the Internal
V
CCH
High Voltage Current Source Stops
Vcc Lower Level at which the Internal
V
CCL
High Voltage Current Source Triggers
Vcc Re-charge Level at which the
Vccp
protection occurs
Internal IC Consumption, 1nF Load on
Icc1
Drive Pin,
Internal IC Consumption, Latch off
Icc2
phase,
Feedback Management (Pin FB)
Internal Pull Up Resistor
R
FB
Internal Pull Up Voltage
Vup
FB Pin to Current Limit Division Ratio
I
div
Internal Soft-Start Time
Tss
FB Decreasing Level at which the
V
BURL
controller enter the Burst Mode
FB Increasing Level at which the
V
BURH
controller leave the Burst Mode
Over Load Set Point
V
OLP
Valley Switching Management (Pin VSD)
Valley Switching Threshold Voltage
V
VSD
Valley Switching Hysteresis
V
hys
Pin VSD Clamp Voltage
Valley Switching Propagation Delay
V
VSDH
V
VSDL
T
VSD
Minimum Off Time
T
min
Re-start time After Last Valley detect
T
restart
Transition
OVP Sampling Delay
T
OVPS
Pin VSD OVP reference level
V
OVP
Internal Impedance
Rint
Current Sampling Management (Pin CS)
Leading Edge Blanking
T
LEB
Driving Signal (Pin DRIVE)
Sourcing Resistor
R
H
Sinking Resistor
R
L
HFC0100 Rev. 1.01
www.MonolithicPower.com
9/23/2011
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
4
HFC0100—QUASI RESONANT CONTROLLER
PIN FUNCTIONS
Pin #
1
2
3
4
5
6
7
8
Name
VSD
Vcc
N/C
HV
Drive
CS
GND
FB
Description
Input from the auxiliary flyback signal, it ensures discontinuous operation and valley
switching. It also offers a fixed OVP detection.
Supply voltage Pin. This pin is connected to an external bulk capacitor of typically 22uf and a
ceramic capacitor of typically 0.1uF.
This Pin ensures adequate creepage distance.
Input for the start up current unit.
Output of the driving signal.
Input of the current sense.
Ground.
The Pin sets the peak current limit, by connecting an optocoupler to this Pin. A feedback
voltage of 3.7V will trigger an over load protection, and a feedback voltage of 0.5V will trigger
a burst mode operation.
HFC0100 Rev. 1.01
www.MonolithicPower.com
9/23/2011
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
5
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