MCP23009/MCP23S09
8-Bit I/O Expander with Open-Drain Outputs
Features:
• 8-Bit Remote Bidirectional I/O Port:
- I/O Pins Default to Input
• Open-Drain Outputs:
- 5.5V Tolerant
- 25 mA Sink Capable (per Pin)
- 200 mA Total
• High-Speed I
2
C™ Interface (MCP23009):
- 100 kHz
- 400 kHz
- 3.4 MHz
• High-Speed SPI Interface (MCP23S09):
- 10 MHz
• Single Hardware Address Pin (MCP23009):
- Voltage input to allow up to eight devices on
the bus
• Configurable Interrupt Output Pins:
- Configurable as active-high, active-low or
open-drain
• Configurable Interrupt Source:
- Interrupt-on-Change from configured defaults
or pin change
• Polarity inversion register to configure the polarity
of the input port data
• External Reset Input
• Low Standby Current:
- 1 µA (-40°C
T
A
+85°C)
- 6 µA (+85°C
T
A
+125°C)
• Operating Voltage:
- 1.8V to 5.5V
• Available Packages:
- 16-Lead QFN (3x3x0.9 mm)
- 18-Lead PDIP (300 mil)
- 18-Lead SOIC (7.50 mm)
- 20-Lead SSOP (5.30 mm)
Block Diagram
MCP23S09
CS
SCK
SI
SO
SPI
MCP23009
SCL
SDA
RESET
INT
ADDR
Multi-Bit
Decode
8
Configuration/
Control
Registers
Control
I
2
C™
Serializer/
Deserializer
8
GP0
GP1
GP2
GP3
GP4
GP5
GP6
GP7
GPIO
2009-2014 Microchip Technology Inc.
DS20002121C-page 1
MCP23009/MCP23S09
Package Types
MCP23009
PDIP, SOIC
V
DD
NC
SCL
SDA
ADDR
RESET
INT
GP0
GP1
1
2
3
4
5
6
7
8
9
18
17
16
15
14
13
12
11
10
V
SS
NC
NC
GP7
GP6
GP5
GP4
GP3
GP2
V
SS
1
NC 2
V
DD
3
SCL 4
5
SDA
6
ADDR
7
RESET
8
INT
EP
17
MCP23009
3 x 3 QFN*
GP7
GP6
GP5
GP4
V
DD
NC
SCL
SDA
ADDR
RESET
INT
GP0
GP1
NC
1
2
3
4
5
6
7
8
9
10
MCP23009
SSOP
20
19
18
17
16
15
14
13
12
11
V
SS
NC
NC
GP7
GP6
GP5
GP4
GP3
GP2
NC
16 15 14 13
12 GP3
11 GP2
10 GP1
9 GP0
MCP23S09
PDIP/SOIC
V
DD
NC
CS
SCK
SI
SO
RESET
INT
GP0
1
2
3
4
5
6
7
8
9
18
17
16
15
14
13
12
11
10
V
SS
NC
GP7
GP6
GP5
GP4
GP3
GP2
GP1
V
SS
1
SCK 2
V
DD
3
CS 4
MCP23S09
3 x 3 QFN*
GP7
GP6
GP5
7
RESET
GP4
12 GP3
EP
17
11 GP2
10 GP1
9 GP0
5
SI
6
SO
8
INT
16 15 14 13
* Includes Exposed Thermal Pad (EP); see
Tables 1-1
and
1-2.
DS20002121C-page 2
2009-2014 Microchip Technology Inc.
MCP23009/MCP23S09
1.0
DEVICE OVERVIEW
The MCP23X09 device provides 8-bit, general purpose
parallel I/O expansion for I
2
C bus or SPI applications.
The two devices differ only in the serial interface.
• MCP23009 – I
2
C interface
• MCP23S09 – SPI interface
The MCP23X09 consists of multiple 8-bit configuration
registers for input, output and polarity selection. The
system master can enable the I/Os as either inputs or
outputs by writing the I/O configuration bits. The data
for each input or output is kept in the corresponding
input or output register. The polarity of the input port
register can be inverted with the polarity inversion
register. All registers can be read by the system master.
The interrupt output can be configured to activate
under two conditions (mutually exclusive):
1.
When any input state differs from its
corresponding input port register state. This is
used to indicate to the system master that an
input state has changed.
When an input state differs from a
pre-configured
register
value
(DEFVAL
register).
2.
The Interrupt Capture register captures port values at
the time of the Interrupt, thereby saving the condition
that caused the Interrupt.
The Power-On Reset (POR) sets the registers to their
default values and initializes the device state machine.
The hardware address pin is used to determine the
device address.
2009-2014 Microchip Technology Inc.
DS20002121C-page 3
MCP23009/MCP23S09
1.1
Pin Descriptions
I
2
C™ PINOUT DESCRIPTION (MCP23009)
Pin Number
Pin
Name
V
DD
NC
SCL
SDA
ADDR
RESET
INT
GP0
16-lead 18-lead
QFN PDIP/SOIC
3
2
4
5
6
7
8
9
1
2, 16-17
3
4
5
6
7
8
20-lead
SSOP
1
2, 10-11,
18-19
3
4
5
6
7
8
Pin
Type
P
—
I
I/O
I
I
O
I/O
Power
Not connected
Serial clock input
Serial data I/O
Hardware address pin allows up to eight slave devices on the
bus
Hardware reset
Interrupt output for port. Can be configured as active-high,
active-low or open-drain.
Bidirectional I/O pin (5.5V tolerant inputs; open-drain outputs).
Can be enabled for interrupt on change and/or internal pull-up
resistor.
Bidirectional I/O pin (5.5V tolerant inputs; open-drain outputs).
Can be enabled for interrupt on change and/or internal pull-up
resistor.
Bidirectional I/O pin (5.5V tolerant inputs; open-drain outputs).
Can be enabled for interrupt on change and/or internal pull-up
resistor.
Bidirectional I/O pin (5.5V tolerant inputs; open-drain outputs).
Can be enabled for interrupt on change and/or internal pull-up
resistor.
Bidirectional I/O pin (5.5V tolerant inputs; open-drain outputs).
Can be enabled for interrupt on change and/or internal pull-up
resistor.
Bidirectional I/O pin (5.5V tolerant inputs; open-drain outputs).
Can be enabled for interrupt on change and/or internal pull-up
resistor.
Bidirectional I/O pin (5.5V tolerant inputs; open-drain outputs).
Can be enabled for interrupt on change and/or internal pull-up
resistor.
Bidirectional I/O pin (5.5V tolerant inputs; open-drain outputs).
Can be enabled for interrupt on change and/or internal pull-up
resistor.
Ground
Exposed Thermal Pad (EP). Can be left floating or connected
to V
SS
.
Standard Function
TABLE 1-1:
GP1
10
9
9
I/O
GP2
11
10
12
I/O
GP3
12
11
13
I/O
GP4
13
12
14
I/O
GP5
14
13
15
I/O
GP6
15
14
16
I/O
GP7
16
15
17
I/O
V
SS
EP
1
17
18
—
20
—
P
—
DS20002121C-page 4
2009-2014 Microchip Technology Inc.
MCP23009/MCP23S09
TABLE 1-2:
Pin
Name
V
DD
NC
CS
SCK
SI
SO
RESET
INT
GP0
GP1
GP2
GP3
GP4
GP5
GP6
GP7
V
SS
EP
SPI PINOUT DESCRIPTION (MCP23S09)
Pin Number
Pin
Type
P
—
I
I
I
O
I
O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
P
—
Standard Function
Power (high-current capable)
Not connected
Chip select
Serial clock input
Serial data input
Serial data out
Hardware reset (must be externally biased)
Interrupt output for port. Can be configured as active-high, active-low or
open-drain.
Bidirectional I/O pin (5.5V tolerant inputs; open-drain outputs). Can be
enabled for Interrupt-on-Change and/or internal pull-up resistor.
Bidirectional I/O pin (5.5V tolerant inputs; open-drain outputs). Can be
enabled for Interrupt-on-Change and/or internal pull-up resistor.
Bidirectional I/O pin (5.5V tolerant inputs; open-drain outputs). Can be
enabled for Interrupt-on-Change and/or internal pull-up resistor.
Bidirectional I/O pin (5.5V tolerant inputs; open-drain outputs). Can be
enabled for Interrupt-on-Change and/or internal pull-up resistor.
Bidirectional I/O pin (5.5V tolerant inputs; open-drain outputs). Can be
enabled for Interrupt-on-Change and/or internal pull-up resistor.
Bidirectional I/O pin (5.5V tolerant inputs; open-drain outputs). Can be
enabled for Interrupt-on-Change and/or internal pull-up resistor.
Bidirectional I/O pin (5.5V tolerant inputs; open-drain outputs). Can be
enabled for Interrupt-on-Change and/or internal pull-up resistor.
Bidirectional I/O pin (5.5V tolerant inputs; open-drain outputs). Can be
enabled for Interrupt-on-Change and/or internal pull-up resistor.
Ground (high-current capable)
Exposed Thermal Pad (EP). Can be left floating or connected to V
SS
.
16-lead 18-lead
QFN PDIP/SOIC
3
—
4
2
5
6
7
8
9
10
11
12
13
14
15
16
1
17
1
2, 17
3
4
5
6
7
8
9
10
11
12
13
14
15
16
18
—
2009-2014 Microchip Technology Inc.
DS20002121C-page 5
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