IDT74FCT3573/A
3.3V CMOS OCTAL TRANSPARENT LATCH
INDUSTRIAL TEMPERATURE RANGE
3.3V CMOS OCTAL
TRANSPARENT
LATCH
FEATURES:
• 0.5 MICRON CMOS Technology
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
• V
CC
= 3.3V ±0.3V, Normal Range
• V
CC
= 2.7V to 3.6V, Extended Range
μ
• CMOS power levels (0.4μW typ. static)
• Rail-to-Rail output swing for increased noise margin
• Available in QSOP package
IDT74FCT3573/A
DESCRIPTION:
The FCT3573/A are octal transparent latches built using an advanced
dual metal CMOS technology.
These octal latches have 3-state outputs and are intended for bus
oriented applications. The flip-flops appear transparent to the data when
Latch Enable (LE) is high. When LE is low, the data that meets the set-up
time is latched. Data appears on the bus when the Output Enable (OE) is
low. When
OE
is high, the bus output is in the high-impedance state.
FUNCTIONAL BLOCK DIAGRAM
D
0
D
Q
G
D
1
D
Q
G
D
2
D
Q
G
D
3
D
Q
G
D
4
D
Q
G
D
5
D
Q
G
D
6
D
Q
G
D
7
D
Q
G
LE
OE
Q
0
Q
1
Q
2
Q
3
Q
4
Q
5
Q
6
Q
7
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
1
© 2009 Integrated Device Technology, Inc.
OCTOBER 2009
DSC-5418/7
IDT74FCT3573/A
3.3V CMOS OCTAL TRANSPARENT LATCH
INDUSTRIAL TEMPERATURE RANGE
PIN CONFIGURATION
OE
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
GND
1
2
3
4
5
6
7
8
9
10
QSOP
TOP VIEW
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
Description
Terminal Voltage with Respect to GND
Terminal Voltage with Respect to GND
Terminal Voltage with Respect to GND
Storage Temperature
DC Output Current
Max
–0.5 to +4.6
–0.5 to +7
–0.5 to V
CC
+0.5
–65 to +150
–60 to +60
Unit
V
V
V
°C
mA
20
19
18
17
16
15
14
13
12
11
V
CC
Q
0
Q
1
Q
2
Q
3
Q
4
Q
5
Q
6
Q
7
LE
V
TERM(2)
V
TERM(3)
V
TERM(4)
T
STG
I
OUT
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may
cause permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in
the operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect reliability.
2. V
CC
terminals.
3. Input terminals.
4. Outputs and I/O terminals.
CAPACITANCE
(T
A
= +25°C, F = 1.0MHz)
Symbol
C
IN
C
OUT
Parameter
(1)
Input Capacitance
Output Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
Typ.
3.5
4
Max.
6
8
Unit
pF
pF
NOTE:
1. This parameter is measured at characterization but not tested.
PIN DESCRIPTION
Pin Names
D
X
LE
OE
Q
X
Data Inputs
Latch Enable Input (Active HIGH)
Output Enable Input (Active LOW)
3-State Outputs
Description
FUNCTION TABLE
(1)
Dx
H
L
X
NOTE:
1. H = HIGH Voltage Level
X = Don’t Care
L = LOW Voltage Level
Z = High Impedance
Inputs
LE
H
H
X
OE
L
L
H
Outputs
Qx
H
L
Z
2
IDT74FCT3573/A
3.3V CMOS OCTAL TRANSPARENT LATCH
INDUSTRIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Industrial: T
A
= -40°C to +85°C, V
CC
= 2.7V to 3.6V
Symbol
V
IH
V
IL
I
IH
I
IL
I
OZH
I
OZL
V
IK
I
ODH
I
ODL
V
OH
Parameter
Input HIGH Level (Input pins)
Input HIGH Level (I/O pins)
Input LOW Level
(Input and I/O pins)
Input HIGH Current (Input pins)
Input HIGH Current (I/O pins)
Input LOW Current (Input pins)
Input LOW Current (I/O pins)
High Impedance Output Current
(3-State Output pins)
Clamp Diode Voltage
Output HIGH Current
Output LOW Current
Output HIGH Voltage
V
CC
= Min., I
IN
= –18mA
V
CC
= 3.3V, V
IN
= V
IH
or V
IL
, V
O
= 1.5V
(3)
V
CC
= 3.3V, V
IN
= V
IH
or V
IL
, V
O
= 1.5V
(3)
V
CC
= Min.
V
IN
= V
IH
or V
IL
V
CC
= 3V
V
IN
= V
IH
or V
IL
V
OL
Output LOW Voltage
V
CC
= Min.
V
IN
= V
IH
or V
IL
V
CC
= 3V
V
IN
= V
IH
or V
IL
I
OS
V
H
I
CCL
I
CCH
I
CCZ
Short Circuit Current
(4)
Input Hysteresis
Quiescent Power Supply Current
V
CC
= Max., V
O
= GND
(3)
—
V
CC
= Max., V
IN
= GND or V
CC
–60
—
—
–135
150
0.1
–240
—
10
mA
mV
µA
I
OL
= 0.1mA
I
OL
= 16mA
I
OL
= 24mA
I
OL
= 24mA
—
—
—
—
0.2
0.3
0.3
0.2
0.4
0.55
0.5
V
I
OH
= –0.1mA
I
OH
= –3mA
I
OH
= –8mA
V
CC
= Max.
V
CC
= Max.
V
I
= 5.5V
V
I
= V
CC
V
I
= GND
V
I
= GND
V
O
= V
CC
V
O
= GND
—
—
—
—
—
—
—
–36
50
V
CC
–0.2
2.4
2.4
(5)
—
—
—
—
—
—
–0.7
–60
90
—
3
3
±1
±1
±1
±1
±1
±1
–1.2
–110
200
—
—
—
V
mA
mA
V
µA
µA
Guaranteed Logic LOW Level
Test Conditions
(1)
Guaranteed Logic HIGH Level
Min.
2
2
–0.5
Typ.
(2)
—
—
—
Max.
5.5
Vcc+0.5
0.8
V
Unit
V
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 3.3V, +25°C ambient and maximum loading.
3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.
4. This parameter is guaranteed but not tested.
5. V
OH
= V
CC
- 0.6V at rated current.
3
IDT74FCT3573/A
3.3V CMOS OCTAL TRANSPARENT LATCH
INDUSTRIAL TEMPERATURE RANGE
POWER SUPPLY CHARACTERISTICS
Symbol
I
CC
I
CCD
Parameter
Quiescent Power Supply Current
Dynamic Power Supply
Current
(4)
V
CC
= Max.
V
CC
= Max.
Outputs Open
OE
= GND
One Input Toggling
50% Duty Cycle
I
C
Total Power Supply Current
(6)
V
CC
= Max.
Outputs Open
f
I
= 10MHz
50% Duty Cycle
OE
= GND
LE = V
CC
One Bit Toggling
V
CC
= Max.
Outputs Open
f
I
= 2.5MHz
50% Duty Cycle
OE
= GND
LE = V
CC
Eight Bits Toggling
V
IN
= V
CC
V
IN
= GND
V
IN
= V
CC
- 0.6V
V
IN
= GND
—
0.6
0.9
mA
Test Conditions
(1)
V
IN
= V
CC
- 0.6V
V
IN
= V
CC
V
IN
= GND
Min.
—
—
Typ.
(2)
2
60
Max.
30
85
Unit
μA
μA/
MHz
—
0.6
0.9
V
IN
= V
CC
V
IN
= GND
V
IN
= V
CC
- 0.6V
V
IN
= GND
—
1.2
1.7
(5)
—
1.2
1.8
(5)
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 3.3V, +25°C ambient.
3. Per TTL driven input. All other inputs at V
CC
or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of
ΔI
CC
formula. These limits are guaranteed but not tested.
6. I
C
= I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
ΔI
CC
D
H
N
T
+ I
CCD
(f
CP
N
CP
/2 + fiNi)
I
CC
= Quiescent Current (I
CC
, I
CCH
, and I
CCZ
)
ΔI
CC
= Power Supply Current for a TTL High Input
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current caused by an Input Transition Pair (HLH or LHL)
f
CP
= Clock Frequency for register devices (zero for non-register devices)
N
CP
= Number of clock inputs at f
CP
fi = Input Frequency
Ni = Number of Inputs at fi
4
IDT74FCT3573/A
3.3V CMOS OCTAL TRANSPARENT LATCH
INDUSTRIAL TEMPERATURE RANGE
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
(1)
74FCT3573
Symbol
t
PLH
t
PHL
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
SU
t
H
t
W
Parameter
Propagation Delay
Dx to Qx
Propagation Delay
LE to Qx
Output Enable Time
Output Disable Time
Set-up Time HIGH or LOW, D
X
to LE
Hold Time HIGH or LOW, D
X
to LE
LE Pulse Width HIGH
Condition
C
L
= 50pF
R
L
= 500Ω
(2)
Min.
1.5
2
(3)
Max.
8
13
12
7.5
—
—
—
74FCT3573A
Min.
Max.
1.5
5.2
(3)
Unit
ns
ns
ns
ns
ns
ns
ns
2
1.5
1.5
2
1.5
5
8.5
6.5
5.5
—
—
—
1.5
1.5
2
1.5
6
NOTES:
1. Propagation Delays and Enable/Disable times are with V
CC
= 3.3V ±0.3V, Normal Range. For V
CC
= 2.7V to 3.6V, Extended Range, all Propagation Delays and Enable/
Disable times should be degraded by 20%.
2. See test circuit and waveforms.
3. Minimum limits are guaranteed but not tested on Propagation Delays.
5
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