Freescale Semiconductor
Technical Data
Document Number: MC35XS3500
Rev. 8.0, 8/2013
Smart Rear Corner Light Switch
(Penta 35 mOhm)
The 35XS3500 is designed for low-voltage automotive and
industrial lighting applications. Its five low R
DS(ON)
MOSFETs (five
35 m) can control the high sides of five separate resistive loads
(bulbs and LEDs).
Programming, control and diagnostics are accomplished using a
16-bit SPI interface (3.3 V or 5.0 V). Each output has its own pulse-
width modulation (PWM) control via the SPI. The 35XS3500 has
highly sophisticated failure mode handling to provide high availability
of the outputs. Its multiphase control and output edge shaping
improves electromagnetic compatibility (EMC) behavior.
The 35XS3500 is packaged in a power-enhanced 12 x 12 mm
nonleaded PQFN package with exposed tabs.
Features
• Penta 35 m high side switches
• 16-bit SPI communication interface with daisy chain capability
• Current sense output with SPI-programmable multiplex switch
and board temperature feedback
• Digital diagnosis feature
• PWM module with multiphase feature including prescaler
• LEDs control including accurate current sensing and low duty-
cycle capability
• Fully protected switches
• Over-current shutdown detection
• Power net and reverse polarity protection
• Low-power mode
• Fail-safe mode functions including autorestart feature
• External smart power switch control including current recopy
12V
5.0V
35XS3500
HIGH SIDE SWITCH
Bottom View
FK SUFFIX
98ART10511D
24-PIN PQFN
PB FREE
ORDERING INFORMATION
Device
(For Tape and Reel,
Add R2 Suffix)
MC35XS3500HFK
* MC35XS3500DHFK
Temperature
Range (T
A
)
-40 to 125 °C
Package
24 PQFN
* Recommended for all new designs
12V
35XS3500
VCC
Watchdog
LIMP
FLASHER
STOP
IGN
RST
CLOCK
CS
VBAT
CP
OUT1
OUT2
OUT3
OUT4
MCU
OUT5
S0
FETIN
SI
SCLK
FETOUT
CSNS GND
Smart
Switch
Figure 1. 35XS3500 Simplified Application Diagram
Freescale Semiconductor, Inc. reserves the right to change the detail specifications,
as may be required, to permit improvements in the design of its products.
© Freescale Semiconductor, Inc., 2010-2013. All rights reserved.
DEVICE VARIATIONS
DEVICE VARIATIONS
Table 1. MC35XS3500 Device Variations
Part Number
MC35XS3500HFK
MC35XS3500DHFK
Package
24 PQFN
Temp.
-40 to 125 °C
Initial release
D version is more robust against V
BAT
interrupt
Comment
35XS3500
2
Analog Integrated Circuit Device Data
Freescale Semiconductor
INTERNAL BLOCK DIAGRAM
INTERNAL BLOCK DIAGRAM
VCC
VBAT
CP
R
UP
V
CC
failure
detection
Internal
Regulator
OV/UV/POR
detections
Charge
Pump
CS
SO
SI
SCLK
R
DWN
CLOCK
LIMP
STOP
FLASHER
IGN
RST
Logic
LED Control
Over-current
Detection
Open Load
Detection
Over-temperature
Detection
OUT1
Gate Drive
drain/gate clamp
OUT1
R
DWN
OUT2
OUT2
Over-temperature
Prewarning
OUT3
OUT3
OUT4
OUT4
OUT5
OUT5
CSNS
Selectable Output Current
Recopy (Analog MUX)
Current Recopy
Synchronization
VCC
Driver for External
MOSFET
FETIN
Temperature
Feedback
FETOUT
GND
Figure 2. 35XS3500 Simplified Internal Block Diagram
35XS3500
Analog Integrated Circuit Device Data
Freescale Semiconductor
3
PIN CONNECTIONS
PIN CONNECTIONS
FLASHER
FETOUT
CLOCK
13 12 11 10
CP
GND
16
17
9
8
7
6
5
4
3
2
24
14
GND
23
FETIN
1
CSNS
GND
22
OUT1
Definition
STOP
SCLK
LIMP
VCC
RST
OUT5
18
15
VBAT
19
OUT4
20
OUT3
21
OUT2
Figure 3. 35XS3500 Pin Connections (Transparent Package Top View)
Table 2. 35XS3500 Pin Definitions
Functional descriptions these pins can be found in the
Functional Description
section beginning on
page 20.
Pin
1
2
3
Pin Name
Pin Function
Input
Input
Input
Formal Name
External FET Input
Ignition Input
(Active High)
Reset
FETIN
IGN
RST
This pin is the current sense recopy of the external MOSFET.
This input wakes the device. It also controls outputs 1 and 2 in case of
Fail mode activation. This pin has a passive internal pull-down.
This input wakes the device. It is also used to initialize the device
configuration and fault registers through the SPI. This pin has a passive
internal pull-down.
This input wakes the device. This pin has a passive internal pull-down.
This pin state depends on RST logic level.
As long as RST input pin is set to logic [0], this pin is pulled up in order to
report wake event. Otherwise, the PWM frequency and timing are
generated from this digital clock input by the PWM module.
This pin has a passive internal pull-down.
The Fail mode can be activated by this digital input. This pin has an active
internal pull-down current source.
This input wakes the device. This pin has a passive internal pull-down.
When this signal is high, SPI signals are ignored. Asserting this pin low
starts a SPI transaction. The transaction is signaled as completed when
this signal returns high. This pin has a passive internal pull-up resistance.
This input pin is connected to the master microcontroller providing the
required bit shift clock for SPI communication. This pin has a passive
internal pull-down resistance.
4
5
FLASHER
CLOCK
Input
Input
Flasher Input
(Active High)
Clock Input
6
7
8
LIMP
STOP
CS
Input
Input
Input
Limp Home Input
(Active High)
Stop Light Input
(Active High)
Chip Select
(Active Low)
SPI Clock Input
9
SCLK
Input
35XS3500
IGN
SO
SI
CS
4
Analog Integrated Circuit Device Data
Freescale Semiconductor
PIN CONNECTIONS
Table 2. 35XS3500 Pin Definitions (continued)
Functional descriptions these pins can be found in the
Functional Description
section beginning on
page 20.
Pin
10
11
12
13
Pin Name
SI
VCC
Pin Function
Input
Input
Output
Output
Formal Name
Master-Out Slave-In
Logic Supply
Master-In Slave-Out
External FET Gate
Definition
This data input is sampled on the positive edge of the SCLK. This pin has
a passive internal pull-down resistance.
SPI Logic power supply.
SPI data sent to the MCU by this pin. This data output changes on the
negative edge of SCLK, and when
CS
is high. This pin is high-impedance.
This pin controls an external SMART MOSFET by logic level. This output
called OUT6.
If OUT6 is not used in the application, this output pin is set to logic high
when the current sense output becomes valid when CSNS sync SPI bit is
set to logic [1].
This pin is the ground for the logic and analog circuitry of the device.
(1)
Power supply pin.
This pin is the connection for an external tank capacitor (for internal use
only).
Protected 35 m high side power output to the load.
SO
FETOUT
14, 17, 23
15
16
18
19
20
21
22
24
GND
VBAT
CP
OUT5
OUT4
OUT3
OUT2
OUT1
CSNS
Ground
Input
Output
Output
Output
Output
Output
Output
Output
Ground
Battery Input
Charge Pump
Output 5
Output 4
Output 3
Output 2
Output 1
Current Sense Output
This pin is used to output a current proportional to OUT1:OUT5, FET in
current, and it is used externally to generate a ground-referenced voltage
for the microcontroller to monitor output current. Moreover, this pin can
report a voltage proportional to the temperature on the GND flag.
OUT1:OUT5, FET in current sensing and Temperature feedback choice is
SPI programmable.
Notes
1. The pins 14, 17, and 23 must be shorted on the board.
35XS3500
Analog Integrated Circuit Device Data
Freescale Semiconductor
5
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