M
Features
• 256 taps for each potentiometer
• Potentiometer values for 10 kΩ, 50 kΩ and
100 kΩ
• Single and dual versions
• SPI™ serial interface (mode 0,0 and 1,1)
• ±1 LSB max INL & DNL
• Low power CMOS technology
• 1 µA maximum supply current in static operation
• Multiple devices can be daisy-chained together
(MCP42XXX only)
• Shutdown feature open circuits of all resistors for
maximum power savings
• Hardware shutdown pin available on MCP42XXX
only
• Single supply operation (2.7V - 5.5V)
• Industrial temperature range: -40°C to +85°C
• Extended temperature range: -40°C to +125°C
MCP41XXX/42XXX
Description
The MCP41XXX and MCP42XXX devices are 256-
position, digital potentiometers available in 10 kΩ,
50 kΩ and 100 kΩ resistance versions. The
MCP41XXX is a single-channel device and is offered in
an 8-pin PDIP or SOIC package. The MCP42XXX con-
tains two independent channels in a 14-pin PDIP, SOIC
or TSSOP package. The wiper position of the
MCP41XXX/42XXX varies linearly and is controlled via
an industry-standard SPI interface. The devices con-
sume <1 µA during static operation. A software shut-
down feature is provided that disconnects the “A”
terminal from the resistor stack and simultaneously con-
nects the wiper to the “B” terminal. In addition, the dual
MCP42XXX has a SHDN pin that performs the same
function in hardware. During shutdown mode, the con-
tents of the wiper register can be changed and the
potentiometer returns from shutdown to the new value.
The wiper is reset to the mid-scale position (80h) upon
power-up. The RS (reset) pin implements a hardware
reset and also returns the wiper to mid-scale. The
MCP42XXX SPI interface includes both the SI and SO
pins, allowing daisy-chaining of multiple devices. Chan-
nel-to-channel resistance matching on the MCP42XXX
varies by less than 1%. These devices operate from a
single 2.7 - 5.5V supply and are specified over the
extended and industrial temperature ranges.
Single/Dual Digital Potentiometer with SPI
™
Interface
Block Diagram
RS
V
DD
V
SS
Control
Logic
Wiper
Register
SHDN
PB0
Resistor
Array 0
PA0
PW0
PB1
PA1
PW1
Package Types
PDIP/SOIC
CS
SCK
SI
V
SS
1
2
3
4
8
7
6
5
V
DD
PB0
PW0
PA0
MCP41XXX
CS
SI
SCK
16-Bit
Shift
Register
S0
Wiper Resistor
Register Array 1*
*Potentiometer
P1 is only available on the dual
MCP42XXX version.
PDIP/SOIC/TSSOP
CS
SCK
SI
V
SS
PB1
PW1
PA1
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
DD
SO
SHDN
RS
PB0
PW0
PA0
MCP42XXX
2003 Microchip Technology Inc.
DS11195C-page 1
MCP41XXX/42XXX
1.0
ELECTRICAL CHARACTERISTICS
DC CHARACTERISTICS: 10 kΩ VERSION
Electrical Characteristics:
Unless otherwise indicated, V
DD
= +2.7V to 5.5V, T
A
= -40°C to +85°C (TSSOP devices are only specified at +25°C and
+85°C). Typical specifications represent values for V
DD
= 5V, V
SS
= 0V, V
B
= 0V, T
A
= +25°C.
Parameters
Rheostat Mode
Nominal Resistance
Rheostat Differential Non Linearity
Rheostat Integral Non Linearity
Rheostat Tempco
Wiper Resistance
Wiper Current
Nominal Resistance Match
Potentiometer Divider
Resolution
Monotonicity
Differential Non-Linearity
Integral Non-Linearity
Voltage Divider Tempco
Full Scale Error
Zero Scale Error
Resistor Terminals
Voltage Range
Capacitance (C
A
or C
B
)
Capacitance
Bandwidth -3dB
Settling Time
Resistor Noise Voltage
Crosstalk
Schmitt Trigger High-Level Input Voltage
Schmitt Trigger Low-Level Input Voltage
Hysteresis of Schmitt Trigger Inputs
Low-Level Output Voltage
High-Level Output Voltage
Input Leakage Current
Pin Capacitance (All inputs/outputs)
Power Requirements
Operating Voltage Range
Supply Current, Active
Supply Current, Static
Power Supply Sensitivity
Note
1:
2:
3:
4:
5:
6:
V
DD
I
DDA
I
DDS
PSS
PSS
2.7
—
—
—
—
—
340
0.01
0.0015
0.0015
5.5
500
1
0.0035
0.0035
V
µA
µA
%/%
%/%
V
DD
= 5.5V, CS = V
SS
, f
SCK
= 10 MHz,
SO = Open, Code FFh
(Note 6)
CS, SHDN, RS = V
DD
= 5.5V, SO = Open
(Note 6)
V
DD
= 4.5V - 5.5V, V
A
= 4.5V, Code 80h
V
DD
= 2.7V - 3.3V, V
A
= 2.7V, Code 80h
C
W
BW
t
S
e
NWB
C
T
V
IH
V
IL
V
HYS
V
OL
V
OH
I
LI
C
IN
, C
OUT
V
A,B,W
0
—
—
—
—
—
—
0.7V
DD
—
—
—
V
DD
- 0.5
-1
—
—
15
5.6
1
2
9
-95
—
—
0.05V
DD
—
—
—
10
V
DD
—
—
—
—
—
—
—
0.3V
DD
—
0.40
—
+1
—
V
V
µA
pF
I
OL
= 2.1 mA, V
DD
= 5V
I
OH
= -400 µA, V
DD
= 5V
CS = V
DD
, V
IN
= V
SS
or V
DD
, includes V
A
SHDN=0
V
DD
= 5.0V, T
A
= +25°C, f
c
= 1 MHz
pF
pF
MHz
µS
nV/√Hz
dB
V
V
Note 4
f = 1 MHz, Code = 80h, see Figure 2-30
f = 1 MHz, Code = 80h, see Figure 2-30
V
B
= 0V, Measured at Code 80h,
Output Load = 30
P
F
V
A
= V
DD
,V
B
= 0V, ±1% Error Band, Transition
from Code 00h to Code 80h, Output Load = 30 pF
V
A
= Open, Code 80h, f =1 kHz
V
A
= V
DD
, V
B
= 0V
(Note 5)
N
N
DNL
INL
∆V
W
/∆T
V
WFSE
V
WFSE
V
WZSE
V
WZSE
8
8
-1
-1
—
-2
-2
0
0
—
—
±1/4
±1/4
1
-0.7
-0.7
+0.7
+0.7
—
—
+1
+1
—
0
0
+2
+2
Bits
Bits
LSB
LSB
LSB
LSB
LSB
LSB
Note 3
Note 3
Code FFh, V
DD
= 5V, see Figure 2-25
Code FFh, V
DD
= 3V, see Figure 2-25
Code 00h, V
DD
= 5V, see Figure 2-25
Code 00h, V
DD
= 3V, see Figure 2-25
R
R-DNL
R-INL
∆R
AB
/∆T
R
W
R
W
I
W
∆R/R
8
-1
-1
—
—
—
-1
—
10
±1/4
±1/4
800
52
73
—
0.2
12
+1
+1
—
100
125
+1
1
kΩ
LSB
LSB
ppm/°C
Ω
Ω
mA
%
MCP42010 only,
P0 to P1; T
A
= +25°C
V
DD
= 5.5V, I
W
= 1 mA, code 00h
V
DD
= 2.7V, I
W
= 1 mA, code 00h
T
A
= +25°C
(Note 1)
Note 2
Note 2
Sym
Min
Typ
Max
Units
Conditions
ppm/°C Code 80h
Dynamic Characteristics (All dynamic characteristics use V
DD
= 5V)
Digital Inputs/Outputs (CS, SCK, SI, SO) See Figure 2-12 for RS and SHDN pin operation
V
AB
= V
DD
, no connection on wiper.
Rheostat position non-linearity R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum
resistance wiper positions. R-DNL measures the relative step change from the ideal between successive tap positions. I
W
= 50 µA for
V
DD
= 3V and I
W
= 400 µA for V
DD
= 5V for 10 kΩ version. See Figure 2-26 for test circuit.
INL and DNL are measured at V
W
with the device configured in the voltage divider or potentiometer mode. V
A
= V
DD
and V
B
= 0V. DNL
specification limits of ±1 LSB max are specified monotonic operating conditions. See Figure 2-25 for test circuit.
Resistor terminals A,B and W have no restrictions on polarity with respect to each other. Full-scale and zero-scale error were measured
using Figure 2-25.
Measured at V
W
pin where the voltage on the adjacent V
W
pin is swinging full-scale.
Supply current is independent of current through the potentiometers.
DS11195C-page 2
2003 Microchip Technology Inc.
MCP41XXX/42XXX
DC CHARACTERISTICS: 50 kΩ VERSION
Electrical Characteristics:
Unless otherwise indicated, V
DD
= +2.7V to 5.5V, T
A
= -40°C to +85°C (TSSOP devices are only specified at +25°C and
+85°C). Typical specifications represent values for V
DD
= 5V, V
SS
= 0V, V
B
= 0V, T
A
= +25°C.
Parameters
Rheostat Mode
Nominal Resistance
Rheostat Differential Non-Linearity
Rheostat Integral Non-Linearity
Rheostat Tempco
Wiper Resistance
Wiper Current
Nominal Resistance Match
Potentiometer Divider
Resolution
Monotonicity
Differential Non-Linearity
Integral Non-Linearity
Voltage Divider Tempco
Full-Scale Error
Zero-Scale Error
Resistor Terminals
Voltage Range
Capacitance (C
A
or C
B
)
Capacitance
Bandwidth -3dB
Settling Time
Resistor Noise Voltage
Crosstalk
Schmitt Trigger High-Level Input Voltage
Schmitt Trigger Low-Level Input Voltage
Hysteresis of Schmitt Trigger Inputs
Low-Level Output Voltage
High-Level Output Voltage
Input Leakage Current
Pin Capacitance (All inputs/outputs)
Power Requirements
Operating Voltage Range
Supply Current, Active
Supply Current, Static
Power Supply Sensitivity
Note
1:
2:
3:
4:
5:
6:
V
DD
I
DDA
I
DDS
PSS
PSS
2.7
—
—
—
—
—
340
0.01
0.0015
0.0015
5.5
500
1
0.0035
0.0035
V
µA
µA
%/%
%/%
V
DD
= 5.5V, CS = V
SS
, f
SCK
= 10 MHz,
SO = Open, Code FFh
(Note 6)
CS, SHDN, RS = V
DD
= 5.5V, SO = Open
(Note 6)
V
DD
= 4.5V - 5.5V, V
A
= 4.5V, Code 80h
V
DD
= 2.7V - 3.3V, V
A
= 2.7V, Code 80h
C
W
BW
t
S
e
NWB
C
T
V
IH
V
IL
V
HYS
V
OL
V
OH
I
LI
C
IN
, C
OUT
V
A,B,W
0
—
—
—
—
—
—
0.7V
DD
—
—
—
V
DD
- 0.5
-1
—
—
11
5.6
280
8
20
-95
—
—
0.05V
DD
—
—
—
10
V
DD
—
—
—
—
—
—
—
0.3V
DD
—
0.40
—
+1
—
V
V
µA
pF
I
OL
= 2.1 mA, V
DD
= 5V
I
OH
= -400 µA, V
DD
= 5V
CS = V
DD
, V
IN
= V
SS
or V
DD
, includes V
A
SHDN=0
V
DD
= 5.0V, T
A
= +25°C, f
c
= 1 MHz
pF
pF
MHz
µS
nV/√Hz
dB
V
V
Note 4
f =1 MHz, Code = 80h, see Figure 2-30
f =1 MHz, Code = 80h, see Figure 2-30
V
B
= 0V, Measured at Code 80h,
Output Load = 30
P
F
V
A
= V
DD
,V
B
= 0V, ±1% Error Band, Transition
from Code 00h to Code 80h, Output Load = 30 pF
V
A
= Open, Code 80h, f =1 kHz
V
A
= V
DD
, V
B
= 0V
(Note 5)
N
N
DNL
INL
∆V
W
/∆T
V
WFSE
V
WFSE
V
WZSE
V
WZSE
8
8
-1
-1
—
-1
-1
0
0
—
—
±1/4
±1/4
1
-0.25
-0.35
+0.25
+0.35
—
—
+1
+1
—
0
0
+1
+1
Bits
Bits
LSB
LSB
LSB
LSB
LSB
LSB
Note 3
Note 3
Code FFh, V
DD
= 5V, see Figure 2-25
Code FFh, V
DD
= 3V, see Figure 2-25
Code 00h, V
DD
= 5V, see Figure 2-25
Code 00h, V
DD
= 3V, see Figure 2-25
R
R-DNL
R-INL
∆R
AB
/∆T
R
W
R
W
I
W
∆R/R
35
-1
-1
—
—
—
-1
—
50
±1/4
±1/4
800
125
175
—
0.2
65
+1
+1
—
175
250
+1
1
kΩ
LSB
LSB
ppm/°C
Ω
Ω
mA
%
MCP42050 only,
P0 to P1;T
A
= +25°C
V
DD
= 5.5V, I
W
= 1 mA, code 00h
V
DD
= 2.7V, I
W
= 1 mA, code 00h
T
A
= +25°C
(Note 1)
Note 2
Note 2
Sym
Min
Typ
Max
Units
Conditions
ppm/°C Code 80h
Dynamic Characteristics (All dynamic characteristics use V
DD
= 5V)
Digital Inputs/Outputs (CS, SCK, SI, SO) See Figure 2-12 for RS and SHDN pin operation.
V
AB
= V
DD
, no connection on wiper.
Rheostat position non-linearity R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum
resistance wiper positions. R-DNL measures the relative step change from the ideal between successive tap positions. I
W
= V
DD
/R for
+3V or +5V for 50 kΩ version. See Figure 2-26 for test circuit.
INL and DNL are measured at V
W
with the device configured in the voltage divider or potentiometer mode. V
A
= V
DD
and V
B
= 0V. DNL
specification limits of ±1 LSB max are specified monotonic operating conditions. See Figure 2-25 for test circuit.
Resistor terminals A,B and W have no restrictions on polarity with respect to each other. Full-scale and zero-scale error were measured
using Figure 2-25.
Measured at V
W
pin where the voltage on the adjacent V
W
pin is swinging full scale.
Supply current is independent of current through the potentiometers.
2003 Microchip Technology Inc.
DS11195C-page 3
MCP41XXX/42XXX
DC CHARACTERISTICS: 100 kΩ VERSION
Electrical Characteristics:
Unless otherwise indicated, V
DD
= +2.7V to 5.5V, T
A
= -40°C to +85°C (TSSOP devices are only specified at +25°C and
+85°C). Typical specifications represent values for V
DD
= 5V, V
SS
= 0V, V
B
= 0V, T
A
= +25°C.
Parameters
Rheostat Mode
Nominal Resistance
Rheostat Differential Non-Linearity
Rheostat Integral Non-Linearity
Rheostat Tempco
Wiper Resistance
Wiper Current
Nominal Resistance Match
Potentiometer Divider
Resolution
Monotonicity
Differential Non-Linearity
Integral Non-Linearity
Voltage Divider Tempco
Full-Scale Error
Zero-Scale Error
Resistor Terminals
Voltage Range
Capacitance (C
A
or C
B
)
Capacitance
Bandwidth -3dB
Settling Time
Resistor Noise Voltage
Crosstalk
Schmitt Trigger High-Level Input Voltage
Schmitt Trigger Low-Level Input Voltage
Hysteresis of Schmitt Trigger Inputs
Low-Level Output Voltage
High-Level Output Voltage
Input Leakage Current
Pin Capacitance (All inputs/outputs)
Power Requirements
Operating Voltage Range
Supply Current, Active
Supply Current, Static
Power Supply Sensitivity
Note
1:
2:
3:
4:
5:
6:
V
DD
I
DDA
I
DDS
PSS
PSS
2.7
—
—
—
—
—
340
0.01
0.0015
0.0015
5.5
500
1
0.0035
0.0035
V
µA
µA
%/%
%/%
V
DD
= 5.5V, CS = V
SS
, f
SCK
= 10 MHz,
SO = Open, Code FFh
(Note 6)
CS, SHDN, RS = V
DD
= 5.5V, SO = Open
(Note 6)
V
DD
= 4.5V - 5.5V, V
A
= 4.5V, Code 80h
V
DD
= 2.7V - 3.3V, V
A
= 2.7V, Code 80h
C
W
BW
t
S
e
NWB
C
T
V
IH
V
IL
V
HYS
V
OL
V
OH
I
LI
C
IN
, C
OUT
V
A,B,W
0
—
—
—
—
—
—
0.7V
DD
—
—
—
V
DD
- 0.5
-1
—
—
11
5.6
145
18
29
-95
—
—
0.05V
DD
—
—
—
10
V
DD
—
—
—
—
—
—
—
0.3V
DD
—
0.40
—
+1
—
V
V
µA
pF
I
OL
= 2.1 mA, V
DD
= 5V
I
OH
= -400 µA, V
DD
= 5V
CS = V
DD
, V
IN
= V
SS
or V
DD
, includes V
A
SHDN=0
V
DD
= 5.0V, T
A
= +25°C, f
c
= 1 MHz
pF
pF
MHz
µS
nV/√Hz
dB
V
V
Note 4
f =1 MHz, Code = 80h, see Figure 2-30
f =1 MHz, Code = 80h, see Figure 2-30
V
B
= 0V, Measured at Code 80h,
Output Load = 30
P
F
V
A
= V
DD
,V
B
= 0V, ±1% Error Band, Transition
from Code 00h to Code 80h, Output Load = 30 pF
V
A
= Open, Code 80h, f =1 kHz
V
A
= V
DD
, V
B
= 0V
(Note 5)
N
N
DNL
INL
∆V
W
/∆T
V
WFSE
V
WFSE
V
WZSE
V
WZSE
8
8
-1
-1
—
-1
-1
0
0
—
—
±1/4
±1/4
1
-0.25
-0.35
+0.25
+0.35
—
—
+1
+1
—
0
0
+1
+1
Bits
Bits
LSB
LSB
LSB
LSB
LSB
LSB
Note 3
Note 3
Code FFh, V
DD
= 5V, see Figure 2-25
Code FFh, V
DD
= 3V, see Figure 2-25
Code 00h, V
DD
= 5V, see Figure 2-25
Code 00h, V
DD
= 3V, see Figure 2-25
R
R-DNL
R-INL
∆R
AB
/∆T
R
W
R
W
I
W
∆R/R
70
-1
-1
—
—
—
-1
—
100
±1/4
±1/4
800
125
175
—
0.2
130
+1
+1
—
175
250
+1
1
kΩ
LSB
LSB
ppm/°C
Ω
Ω
mA
%
MCP42010 only, P0 to P1;T
A
= +25°C
V
DD
= 5.5V, I
W
= 1 mA, code 00h
V
DD
= 2.7V, I
W
= 1 mA, code 00h
T
A
= +25°C
(Note 1)
Note 2
Note 2
Sym
Min
Typ
Max
Units
Conditions
ppm/°C Code 80h
Dynamic Characteristics (All dynamic characteristics use V
DD
= 5V.)
Digital Inputs/Outputs (CS, SCK, SI, SO) See Figure 2-12 for RS and SHDN pin operation.
V
AB
= V
DD
, no connection on wiper.
Rheostat position non-linearity R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum
resistance wiper positions. R-DNL measures the relative step change from the ideal between successive tap positions. I
W
= 50 µA for
V
DD
= 3V and I
W
= 400 µA for V
DD
= 5V for 10 kΩ version. See Figure 2-26 for test circuit.
INL and DNL are measured at V
W
with the device configured in the voltage divider or potentiometer mode. V
A
= V
DD
and V
B
= 0V. DNL
specification limits of ±1 LSB max are specified monotonic operating conditions. See Figure 2-25 for test circuit.
Resistor terminals A,B and W have no restrictions on polarity with respect to each other. Full-scale and zero-scale error were measured
using Figure 2-25.
Measured at V
W
pin where the voltage on the adjacent V
W
pin is swinging full-scale.
Supply current is independent of current through the potentiometers.
DS11195C-page 4
2003 Microchip Technology Inc.
MCP41XXX/42XXX
Absolute Maximum Ratings †
V
DD
...................................................................................7.0V
All inputs and outputs w.r.t. V
SS
............... -0.6V to V
DD
+1.0V
Storage temperature .....................................-60°C to +150°C
Ambient temp. with power applied ................-60°C to +125°C
ESD protection on all pins
..................................................≥
2 kV
† Notice:
Stresses above those listed under “maximum rat-
ings” may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at
those or any other conditions above those indicated in the
operational listings of this specification is not implied. Expo-
sure to maximum rating conditions for extended periods may
affect device reliability.
AC TIMING CHARACTERISTICS
Electrical Characteristics:
Unless otherwise indicated, V
DD
= +2.7V to 5.5V, T
A
= -40°C to +85°C.
Parameter
Clock Frequency
Clock High Time
Clock Low Time
CS Fall to First Rising CLK Edge
Data Input Setup Time
Data Input Hold Time
SCK Fall to SO Valid Propagation Delay
SCK Rise to CS Rise Hold Time
SCK Rise to CS Fall Delay
CS Rise to CLK Rise Hold
CS High Time
Reset Pulse Width
RS Rising to CS Falling Delay Time
CS rising to RS or SHDN falling delay time
CS low time
Shutdown Pulse Width
Note
1:
2:
3:
Sym
F
CLK
t
HI
t
LO
t
CSSR
t
SU
t
HD
t
DO
t
CHS
t
CS0
t
CS1
t
CSH
t
RS
t
RSCS
t
SE
t
CSL
t
SH
30
10
100
40
150
150
40
100
150
Min.
—
40
40
40
40
10
Typ.
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Max.
10
—
—
—
—
—
80
—
—
—
—
—
—
—
—
—
Units
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note 2
Note 2
Note 3
Note 3
Note 3
C
L
= 30 pF
(Note 2)
Conditions
V
DD
= 5V
(Note 1)
When using the device in the daisy-chain configuration, maximum clock frequency is determined by a combination of propagation delay
time (t
DO
) and data input setup time (t
SU
). Max. clock frequency is therefore ~ 5.8 MHz based on SCK rise and fall times of 5 ns, t
HI
=
40 ns, t
DO
= 80 ns and t
SU
= 40 ns.
Applies only to the MCP42XXX devices.
Applies only when using hardware pins to exit software shutdown mode, MCP42XXX only.
2003 Microchip Technology Inc.
DS11195C-page 5
模拟与混合信号
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
