MAX5556
Low-Cost Stereo Audio DAC
General Description
The MAX5556 stereo audio sigma-delta digital-to-analog
converter (DAC) offers a simple and complete stereo
digital-to-analog solution for media servers, set-top
boxes, video-game hardware, automotive rear-seat
entertainment, and other general consumer audio appli-
cations. This DAC features built-in digital interpolation/fil-
tering, sigma-delta digital-to-analog conversion, and
analog output filtering. Control logic and mute circuitry
minimize audible pops and clicks during power-up,
power-down, clock changes, or when invalid clock con-
ditions occur.
The MAX5556 receives input data over a 3-wire
I
2
S-compatible interface with left-justified audio data.
Data can be clocked by either an external or internal
serial clock. The internal serial clock frequency is pro-
grammable by selection of a master clock (MCLK) and
sample clock (LRCLK) ratio. Sampling rates from 2kHz
to 50kHz are supported.
The MAX5556 operates from a single +4.75V to +5.5V
analog supply with total harmonic distortion plus noise
below -87dB. This device is available in an 8-pin SO
package and is specified over the -40°C to +85°C
industrial temperature range.
Features
o
Simple and Complete Stereo Audio DAC
Solutions, No Controls to Set
o
Sigma-Delta Stereo DACs with Built-In
Interpolation and Analog Output Filters
o
I
2
S-Compatible Digital Audio Interface
o
Clickless/Popless Operation
o
3.5V
P-P
Output Voltage Swing
o
-87dB THD+N
o
+87dB Dynamic Range
o
Sample Frequencies (f
S
) from 2kHz to 50kHz
o
Master Clock (MCLK) up to 25MHz
o
Automatic Detection of Clock Ratio (MCLK/
LRCLK)
Ordering Information
PART
MAX5556ESA+
MAX5556ESA/V+*
TEMP
RANGE
-40°C to
+85°C
-40°C to
+85°C
PIN-
DATA FORMAT
PACKAGE
8 SO
8 SO
Left-justified I
2
S
data
Left-justified I
2
S
data
Applications
Digital Video Recorders and Media Servers
Set-Top Boxes
Video-Game Hardware
Automotive Rear-Seat Entertainment
+Denotes a lead(Pb)-free/RoHS-compliant package. For lead-
ed version, contact factory.
/V denotes an automotive-qualified part.
*Contact factory for availability.
Typical Operating Circuit
+5V
Pin Configuration
TOP VIEW
V
DD
LEFT
OUTPUT
SDATA
AUDIO
DECOMPRESSION
SCLK
LRCLK
SERIAL
INTERFACE
DAC
OUTL
FILTER
LINE-LEVEL
BUFFER
+
SDATA 1
SCLK 2
LRCLK
3
8
OUTL
V
DD
GND
OUTR
7
6
5
MAX5556
MAX5556
RIGHT
OUTPUT
MCLK 4
CLOCK
MCLK
DAC
OUTR
FILTER
LINE-LEVEL
BUFFER
SO
GND
For pricing, delivery, and ordering information, please contact Maxim Direct
at 1-888-629-4642, or visit Maxim’s website at www.maximintegrated.com.
19-0550; Rev 2; 8/13
MAX5556
Low-Cost Stereo Audio DAC
ABSOLUTE MAXIMUM RATINGS
V
DD
to GND ...........................................................-0.3V to +6.0V
OUTL, OUTR, SDATA to GND................... -0.3V to (V
DD
+ 0.3V)
Current Any Pin (excluding V
DD
and GND)......................±10mA
OUTL, OUTR Shorted to GND....................................Continuous
SCLK, LRCLK, MCLK to GND ...............................-0.3V to +6.0V
Continuous Power Dissipation (T
A
= +70°C)
8-Pin SO (derate 5.88mW/°C above +70°C)...............471mW
Package Thermal Resistance (θ
JA
) ...............................170°C/W
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Soldering Temperature (reflow) .......................................+260°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the
specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V
DD
= +4.75V to +5.5V, V
GND
= 0V, R
OUT
_ = 10kΩ, C
OUT
_ = 10pF, 0dBFS sine-wave signal at 997Hz, f
LRCLK
(f
S
) = 48kHz, f
MCLK
= 12.288MHz, measurement bandwidth 10Hz to 20kHz, T
A
= -40°C to +85°C, outputs are unloaded, unless otherwise noted. Typical
values at V
DD
= +5V, T
A
= +25°C.) (Note 1)
PARAMETER
POWER SUPPLY
Supply Voltage
Supply Current
Power Dissipation
DYNAMIC PERFORMANCE (Note 2)
Dynamic Range, 16-Bit
Dynamic Range, 18-Bit to 24-Bit
Total Harmonic Distortion Plus
Noise, 16-Bit
Unweighted
A-weighted
Unweighted
A-weighted
0dBFS
THD+N
-20dBFS
-60dBFS
0dBFS
Total Harmonic Distortion Plus
Noise, 18-Bit to 24-Bit
Interchannel Isolation
THD+N
-20dBFS
-60dBFS
1kHz full-scale output (crosstalk)
-0.5dB corner
Passband
-3dB corner
-6dB corner
Frequency Response/Passband
Ripple
Stopband
Stopband Attenuation
Group Delay
Passband Group-Delay Variation
2
SYMBOL
V
DD
I
DD
Up to 48ksps
Static digital
Up to 48ksps
Static digital
CONDITIONS
MIN
4.75
TYP
5.0
13
6
65
30
MAX
5.50
15
8.5
82.5
44
UNITS
V
mA
mW
84
86
86
90
87
91
-86
-67
-26
-87
-68
-27
94
-24
-81
dB
dB
dB
dB
dB
COMBINED DIGITAL AND INTEGRATED ANALOG FILTER FREQUENCY RESPONSE (Note 3)
0.46
0.49
0.50
-0.025
-0.025
-6.000
52
t
gd
Δt
gd
20Hz to 20kHz
20/f
S
±0.4/f
S
+0.08
+0.08
+0.073
0.5465
f
S
dB
s
s
Maxim Integrated
f
S
10Hz to 20kHz (f
S
= 48kHz)
10Hz to 20kHz (f
S
= 44.1kHz)
10Hz to 16kHz (f
S
= 32kHz)
dB
MAX5556
Low-Cost Stereo Audio DAC
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= +4.75V to +5.5V, V
GND
= 0V, R
OUT
_ = 10kΩ, C
OUT
_ = 10pF, 0dBFS sine-wave signal at 997Hz, f
LRCLK
(f
S
) = 48kHz, f
MCLK
= 12.288MHz, measurement bandwidth 10Hz to 20kHz, T
A
= -40°C to +85°C, outputs are unloaded, unless otherwise noted. Typical
values at V
DD
= +5V, T
A
= +25°C.) (Note 1)
PARAMETER
DC CHARACTERISTICS
Interchannel Gain Mismatch
Gain Error
Gain Drift
ANALOG OUTPUTS
Full-Scale Output Voltage
DC Quiescent Output Voltage
Minimum Load Resistance
Maximum Load Capacitance
Power-Supply Rejection Ratio
POP AND CLICK SUPPRESSION
Mute Attenuation
Power-Up Until Bias Established
Valid Clock to Normal Operation
Input-Voltage High
Input-Voltage Low
Input Leakage Current
Input Capacitance
TIMING CHARACTERISTICS
Input Sample Rate
MCLK Pulse-Width Low
f
S
MCLK/LRCLK = 512
t
MCLKL
MCLK/LRCLK = 384
MCLK/LRCLK = 256
MCLK/LRCLK = 512
MCLK Pulse-Width High
EXTERNAL SCLK MODE
LRCLK Duty Cycle
SCLK Pulse-Width Low
SCLK Pulse-Width High
SCLK Period
LRCLK Edge to SCLK Rising
LRCLK Edge to SCLK Rising
SDATA Valid to SCLK Rising
SCLK Rising to SDATA Hold Time
t
SCLKL
t
SCLKH
t
SCLK
t
SLRS
t
SLRH
t
SDS
t
SDH
(Note 6)
25
20
20
1/(128
x f
S
)
20
20
20
20
75
%
ns
ns
ns
ns
ns
ns
ns
t
MCLKH
MCLK/LRCLK = 384
MCLK/LRCLK = 256
2
10
20
20
10
20
20
ns
ns
50
kHz
V
IH
V
IL
I
IN
-10
8
Figure 11
Soft-start ramp time, Figure 12 (Note 5)
2.0
0.8
+10
100
360
20
dB
ms
ms
V
V
µA
pF
V
OUTR
, V
OUTL
V
Q
R
L
C
L
PSRR
V
RIPPLE
= 100mV
P-P
, frequency = 1kHz
Input code = 0
3.25
3.5
2.4
3
100
66
3.75
V
P-P
V
kΩ
pF
dB
-5
100
0.1
0.4
+5
dB
%
ppm/°C
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DIGITAL AUDIO INTERFACE (SCLK, SDATA, MCLK, LRCLK)
Maxim Integrated
3
MAX5556
Low-Cost Stereo Audio DAC
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= +4.75V to +5.5V, V
GND
= 0V, R
OUT
_ = 10kΩ, C
OUT
_ = 10pF, 0dBFS sine-wave signal at 997Hz, f
LRCLK
(f
S
) = 48kHz, f
MCLK
= 12.288MHz, measurement bandwidth 10Hz to 20kHz, T
A
= -40°C to +85°C, outputs are unloaded, unless otherwise noted. Typical
values at V
DD
= +5V, T
A
= +25°C.) (Note 1)
PARAMETER
INTERNAL SCLK MODE
LRCLK Duty Cycle
Internal SCLK Period
LRCLK Edge to Internal SCLK
SDATA Valid to Internal SCLK
Rising Setup Time
t
ISCLK
t
ISCLKR
t
ISDS
t
ISDH
MCLK period = t
MCLK
t
MCLK
+ 10
t
MCLK
(Note 7)
(Note 8)
1/f
SCLK
t
ISCLK
/2
50
%
ns
ns
ns
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
100% production tested at T
A
= +85°C. Limits to -40°C are guaranteed by design.
0.5 LSB of triangular PDF dither added to data.
Guaranteed by design, not production tested.
PSRR test block diagram shown in Figure 1 denotes the test setup used to measure PSRR.
Volume ramping interval starts from establishment of a valid MCLK to LRCLK ratio. Total time is proportional to the sample
rate (f
S
). 20ms based on 48ksps operation.
Note 6:
In external SCLK mode, LRCLK duty cycles are not limited, provided all data formatting requirements are met. See Figure 4.
Note 7:
The LRCLK duty cycle must be 50% ±1/2 MCLK period in internal SCLK mode.
Note 8:
The SCLK/LRCLK ratio can be set to 32, 48, or 64, depending on the MCLK/LRCLK ratio selected. See Figure 4.
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
V
DD
ACTIVE CLOCKS
AUDIO SIGNAL
GENERATOR
(100mV
P-P
AT 1kHz)
Z
G
SCLK
LRCLK
MCLK
LOUT, ROUT
MAX5556
SPECTRUM
ANALYZER
-
DC POWER SUPPLY
(5VDC)
+
SDATA
GND
Figure 1. PSRR Test Block Diagram
4
Maxim Integrated
MAX5556
Low-Cost Stereo Audio DAC
Typical Operating Characteristics
(V
DD
= +5V, V
GND
= 0V, R
OUT_
= 10kΩ, C
OUT_
= 10pF, T
A
= +25°C, unless otherwise noted.)
STOPBAND REJECTION
MAX5556 toc01
TRANSITION BAND
MAX5556 toc02
TRANSITION BAND DETAIL
-1
-2
AMPLITUDE (dB)
-3
-4
-5
-6
-7
-8
-9
-10
MAX5556 toc03
0
-10
-20
AMPLITUDE (dB)
-30
-40
-50
-60
-70
-80
-90
-100
0
0
-10
-20
AMPLITUDE (dB)
-30
-40
-50
-60
-70
-80
-90
-100
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
FREQUENCY (NORMALIZED TO f
S
)
0.40
0.44
0.48
0.52
0.56
0.60
0.40
0.42
0.44
0.46
0.48
0.50
0.52
FREQUENCY (NORMALIZED TO f
S
)
FREQUENCY (NORMALIZED TO f
S
)
PASSBAND RIPPLE
0.20
0.15
AMPLITUDE (dB)
0.10
0.05
0
-0.05
-0.10
-0.15
-0.20
-0.25
0
0.1
0.2
0.3
0.4
0.5
FREQUENCY (NORMALIZED TO f
S
)
MAX5556 toc04
0dBFS FFT
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
-110
-120
-130
-140
0
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
-110
-120
-130
-140
0
2
MAX5556 toc05
-60dBFS FFT
MAX5556 toc06
0.25
AMPLITUDE (dBr)
AMPLITUDE (dBr)
16,000-SAMPLE FFT USING 1kHz INPUT
16,000-SAMPLE FFT USING 1kHz INPUT
2
4
6
8
10 12 14 16 18 20
4
6
8
10 12 14 16 18 20
FREQUENCY (kHz)
FREQUENCY (kHz)
IDLE-CHANNEL NOISE FFT
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
-110
-120
-130
-140
0
2
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
-110
-120
-130
-140
0
MAX5556 toc07
TWIN-TONE IMD FFT
MAX5556 toc08
THD+N vs. AMPLITUDE
MAX5556 toc09
-60
-70
THD+N (dBr)
UNWEIGHTED
AMPLITUDE (dBr)
AMPLITUDE (dBr)
16,000-SAMPLE FFT WITH NO INPUT
16,000-SAMPLE FFT
WITH 13kHz AND
14kHz INPUT SIGNALS
-80
-90
INPUT = 1kHz 18-BIT SIGNAL
-100
A-WEIGHTED
INTEGRATION BANDWIDTH = 20Hz TO 20kHz
-60
-50
-40
-30
-20
-10
0
-110
2
4
6
8
10 12 14 16 18 20
FREQUENCY (kHz)
4
6
8
10 12 14 16 18 20
FREQUENCY (kHz)
AMPLITUDE (dBFS)
Maxim Integrated
5
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