19-0584; Rev 2; 3/10
Low-Voltage DDR Linear Regulator
General Description
The MAX8794 DDR linear regulator sources and sinks up
to 3A peak (typ) using internal n-channel MOSFETs. This
linear regulator delivers an accurate 0.5V to 1.5V output
from a low-voltage power input (V
IN
= 1.1V to 3.6V). The
MAX8794 uses a separate 3.3V bias supply to power the
control circuitry and drive the internal n-channel MOSFETs.
The MAX8794 provides current and thermal limits to pre-
vent damage to the linear regulator. Additionally, the
MAX8794 generates a power-good (PGOOD) signal to
indicate that the output is in regulation. During startup,
PGOOD remains low until the output is in regulation for 2ms
(typ). The internal soft-start limits the input surge current.
The MAX8794 powers the active-DDR termination bus
that requires a tracking input reference. The MAX8794
can also be used in low-power chipsets and graphics
processor cores that require dynamically adjustable
output voltages. The MAX8794 is available in a 10-pin,
3mm x 3mm, TDFN package.
Features
o
Internal Power MOSFETs with Current Limit (3A typ)
o
Fast Load-Transient Response
o
External Reference Input with Reference
Output Buffer
o
1.1V to 3.6V Power Input
o
±15mV
(max) Load-Regulation Error
o
Thermal-Fault Protection
o
Shutdown Input
o
Power-Good Window Comparator with 2ms (typ)
Delay
o
Small, Low-Profile, 10-Pin, 3mm x 3mm TDFN
Package
o
Ceramic or Polymer Output Capacitors
MAX8794
Ordering Information
PART
MAX8794ETB+
MAX8794ETB/V+
TEMP RANGE
-40°C to +85°C
-40°C to +85°C
PIN-
PACKAGE
10 TDFN-EP*
(3mm x 3mm)
10 TDFN-EP*
(3mm x 3mm)
TOP
MARK
ASW
ASW
Applications
Notebook/Desktop Computers
DDR Memory Termination
Active Termination Buses
Graphics Processor Core Supplies
Chipset/RAM Supplies as Low as 0.5V
+Denotes
a lead(Pb)-free/RoHS-compliant package.
/V denotes an automotive qualified part.
*EP = Exposed pad.
Pin Configuration
Typical Operating Circuit
V
IN
(1.1V TO 3.6V)
V
OUT
= V
TT
TOP VIEW
+
REFOUT 1
V
CC
2
AGND
3
10 IN
9 OUT
V
BIAS
(2.7V TO 3.6V)
IN
OUT
OUTS
MAX8794
V
CC
SHDN
PGOOD
PGND
AGND
MAX8794
EP*
8 PGND
7 SHDN
6 OUTS
V
DDQ
(2.5V OR 1.8V)
REFIN 4
PGOOD 5
TDFN
3mm x 3mm
*EXPOSED PAD.
V
REFOUT
= V
TTR
REFIN
REFOUT
________________________________________________________________
Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
Low-Voltage DDR Linear Regulator
MAX8794
ABSOLUTE MAXIMUM RATINGS
IN to PGND............................................................-0.3V to +4.3V
OUT to PGND ..............................................-0.3V to (V
IN
+ 0.3V)
OUTS to AGND ............................................-0.3V to (V
IN
+ 0.3V)
V
CC
to AGND.........................................................-0.3V to +4.3V
REFIN, REFOUT,
SHDN,
PGOOD to AGND...-0.3V to (V
CC
+ 0.3V)
PGND to AGND .....................................................-0.3V to +0.3V
REFOUT Short Circuit to AGND .................................Continuous
OUT Continuous RMS Current
100s ................................................................................±1.6A
1s ....................................................................................±2.5A
Continuous Power Dissipation (T
A
= +70°C)
10-Pin 3mm x 3mm TDFN
(derated 24.4mW/°C above +70°C)...........................1951mW
Operating Temperature Range
MAX8794ETB...................................................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Soldering Temperature (reflow) .......................................+260°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V
IN
= 1.8V, V
CC
= 3.3V, V
REFIN
= V
OUTS
= 1.25V,
SHDN
= V
CC
, circuit of Figure 1, T
A
= -40°C to +85°C, unless otherwise noted.
Typical values are at T
A
= +25°C.) (Note 1)
PARAMETER
Input Voltage Range
Quiescent Supply Current (V
CC
)
Shutdown Supply Current (V
CC
)
Quiescent Supply Current (V
IN
)
Shutdown Supply Current (V
IN
)
Feedback-Voltage Error
Load-Regulation Error
Line-Regulation Error
OUTS Input Bias Current
OUTPUT
Output Adjust Range
OUT On-Resistance
Output Current Slew Rate
OUT Power-Supply Rejection
Ratio
OUT to OUTS Resistance
Discharge MOSFET On-
Resistance
PSRR
R
OUTS
R
DISCHARGE
SHDN
= AGND
High-side MOSFET (source) (I
OUT
= 0.1A)
Low-side MOSFET (sink) (I
OUT
= -0.1A)
C
OUT
= 100µF, I
OUT
= 0.1A to 2A
10Hz < f < 10kHz, I
OUT
= 200mA,
C
OUT
= 100µF
0.5
0.10
0.10
3
80
12
8
1.5
0.169
0.20
V
Ω
A/µs
dB
kΩ
Ω
I
OUTS
SYMBOL
V
IN
V
CC
I
CC
I
CC(SHDN)
I
IN
I
IN(SHDN)
V
OUTS
Power input
Bias supply
Load = 0, V
REFIN
> 0.45V
SHDN
= AGND, V
REFIN
> 0.45V
SHDN
= AGND, REFIN = AGND
Load = 0
SHDN
= AGND
REFIN to OUTS,
I
OUT
=
±200mA
-1A
≤
I
OUT
≤
+1A
1.4V
≤
V
IN
≤
3.3V, I
OUT
=
±100mA
-1
T
A
= +25°C
T
A
= -40°C to +85°C
-4
-6
-15
1
+1
CONDITIONS
MIN
1.1
2.7
0.7
350
50
0.4
0.1
0
TYP
MAX
3.6
3.6
1.3
600
100
10
10
+4
+6
+15
UNITS
V
mA
µA
mA
µA
mV
mV
mV
µA
2
_______________________________________________________________________________________
Low-Voltage DDR Linear Regulator
ELECTRICAL CHARACTERISTICS (continued)
(V
IN
= 1.8V, V
CC
= 3.3V, V
REFIN
= V
OUTS
= 1.25V,
SHDN
= V
CC
, circuit of Figure 1, T
A
= -40°C to +85°C, unless otherwise noted.
Typical values are at T
A
= +25°C.) (Note 1)
PARAMETER
REFERENCE
REFIN Voltage Range
REFIN Input Bias Current
REFIN Undervoltage-Lockout
Voltage
REFOUT Voltage
REFOUT Load Regulation
FAULT DETECTION
Thermal-Shutdown Threshold
V
CC
Undervoltage-Lockout
Threshold
IN Undervoltage-Lockout
Threshold
Current-Limit Threshold
Soft-Start Current-Limit Time
INPUTS AND OUTPUTS
PGOOD Lower Trip Threshold
PGOOD Upper Trip Threshold
PGOOD Propagation Delay
PGOOD Startup Delay
PGOOD Output Low Voltage
PGOOD Leakage Current
SHDN
Logic Input Threshold
SHDN
Logic Input Current
I
PGOOD
t
PGOOD
With respect to feedback threshold,
hysteresis = 12mV
With respect to feedback threshold,
hysteresis = 12mV
OUTS forced 25mV beyond PGOOD trip
threshold
Startup rising edge, OUTS within
±100mV
of
the feedback threshold
I
SINK
= 4mA
OUTS = REFIN (PGOOD high impedance),
PGOOD = V
CC
+ 0.3V
Logic high
Logic low
SHDN
= V
CC
or AGND
0.8
-1
+1
-200
100
5
-150
150
10
2
-100
200
35
3.5
0.3
1
2.0
mV
mV
µs
ms
V
µA
V
µA
I
LIMIT
t
SS
T
SHDN
V
UVLO
Rising edge, hysteresis = 15°C
Rising edge, hysteresis = 100mV
Rising edge, hysteresis = 55mV
1.8
2.45
+165
2.55
0.9
3
200
2.65
1.1
4.2
°C
V
V
A
µs
V
REFOUT
ΔV
REFOUT
V
REFIN
I
REFIN
Rising edge, hysteresis = 75mV
V
CC
= 3.3V, I
REFOUT
= 0
I
REFOUT
=
±5mA
V
REFIN
- 0.01
-20
0.5
-1
0.35
V
REFIN
1.5
+1
0.45
V
REFIN
+ 0.01
+20
V
µA
V
V
mV
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
MAX8794
Note 1:
Limits are 100% production tested at T
A
= +25°C. Limits over the operating temperature range are guaranteed through cor-
relation using statistical-quality-control (SQC) methods.
_______________________________________________________________________________________
3
Low-Voltage DDR Linear Regulator
MAX8794
Typical Operating Characteristics
(Circuit of Figure 1. T
A
= +25°C, unless otherwise noted.)
MAXIMUM OUTPUT CURRENT
vs. INPUT VOLTAGE
MAX8794 toc02
OUTPUT LOAD REGULATION
MAX8794 toc01
OUTPUT LOAD REGULATION
1.30
V
REFIN
= 1.25V
3.0
V
REFIN
= 0.9V
V
OUT
= 0.9V
MAXIMUM OUTPUT CURRENT (A)
2.5
2.0
1.5
1.0
0.5
0
0.94
0.92
V
OUT
(V)
0.90
0.88
0.86
0.84
-3
-2
-1
0
I
OUT
(A)
1
2
3
V
IN
= 1.5V
V
OUT
= 1.25V
1.28
V
IN
= 1.5V
V
OUT
(V)
V
IN
= 1.25V
1.26
1.24
V
IN
= 1.8V
1.22
THERMALLY LIMITED
DROPOUT VOLTAGE LIMITED
1.20
-3
-2
-1
0
I
OUT
(A)
1
2
3
1.0
1.5
2.0
2.5
3.0
INPUT VOLTAGE (V)
INPUT CURRENT (I
IN
)
vs. INPUT VOLTAGE (V
IN
)
MAX8794 toc04
BIAS CURRENT (I
CC
)
vs. INPUT VOLTAGE (V
IN
)
MAX8794 toc05
BIAS CURRENT (I
CC
)
vs. LOAD CURRENT (I
OUT
)
V
IN
= 1.5V
1.2
1.0
I
CC
(mA)
0.8
V
OUT
= 0.90V
0.6
0.4
0.2
ENTERING
DROPOUT
V
OUT
= 1.25V
MAX8794 toc06
250
V
OUT
= 1.25V
V
OUT
= 0.90V
1.0
0.9
0.8
0.7
I
CC
(mA)
0.6
0.5
0.4
0.3
DROPOUT
V
OUT
= 1.25V
1.4
200
I
IN
(µA)
150
100
50
0.2
0.1
0
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
V
IN
(V)
0
0
0.5
INPUT UVLO
1.0
1.5
2.0
2.5
3.0
3.5
0
-2
-1
0
I
OUT
(A)
1
2
V
IN
(V)
POWER GROUND CURRENT (I
PGND
)
vs. SOURCE LOAD CURRENT (I
OUT
)
MAX8794 toc07
INPUT CURRENT (I
IN
)
vs. SINK LOAD CURRENT (I
OUT
)
V
IN
= 1.5V
6
5
MAX8794 toc08
DROPOUT VOLTAGE
vs. OUTPUT CURRENT
MAX8794 toc09
0.25
V
IN
= 1.5V
0.20
7
0.30
0.25
DROPOUT VOLTAGE (V)
V
OUT
= 1.25V
0.20
0.15
0.10
0.05
0
V
OUT
= 0.9V
I
PGND
(mA)
I
IN
(mA)
0.15
V
OUT
= 1.25V
ENTERING
DROPOUT
4
3
V
OUT
= 0.90V
V
OUT
= 1.25V
0.10
2
0.05
V
OUT
= 0.90V
1
0
0
0.5
1.0
I
OUT
(A)
1.5
2.0
-2.0
-1.5
-1.0
I
OUT
(A)
-0.5
0
0
0
0.5
1.0
1.5
2.0
2.5
3.0
OUTPUT CURRENT (A)
4
_______________________________________________________________________________________
MAX8794 toc03
0.96
Low-Voltage DDR Linear Regulator
Typical Operating Characteristics (continued)
(Circuit of Figure 1. T
A
= +25°C, unless otherwise noted.)
REFOUT VOLTAGE ERROR
vs. REFOUT LOAD CURRENT
15
REFOUT VOLTAGE ERROR (mV)
10
5
0
-5
-10
-15
-20
-10
-5
0
5
10
500µs/div
REFOUT LOAD CURRENT (mA)
1.25V
V
OUT
0V
4V
PGOOD
0V
MAX8794 toc10
MAX8794
STARTUP WAVEFORM
MAX8794 toc11
20
5V
SHDN
0V
SHUTDOWN WAVEFORM
MAX8794 toc12
SOURCE LOAD TRANSIENT
5V
SHDN
0V
2V
1V
V
OUT
0V
4V
PGOOD
0V
1A
I
OUT
0A
V
OUT
AC-COUPLED
1mV/div
MAX8794 toc13
R
LOAD
= 100Ω
100µs/div
20.0µs/div
SOURCE/SINK LOAD TRANSIENT
MAX8794 toc14
LINE TRANSIENT
MAX8794 toc15
3.3V
V
OUT
AC-COUPLED
5mV/div
V
IN
(1V/div)
1.5V
+1.5A
I
OUT
-1.5A
I
OUT
= 100mA
4.00µs/div
40µs/div
V
OUT
(10mV/div)
AC-COUPLED
0.9V
_______________________________________________________________________________________
5
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