19-4443; Rev 0; 2/09
KIT
ATION
EVALU
BLE
AVAILA
AMD 2-/3-Output Mobile Serial
VID Controller
General Description
Features
o
Dual-Output Fixed-Frequency Core Supply
Controller
Split or Combinable Outputs Detected at
Power-Up
Dynamic Phase Selection Optimizes
Active/Sleep Efficiency
Transient Phase Repeat Reduces Output
Capacitance
True Out-of-Phase Operation Reduces Input
Capacitance
Programmable AC and DC Droop
Accurate Current Balance and Current Limit
Integrated Drivers for Large Synchronous-
Rectifier MOSFETs
Programmable 100kHz to 600kHz Switching
Frequency
4V to 26V Battery Input Voltage Range
o
4A Internal Switch Northbridge SMPS
2.7V to 5.5V Input Voltage Range
2x Programmable Switching Frequency
75mΩ/40mΩ Power Switches
o
±0.5% V
OUT
Accuracy over Line, Load, and
Temperature
o
AMD SVI-Compliant Serial Interface with
Switchable Address
o
7-Bit On-Board DAC: 0 to +1.550V Output Adjust
Range
o
Integrated Boost Switches
o
Adjustable Slew-Rate Control
o
Power-Good (PWRGD) and Thermal-Fault
(VRHOT) Outputs
o
System Power-OK (PGD_IN) Input
o
Overvoltage, Undervoltage, and Thermal-Fault
Protection
o
Voltage Soft-Startup and Passive Shutdown
o
< 1µA Typical Shutdown Current
MAX17480
The MAX17480 is a triple-output, step-down, fixed-
frequency controller for AMD’s serial VID interface (SVI)
CPU and northbridge (NB) core supplies. The MAX17480
consists of two high-current SMPSs for the CPU cores
and one 4A internal switch SMPS for the NB core. The
two CPU core SMPSs run 180° out-of-phase for true
interleaved operation, minimizing input capacitance.
The 4A internal switch SMPS runs at twice the switching
frequency of the core SMPS, reducing the size of the
external components.
The MAX17480 is fully AMD SVI compliant. Output volt-
ages are dynamically changed through a 2-wire SVI,
allowing the SMPSs to be individually programmed to
different voltages. A slew-rate controller allows con-
trolled transitions between VID codes and controlled
soft-start. SVI also allows each SMPS to be individually
set into a low-power pulse-skipping state.
Transient phase repeat improves the response of the
fixed-frequency architecture, reducing the total output
capacitance for the CPU core. A thermistor-based tem-
perature sensor provides a programmable thermal-fault
output (VRHOT).
The MAX17480 includes output overvoltage protection
(OVP), undervoltage protection (UVP), and thermal pro-
tection. When any of these protection features detect a
fault, the controller shuts down. True differential current
sensing improves current limit and load-line accuracy.
The MAX17480 has an adjustable switching frequency,
allowing 100kHz to 600kHz operation per core SMPS,
and twice that for the NB SMPS.
Applications
Mobile AMD SVI Core Supplies
Multiphase CPU Core Supplies
Voltage-Positioned, Step-Down Converters
Notebook/Desktop Computers
Ordering Information
PART
TEMP RANGE
PIN-PACKAGE
MAX17480GTL+
-40°C to +105°C
40 TQFN-EP*
+Denotes
a lead(Pb)-free/RoHS-compliant package.
*EP
= Exposed pad.
Pin Configuration appears at end of data sheet.
________________________________________________________________
Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
AMD 2-/3-Output Mobile Serial
VID Controller
MAX17480
ABSOLUTE MAXIMUM RATINGS
(Note 1)
V
DD,
V
IN3,
V
CC
, V
DDIO
to AGND ..............................-0.3V to +6V
LX2 to BST2..............................................................-6V to +0.3V
PWRGD to AGND .....................................................-0.3V to +6V
LX3 to PGND (Note 2) ..............................................-0.6V to +6V
SHDN
to AGND ........................................................-0.3V to +6V
DH1 to LX1 ..............................................-0.3V to (V
BST1
+ 0.3V)
DH2 to LX2 ..............................................-0.3V to (V
BST2
+ 0.3V)
GNDS1, GNDS2, THRM,
VRHOT
to AGND..............-0.3V to +6V
DL1 to PGND ..............................................-0.3V to (V
DD
+ 0.3V)
CSP_, CSN_, ILIM12 to AGND .................................-0.3V to +6V
DL2 to PGND ..............................................-0.3V to (V
DD
+ 0.3V)
SVC, SVD, PGD_IN to AGND ...................................-0.3V to +6V
Continuous Power Dissipation (T
A
= +70°C)
FBDC_, FBAC_, OUT3 to AGND ..............................-0.3V to +6V
40-Pin TQFN (derate 22.2mW/°C above +70°C) .......1778mW
OSC, TIME, OPTION, ILIM3 to AGND ........-0.3V to (V
CC
+ 0.3V)
BST1, BST2 to AGND .............................................-0.3V to +36V
Operating Temperature Range .........................-40°C to +105°C
BST1, BST2 to V
DD
.................................................-0.3V to +30V
Junction Temperature ......................................................+150°C
BST3 to AGND...................................(V
DD
- 0.3V) to (V
LX3
+ 6V)
Storage Temperature Range .............................-65°C to +150°C
LX1 to BST1..............................................................-6V to +0.3V
Lead Temperature (soldering, 10s) .................................+300°C
LX3 RMS Current (Note 2) .....................................................±4A
Note 1:
Absolute Maximum Ratings measured with 20MHz scope bandwidth.
Note 2:
LX3 has clamp diodes to PGND and IN3. If continuous current is applied through these diodes, thermal limits must be observed.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(Circuit of Figure 2, V
IN
= 12V, V
CC
= V
DD
= V
IN3
=
SHDN
= PGD_IN = 5V, V
DDIO
= 1.8V, OPTION = GNDS_ = AGND = PGND,
FBDC_ = FBAC_ = OUT3 = CSP_ = CSN_ = 1.2V, all DAC codes set to the 1.2V code,
T
A
= 0°C to +85°C,
unless otherwise noted.
Typical values are at T
A
= +25°C.)
PARAMETER
INPUT SUPPLIES
V
IN
Input Voltage Range
V
BIAS
V
IN3
V
DDIO
V
CC
Undervoltage-Lockout
Threshold
V
CC
Power-On Reset Threshold
V
DDIO
Undervoltage-Lockout
Threshold
V
IN3
Undervoltage-Lockout
Threshold
Quiescent Supply Current (V
CC
)
Quiescent Supply Currents (V
DD
)
Quiescent Supply Current (V
DDIO
)
Quiescent Supply Current (IN3)
Shutdown Supply Current (V
CC
)
I
CC
I
DD
I
DDIO
I
IN3
Skip mode, OUT3 forced above its
regulation point
SHDN
= GND, T
A
= +25°C
V
UVLO
V
CC
rising, 50mV typical hysteresis,
latched, UV fault
Falling edge, typical hysteresis = 1.1V,
faults cleared and DL_ forced high when
V
CC
falls below this level
V
DDIO
rising, 100mV typical hysteresis,
latched, UV fault
V
IN3
rising, 100mV typical hysteresis
Skip mode, FBDC_ and OUT3 forced
above their regulation points
Skip mode, FBDC_ and OUT3 forced
above their regulation points, T
A
= +25°C
0.7
2.5
Drain of external high-side MOSFET
V
CC
, V
DD
4
4.5
2.7
1.0
4.10
4.25
26
5.5
5.5
2.7
4.45
V
V
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
1.8
V
0.8
2.6
5
0.01
10
50
0.01
0.9
2.7
10
1
25
200
1
V
V
mA
µA
µA
µA
µA
2
_______________________________________________________________________________________
AMD 2-/3-Output Mobile Serial
VID Controller
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 2, V
IN
= 12V, V
CC
= V
DD
= V
IN3
=
SHDN
= PGD_IN = 5V, V
DDIO
= 1.8V, OPTION = GNDS_ = AGND = PGND,
FBDC_ = FBAC_ = OUT3 = CSP_ = CSN_ = 1.2V, all DAC codes set to the 1.2V code,
T
A
= 0°C to +85°C,
unless otherwise noted.
Typical values are at T
A
= +25°C.)
PARAMETER
Shutdown Supply Currents (V
DD
)
Shutdown Supply Current (V
DDIO
)
Shutdown Supply Current (IN3)
SYMBOL
CONDITIONS
SHDN
= GND, T
A
= +25°C
SHDN
= GND, T
A
= +25°C
SHDN
= GND, T
A
= +25°C
Measured at FBDC_
for the core SMPSs;
measured at OUT3
for the NB SMPS;
30% duty cycle, no
load, ILIM3 = V
CC
,
V
OUT3
= V
DAC3
+
12.5mV (Note 3)
MIN
TYP
0.01
0.01
0.01
MAX
1
1
1
UNITS
µA
µA
µA
MAX17480
INTERNAL DACs, SLEW RATE, PHASE SHIFT
DAC codes from
0.8375V to 1.5500V
DAC codes from
0.5000V to 0.8250V
DAC codes from
12.5mV to 0.4875V
-0.5
+0.5
%
DC Output Voltage Accuracy
(Note 1)
V
OUT
-5
+5
mV
-10
12.5
+10
mV
%
Degrees
%
+10
+15
1
%
mV/µs
+3
+250
+7
%
µA
nA
OUT3 Offset
SMPS1 to SMPS2 Phase Shift
SMPS3 to SMPS1 and SMPS2
Phase Shift
SMPS2 starts after SMPS1
SMPS3 starts after SMPS1 or SMPS2
R
TIME
= 143k , SR = 6.25mV/µs
During
transition R
TIME
= 35.7k to 357k ,
SR = 25mV/µs to 2.5mV/µs
Startup
FBAC_ Input Bias Current
FBDC_ Input Bias Current
I
FBAC
_
I
FBDC
_
CSP_ = CSN_, T
A
= +25°C
T
A
= +25°C
R
OSC
= 143k (f
OSC1
= f
OSC2
= 300kHz
nominal, f
OSC3
= 600kHz nominal)
R
OSC
= 71.4k (f
OSC1
= f
OSC2
= 600kHz
nominal, f
OSC3
= 1.2MHz nominal) to
432k (f
OSC1
= f
OSC2
= 99kHz nominal,
f
OSC3
= 199kHz nominal)
Either SMPS, PWM mode, droop disabled;
zero to full load
Either SMPS, 4V < V
IN
< 26V
V
GNDS_
A
GNDS_
I
GNDS
_
Separate mode
Separate: V
OUT
_/ V
GNDS
_
,
-200mV V
GNDS
_
+200mV; combined: V
OUT
/ V
GNDS_,
-200mV V
GNDS_
+200mV
T
A
= +25°C
-200
0.95
-2
-3
-250
-7
-10
-15
50
180
25
Slew-Rate Accuracy
Switching Frequency Accuracy
f
OSC1,
f
OSC2,
f
OSC3
-9
+9
SMPS1 AND SMPS2 CONTROLLERS
DC Load Regulation
Line Regulation Error
GNDS_ Input Range
GNDS_ Gain
GNDS_ Input Bias Current
-0.1
0.03
+200
1.00
1.05
+2
%
%/V
mV
V/V
µA
_______________________________________________________________________________________
3
AMD 2-/3-Output Mobile Serial
VID Controller
MAX17480
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 2, V
IN
= 12V, V
CC
= V
DD
= V
IN3
=
SHDN
= PGD_IN = 5V, V
DDIO
= 1.8V, OPTION = GNDS_ = AGND = PGND,
FBDC_ = FBAC_ = OUT3 = CSP_ = CSN_ = 1.2V, all DAC codes set to the 1.2V code,
T
A
= 0°C to +85°C,
unless otherwise noted.
Typical values are at T
A
= +25°C.)
PARAMETER
Combined-Mode Detection
Threshold
Maximum Duty Factor
Minimum On-Time
Current-Limit Threshold
Tolerance
Zero-Crossing Threshold
Idle Mode™ Threshold
CS_ Input Leakage Current
CS_ Common-Mode Input Range
AC Droop and Current Balance
Amplifier Transconductance
AC Droop and Current Balance
Amplifier Offset
No-Load Positive Offset
Transient Detection Threshold
D
MAX
t
ONMIN
V
CSP
_ - V
CSN
_ = 0.052 x (V
REF
- V
ILIM
),
(V
REF
- V
ILM
) = 0.2V to 1.0V
V
GND
_ - V
LX
_, skip mode
V
CSP
_ - V
CSN
_, skip mode, 0.15 x V
LIMIT
CSP_ and CSN_, T
A
= +25°C
CSP_ and CSN_
I
FBAC
_/( V
CS
_), V
FBAC
_ = V
CSN
_ = 1.2V,
V
CSP
_ - V
CSN
_ = 0 to +40mV
I
FBAC
_/G
m(FBAC
_
)
OPTION = 2V or GND
Measured at FBDC_ with respect to
steady-state FBDC_ regulation voltage,
10mV hysteresis (typ)
-47
-2
-0.2
0
SYMBOL
CONDITIONS
GNDS1, GNDS2, detection after REFOK,
latched, cleared by cycling
SHDN
MIN
0.7
90
TYP
0.8
92
150
MAX
0.9
UNITS
V
%
ns
SMPS1 AND SMPS2 CURRENT LIMIT
V
LIMIT
V
ZX
V
IMIN
-3
1
+2
+0.2
2
+3
mV
mV
mV
µA
V
SMPS1 AND SMPS2 DROOP, CURRENT BALANCE, AND TRANSIENT RESPONSE
G
m(FBAC
_
)
1.94
-1.5
+12.5
-41
-33
2.00
2.06
+1.5
mS
mV
mV
mV
SMPS3 INTERNAL 4A STEP-DOWN CONVERTER
OUT3 Load Regulation
OUT3 Line Regulation
OUT3 Input Current
LX3 Leakage Current
Internal MOSFET On-Resistance
LX3 Peak Current Limit
LX3 Idle-Mode Trip Level
LX3 Zero-Crossing Trip Level
Maximum Duty Factor
Minimum On-Time
I
OUT3
I
LX3
R
ON(NH3)
R
ON(NL3)
I
LX3PK
I
LX3MIN
I
ZX3
D
MAX
t
ONMIN
R
DROOP3
0 to 100% duty cycle
T
A
= +25°C
SHDN
= GND, V
LX3
= GND or 5.5V,
V
IN3
= 5.5V, T
A
= +25°C
High-side n-channel
Low-side n-channel
ILIM3 = V
CC
ILIM3 = GND
Percentage of I
LX3PK
Skip mode
84
4.75
3.75
-100
-20
75
40
5.25
4.25
25
20
87
150
4
5.5
5
-5
+100
+20
150
75
6
5
%
mA
%
ns
7
mV/A
mV
nA
µA
m
A
Idle Mode is a trademark of Maxim Integrated Products, Inc.
4
_______________________________________________________________________________________
AMD 2-/3-Output Mobile Serial
VID Controller
MAX17480
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 2, V
IN
= 12V, V
CC
= V
DD
= V
IN3
=
SHDN
= PGD_IN = 5V, V
DDIO
= 1.8V, OPTION = GNDS_ = AGND = PGND,
FBDC_ = FBAC_ = OUT3 = CSP_ = CSN_ = 1.2V, all DAC codes set to the 1.2V code,
T
A
= 0°C to +85°C,
unless otherwise noted.
Typical values are at T
A
= +25°C.)
PARAMETER
FAULT DETECTION
PWM mode
Output Overvoltage Trip
Threshold
(SMPS1 and SMPS2 Only)
Measured at
FBDC_, rising
edge
Skip mode and output
has not reached the
regulation voltage
Minimum OVP
threshold
Output Overvoltage Fault
Propagation Delay (SMPS1 and
SMPS2 Only)
Output Undervoltage Protection
Trip Threshold
Output Undervoltage Fault
Propagation Delay
t
OVP
FBDC_ forced 25mV above trip threshold
Measured at FBDC_ or OUT3 with respect
to unloaded output voltage
FBDC_ forced 25mV below trip threshold
Measured at
FBDC_ or OUT3
with respect to
unloaded output
voltage,15mV
hysteresis (typ)
t
PWRGD
Lower threshold,
falling edge
(undervoltage)
Upper threshold,
rising edge
(overvoltage)
250
1.80
300
1.85
350
1.90
V
0.8
mV
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
V
OVP_
10
µs
V
UVP
t
UVP
-450
-400
10
-350
mV
µs
-350
-300
-250
mV
PWRGD Threshold
+150
+200
+250
PWRGD Propagation Delay
PWRGD, Output Low Voltage
PWRGD Leakage Current
PWRGD Startup Delay and
Transition Blanking Time
VRHOT
Trip Threshold
VRHOT
Delay
VRHOT,
Output Low Voltage
VRHOT
Leakage Current
THRM Input Leakage
Thermal-Shutdown Threshold
GATE DRIVERS
DH_ Gate-Driver On-Resistance
DL_ Gate-Driver On-Resistance
FBDC_ or OUT3 forced 25mV outside the
PWRGD trip thresholds
I
SINK
= 4mA
High state, PWRGD forced to 5.5V,
T
A
= +25°C
Measured from the time when FBDC_ and
OUT3 reach the target voltage
Measured at THRM, with respect to V
CC
,
falling edge, 115mV hysteresis (typ)
29.5
10
0.4
1
20
30
10
0.4
1
-100
+160
+100
30.5
µs
V
µA
µs
%
µ
S
V
µA
nA
°C
2.5
2.5
2.0
0.6
I
PWRGD
t
BLANK
t
VRHOT
THRM forced 25mV below the
VRHOT
trip
threshold, falling edge
I
SINK
= 4mA
High state,
VRHOT
forced to 5V, T
A
= +25°C
T
A
= +25°C
T
SHDN
Hysteresis = 15°C
BST_ - LX_ forced
to 5V (Note 4)
DL_, high state
DL_, low state
High state (pullup)
Low state (pulldown)
R
ON(DH
_
)
R
ON(DL
_
)
0.9
0.7
0.7
0.25
_______________________________________________________________________________________
5
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