Freescale Semiconductor
Technical Data
Document Number: MC34903_4_5
Rev. 4.0, 10/2013
System Basis Chip with CAN
High Speed and LIN Interface
The 34903/4/5 is the second generation family of the System Basis
Chip (SBC). It combines several features and enhances present
module designs. The device works as an advanced power
management unit for the MCU with additional integrated circuits such
as sensors and CAN transceivers. It has a built-in enhanced high-speed
CAN interface (ISO11898-2 and -5) with local and bus failure
diagnostics, protection, and fail-safe operation modes. The SBC may
include zero or one LIN 2.1 interface with LIN output pin switches. It
includes up to four wake-up input pins that can also be configured as
output drivers for flexibility. This device is powered by SMARTMOS
technology.
This device implements multiple Low-power (LP) modes, with very
low-current consumption. In addition, the device is part of a family
concept where pin compatibility adds versatility to module design.
The 34903/4/5 also implements an innovative and advanced fail-safe
state machine and concept solution.
Features
• Voltage regulator for MCU, 5.0 or 3.3 V, part number selectable, with
possibility of usage external PNP to extend current capability and
share power dissipation
• Voltage, current, and temperature protection
• Extremely low quiescent current in LP modes
• Fully-protected embedded 5.0 V regulator for the CAN driver
• Multiple undervoltage detections to address various MCU
specifications and system operation modes (i.e. cranking)
• Auxiliary 5.0 or 3.3 V SPI configurable regulator, for additional ICs,
with overcurrent detection and undervoltage protection
• MUX output pin for device internal analog signal monitoring and
power supply monitoring
• Advanced SPI, MCU, ECU power supply, and critical pins
diagnostics and monitoring.
• Multiple wake-up sources in LP modes: CAN or LIN bus,
I/O transition, automatic timer, SPI message, and V
DD
overcurrent
detection.
• ISO11898-5 high-speed CAN interface compatibility for baud rates of
40 kb/s to 1.0 Mb/s
• Scalable product family of devices ranging from 0 to 1 LIN,
compatible to J2602-2 and LIN 2.1
34903/4/5
34903/
Industrial
SYSTEM BASIS CHIP
EK Suffix (Pb-free)
98ASA10556D
32-PIN SOIC
•
•
•
•
Applications
Industrial process control
Automation
Motor control
Robotics
Freescale Semiconductor, Inc. reserves the right to change the detail specifications,
as may be required, to permit improvements in the design of its products.
© Freescale Semiconductor, Inc., 2013. All rights reserved.
TABLE OF CONTENTS
TABLE OF CONTENTS
Simplified Application Diagrams ................................................................................................................. 3
Device Variations ....................................................................................................................................... 5
Internal Block Diagrams ............................................................................................................................. 6
Pin Connections ......................................................................................................................................... 8
Electrical Characteristics .......................................................................................................................... 12
Maximum Ratings .................................................................................................................................. 12
Static Electrical Characteristics ............................................................................................................. 15
Dynamic Electrical Characteristics ........................................................................................................ 23
Timing Diagrams ................................................................................................................................... 26
Functional Description .............................................................................................................................. 31
Introduction ............................................................................................................................................ 31
Functional Pin Description ..................................................................................................................... 31
Functional Device Operation .................................................................................................................... 35
Mode and State Description .................................................................................................................. 35
LP Modes .............................................................................................................................................. 36
State Diagram ........................................................................................................................................ 37
Mode Change ........................................................................................................................................ 38
Watchdog Operation .............................................................................................................................. 38
Functional Block Operation Versus Mode ............................................................................................. 40
Illustration of Device Mode Transitions. ................................................................................................. 41
Cyclic Sense Operation During LP Modes ............................................................................................ 43
Behavior at Power Up and Power Down ............................................................................................... 45
Fail-safe Operation ................................................................................................................................... 47
CAN Interface ........................................................................................................................................ 51
CAN Interface Description ..................................................................................................................... 51
CAN Bus Fault Diagnostic ..................................................................................................................... 54
LIN Block .................................................................................................................................................. 57
LIN Interface Description ....................................................................................................................... 57
LIN Operational Modes .......................................................................................................................... 57
Serial Peripheral Interface ........................................................................................................................ 59
High Level Overview .............................................................................................................................. 59
Detail Operation ..................................................................................................................................... 60
Detail of Control Bits And Register Mapping ......................................................................................... 63
Flags and Device Status ........................................................................................................................ 78
Typical Applications ................................................................................................................................. 85
Packaging ................................................................................................................................................ 90
34903/4/5
2
Analog Integrated Circuit Device Data
Freescale Semiconductor
SIMPLIFIED APPLICATION DIAGRAMS
SIMPLIFIED APPLICATION DIAGRAMS
V
BAT
D1
34905S
Q2
(5.0 V/3.3 V)
* = Optional
Q1*
VBAUX VCAUX VSUP1 VAUX VE VB VDD
VSUP2
SAFE
DBG
GND
VSENSE
I/O-0
RST
INT
MOSI
SCLK
MISO
CS
MUX-OUT
5V-CAN
TXD
RXD
TXD-L
RXD-L
V
DD
SPI
A/D
MCU
I/O-1
CANH
SPLIT
CAN Bus
V
BAT
CANL
LIN-T
LIN
I/O-3
LIN Bus
Figure 1. 34905S Simplified Application Diagram
V
BAT
D1
34904
Q2
(5.0 V/3.3 V)
* = Optional
Q1*
VBAUX VCAUX VSUP1 VAUX VE VB VDD
VSUP2
SAFE
DBG
GND
VSENSE
I/O-0
RST
INT
MOSI
SCLK
MISO
CS
MUX-OUT
5V-CAN
TXD
RXD
V
DD
SPI
A/D
MCU
I/O-1
CANH
V
BAT
SPLIT
CAN Bus
CANL
I/O-2
I/O-3
Figure 2. 34904 Simplified Application Diagram
34903/4/5
Analog Integrated Circuit Device Data
Freescale Semiconductor
3
SIMPLIFIED APPLICATION DIAGRAMS
V
BAT
D1
34903S
VSUP
SAFE
DBG
GND
VSENSE
IO-0
VE VB
Q1*
* = Optional
VDD
RST
INT
V
DD
MOSI
SCLK
MISO
CS
MUX-OUT
5V-CAN
TXD
RXD
TXD-L1
RXD-L1
SPI
A/D
MCU
CANH
SPLIT
V
BAT
CAN Bus
LIN Bus
CANL
LIN-T1/I/O-2
LIN-1
I/O-3
Figure 3. 34903S Simplified Application Diagram
V
BAT
D1
34903P
Q1*
* = Optional
VSUP
SAFE
DBG
GND
VSENSE
IO-0
CANH
SPLIT
CAN Bus
V
BAT
V
BAT
VE VB
VDD
RST
INT
V
DD
MOSI
SCLK
MISO
CS
MUX-OUT
5V-CAN
TXD
RXD
SPI
A/D
MCU
CANL
I/O-2
I/O-3
Figure 4. 34903P Simplified Application Diagram
34903/4/5
4
Analog Integrated Circuit Device Data
Freescale Semiconductor
DEVICE VARIATIONS
DEVICE VARIATIONS
Table 1. MC34905 Device Variations - (All devices rated at T
A
= -40 TO 125 °C)
Freescale Part Number
MC34905S (Single LIN)
MC34905CS3EK/R2
MC34905CS5EK/R2
C
C
3.3 V
5.0 V
1
3 Wake-up + 1 LIN terms
or
4 Wake-up + no LIN terms
SOIC 32 pin
exposed pad
Yes
Yes
Yes
Version
V
DD
Output
Voltage
LIN
Wake-up Input / LIN Master
Interface(s)
Termination
Package
V
AUX
V
SENSE
MUX
Table 2. MC34904 Device Variations - (All devices rated at T
A
= -40 TO 125 °C)
Freescale Part Number
MC34904
MC34904C3EK/R2
MC34904C5EK/R2
C
C
3.3 V
5.0 V
0
4 Wake-up
SOIC 32 pin
exposed pad
Yes
Yes
Yes
Version
V
DD
Output
Voltage
LIN
Wake-up Input / LIN Master
Interface(s)
Termination
Package
V
AUX
V
SENSE
MUX
Table 3. MC34903 Device Variations - (All devices rated at T
A
= -40 TO 125 °C)
Freescale Part Number
MC34903S (Single LIN)
MC34903CS3EK/R2
MC34903CS5EK/R2
MC34903P
MC34903CP5EK/R2
MC34903CP3EK/R2
C
5.0 V
3.3 V
0
3 Wake-up
SOIC 32 pin
exposed pad
No
Yes
Yes
C
C
3.3 V
5.0 V
1
2 Wake-up + 1 LIN terms
or
3 Wake-up + no LIN terms
SOIC 32 pin
exposed pad
No
Yes
Yes
Version
V
DD
Output
Voltage
LIN
Wake-up Input / LIN Master
Interface(s)
Termination
Package
V
AUX
V
SENSE
MUX
34903/4/5
Analog Integrated Circuit Device Data
Freescale Semiconductor
5
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