19-3764; Rev 0; 8/05
IT
TION K
VALUA
E
BLE
AVAILA
10-Bit, 11Msps, Ultra-Low-Power
Analog Front-End
Features
♦
Dual 10-Bit, 11Msps Rx ADC and Dual 10-Bit,
11Msps Tx DAC
♦
Ultra-Low Power
36.9mW at f
CLK
= 5.12MHz, Fast Mode
19.8mW at f
CLK
= 5.12MHz, Slow Mode
Low-Current Standby and Shutdown Modes
♦
Integrated TD-SCDMA Filters with > 55dB
Stopband Rejection
♦
Programmable Tx DAC Common-Mode DC Level
and I/Q Offset Trim
♦
Excellent Dynamic Performance
SNR = 55dB at f
IN
= 1.87MHz (Rx ADC)
SFDR = 73dBc at f
OUT
= 620kHz (Tx DAC)
♦
Three 12-Bit, 1µs Aux-DACs
♦
10-Bit, 333ksps Aux-ADC with 4:1 Input Mux and
Data Averaging
♦
Excellent Gain/Phase Match
±0.08° Phase, ±0.02dB Gain (Rx ADC) at
f
IN
= 1.87MHz
♦
Multiplexed Parallel Digital I/O
♦
Serial-Interface Control
♦
Versatile Power-Control Circuits
Shutdown, Standby, Idle, Tx/Rx Disable
♦
Miniature 48-Pin Thin QFN Package
(7mm x 7mm x 0.8mm)
General Description
The MAX19708 is an ultra-low-power, mixed-signal ana-
log front-end (AFE) designed for TD-SCDMA handsets
and data cards. Optimized for high dynamic perfor-
mance at ultra-low power, the device integrates a dual
10-bit, 11Msps receive (Rx) ADC; dual 10-bit, 11Msps
transmit (Tx) DAC with TD-SCDMA baseband filters;
three fast-settling 12-bit aux-DAC channels for ancillary
RF front-end control; and a 10-bit, 333ksps housekeep-
ing aux-ADC. The typical operating power in Tx-Rx
FAST mode is 36.9mW at a 5.12MHz clock frequency.
The Rx ADCs feature 55dB SNR and 77.4dBc SFDR at a
1.87MHz input frequency with an 11MHz clock frequen-
cy. The analog I/Q input amplifiers are fully differential
and accept 1.024V
P-P
full-scale signals. Typical I/Q
channel matching is ±0.08° phase and ±0.02dB gain.
The Tx DACs with TD-SCDMA lowpass filters feature -3dB
cutoff frequency of 1.32MHz and > 55dB stopband rejec-
tion at f
IMAGE
= 4.32MHz. The analog I-Q full-scale output
voltage range is selectable at ±410mV or ±500mV differ-
ential. The output DC common-mode voltage is selec-
table from 0.9V to 1.4V. The I/Q channel offset is
adjustable to optimize radio lineup sideband/carrier sup-
pression. Typical I-Q channel matching is ±0.02dB gain
and ±0.04° phase.
The Rx ADC and Tx DAC share a single, 10-bit parallel,
high-speed digital bus allowing half-duplex operation
for time-division duplex (TDD) applications. A 3-wire
serial interface controls power-management modes, the
aux-DAC channels, and the aux-ADC channels.
The MAX19708 operates on a single +2.7V to +3.3V
analog supply and +1.8V to +3.3V digital I/O supply.
The MAX19708 is specified for the extended (-40°C to
+85°C) temperature range and is available in a 48-pin,
thin QFN package. The
Selector Guide
at the end of the
data sheet lists other pin-compatible versions in this
AFE family.
MAX19708
Pin Configuration
DAC3
ADC1
ADC2
V
DD
GND
V
DD
SCLK
DIN
T/R
TOP VIEW
DOUT
SHDN
24
23
22
21
20
19
18
17
16
36 35 34 33 32 31 30 29 28 27 26 25
CS
DAC2
DAC1
V
DD
IDN
IDP
GND
V
DD
QDN
QDP
REFIN
COM
REFN
37
38
39
40
41
42
43
44
45
46
47
48
1
2
3
4
5
6
7
8
9 10 11 12
D9
D8
D7
D6
OV
DD
OGND
D5
D4
D3
D2
D1
D0
Applications
TD-SCDMA Handsets
TD-SCDMA Data Cards
Portable Communication Equipment
MAX19708
EXPOSED PADDLE (GND)
15
14
13
Ordering Information
PART*
MAX19708ETM
MAX19708ETM+
PIN-PACKAGE
48 Thin QFN-EP**
48 Thin QFN-EP**
PKG CODE
T4877-4
T4877-4
REFP
V
DD
GND
V
DD
QAN
QAP
IAP
IAN
GND
CLK
V
DD
THIN QFN
*All
devices are specified over the -40°C to +85°C operating range.
**EP
= Exposed paddle.
+Denotes
lead-free package.
Functional Diagram and Selector Guide appear at end of
data sheet.
1
________________________________________________________________
Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
GND
10-Bit, 11Msps, Ultra-Low-Power
Analog Front-End
MAX19708
ABSOLUTE MAXIMUM RATINGS
VDD to GND, OVDD to OGND ..............................-0.3V to +3.6V
GND to OGND.......................................................-0.3V to +0.3V
IAP, IAN, QAP, QAN, IDP, IDN, QDP,
QDN, DAC1, DAC2, DAC3 to GND .....................-0.3V to VDD
ADC1, ADC2 to GND.................................-0.3V to (VDD + 0.3V)
REFP, REFN, REFIN, COM to GND ...........-0.3V to (VDD + 0.3V)
D0–D9, DOUT, T/R,
SHDN,
SCLK, DIN,
CS,
CLK to OGND .....................................-0.3V to (OVDD + 0.3V)
Continuous Power Dissipation (TA = +70°C)
48-Pin Thin QFN (derate 27.8mW/°C above +70°C) .....2.22W
Thermal Resistance
θ
JA ..................................................36°C/W
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-60°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V
DD
= 3V, OV
DD
= 1.8V, internal reference (1.024V), C
L
≈
10pF on all digital outputs, f
CLK
= 11MHz (50% duty cycle), Rx ADC input
amplitude = -0.5dBFS, Tx DAC output amplitude = 0dBFS, differential Rx ADC input, differential Tx DAC output, C
REFP
= C
REFN
=
C
COM
= 0.33µF, unless otherwise noted. C
L
< 5pF on all aux-DAC outputs. Typical values are at T
A
= +25°C.) (Note 1)
PARAMETER
POWER REQUIREMENTS
Analog Supply Voltage
Output Supply Voltage
V
DD
OV
DD
Ext1-Tx, Ext3-Tx, and SPI2-Tx states;
transmit DAC operating mode (Tx):
f
CLK
= 5.12MHz, f
OUT
= 620kHz on both
channels; aux-DACs ON and at midscale,
aux-ADC ON
Ext2-Tx, Ext4-Tx, and SPI4-Tx states;
transmit DAC operating mode (Tx):
f
CLK
= 5.12MHz, f
OUT
= 620kHz on both
channels; aux-DACs ON and at midscale,
aux-ADC ON
Ext1-Rx, Ext4-Rx, and SPI3-Rx states;
receive ADC operating mode (Rx):
f
CLK
= 5.12MHz, f
IN
= 1.87MHz on both
channels; aux-DACs ON and at midscale,
aux-ADC ON
Ext2-Rx, Ext3-Rx, and SPI1-Rx states;
receive ADC operating mode (Rx):
f
CLK
= 5.12MHz, f
IN
= 1.87MHz on both
channels; aux-DACs ON and at midscale,
aux-ADC ON
Ext2-Tx, Ext4-Tx, and SPI4-Tx states;
transmit DAC operating mode (Tx):
f
CLK
= 11MHz, f
OUT
= 620kHz on both
channels, aux-DACs ON and at midscale,
aux-ADC ON
2.7
1.8
3.0
3.3
V
DD
V
V
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
10.3
12.6
V
DD
Supply Current
12.3
mA
6.6
14.1
16
2
_______________________________________________________________________________________
10-Bit, 11Msps, Ultra-Low-Power
Analog Front-End
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= 3V, OV
DD
= 1.8V, internal reference (1.024V), C
L
≈
10pF on all digital outputs, f
CLK
= 11MHz (50% duty cycle), Rx ADC input
amplitude = -0.5dBFS, Tx DAC output amplitude = 0dBFS, differential Rx ADC input, differential Tx DAC output, C
REFP
= C
REFN
=
C
COM
= 0.33µF, unless otherwise noted. C
L
< 5pF on all aux-DAC outputs. Typical values are at T
A
= +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
Ext1-Tx, Ext3-Tx, and SPI2-Tx states;
transmit DAC operating mode (Tx):
f
CLK
= 11MHz, f
OUT
= 620kHz on both
channels, aux-DACs ON and at midscale,
aux-ADC ON
Ext1-Rx, Ext4-Rx, and SPI3-Rx states;
receive ADC operating mode (Rx):
f
CLK
= 11MHz, f
IN
= 1.87MHz on both
channels, aux-DACs ON and at midscale,
aux-ADC ON
V
DD
Supply Current
Ext2-Rx, Ext3-Rx, and SPI1-Rx states;
receive ADC operating mode (Rx):
f
CLK
= 11MHz, f
IN
= 1.87MHz on both
channels, aux-DACs ON and at midscale,
aux-ADC ON
Standby mode: CLK = 0 or OV
DD
;
aux-DACs ON and at midscale,
aux-ADC ON
Idle mode: f
CLK
= 11MHz; aux-DACs ON
and at midscale, aux-ADC ON
Shutdown mode: CLK = 0 or OV
DD
Ext1-Rx, Ext2-Rx, Ext3-Rx, Ext4-Rx,
SPI1-Rx, SPI3-Rx states; receive ADC
operating mode (Rx): f
CLK
= 11MHz,
f
IN
= 1.87MHz on both channels;
aux-DACs ON and at midscale,
aux-ADC ON
Ext1-Tx, Ext2-Tx, Ext3-Tx, Ext4-Tx,
SPI2-Tx, SPI4-Tx states; transmit DAC
operating mode (Tx): f
CLK
= 11MHz, f
OUT
= 620kHz on both channels; aux-DACs
ON and at midscale, aux-ADC ON
Standby mode: CLK = 0 or OV
DD
; aux-
DACs ON and at midscale, aux-ADC ON
Idle mode: f
CLK
= 11MHz; aux-DACs ON
and at midscale, aux-ADC ON
Shutdown mode: CLK = 0 or OV
DD
MIN
TYP
MAX
UNITS
MAX19708
11.7
13.7
16
mA
8
2.9
4
5.5
0.52
7
µA
1.5
mA
OV
DD
Supply Current
110
µA
1
19
0.1
_______________________________________________________________________________________
3
10-Bit, 11Msps, Ultra-Low-Power
Analog Front-End
MAX19708
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= 3V, OV
DD
= 1.8V, internal reference (1.024V), C
L
≈
10pF on all digital outputs, f
CLK
= 11MHz (50% duty cycle), Rx ADC input
amplitude = -0.5dBFS, Tx DAC output amplitude = 0dBFS, differential Rx ADC input, differential Tx DAC output, C
REFP
= C
REFN
=
C
COM
= 0.33µF, unless otherwise noted. C
L
< 5pF on all aux-DAC outputs. Typical values are at T
A
= +25°C.) (Note 1)
PARAMETER
Rx ADC DC ACCURACY
Resolution
Integral Nonlinearity
Differential Nonlinearity
Offset Error
Gain Error
DC Gain Matching
Offset Matching
Gain Temperature Coefficient
Power-Supply Rejection
Rx ADC ANALOG INPUT
Input Differential Range
Input Common-Mode Voltage
Range
Input Impedance
Rx ADC CONVERSION RATE
Maximum Clock Frequency
Data Latency (Figure 3)
Rx ADC DYNAMIC CHARACTERISTICS (Note 4)
Signal-to-Noise Ratio
Signal-to-Noise and Distortion
Spurious-Free Dynamic Range
Third-Harmonic Distortion
Intermodulation Distortion
Third-Order Intermodulation
Distortion
Total Harmonic Distortion
Aperture Delay
Overdrive Recovery Time
1.5x full-scale input
SNR
SINAD
SFDR
HD3
IMD
IM3
THD
f
IN
= 1.875MHz, f
CLK
= 11MHz
f
IN
= 3.5MHz, f
CLK
= 11MHz
f
IN
= 1.875MHz, f
CLK
= 11MHz
f
IN
= 3.5MHz, f
CLK
= 11MHz
f
IN
= 1.875MHz, f
CLK
= 11MHz
f
IN
= 3.5MHz, f
CLK
= 11MHz
f
IN
= 1.875MHz, f
CLK
= 11MHz
f
IN
= 3.5MHz, f
CLK
= 11MHz
f
1
= 1.8MHz, -7dBFS;
f
2
= 1MHz, -7dBFS
f
1
= 1.8MHz, -7dBFS;
f
2
= 1MHz, -7dBFS
f
IN
= 1.875MHz, f
CLK
= 11MHz
f
IN
= 3.5MHz, f
CLK
= 11MHz
63.5
53.2
53.3
55
55
54.9
54.9
77.4
78.3
-84.3
-85
-72.7
-74.4
-75.6
-76.3
3.5
2
-63
dB
dB
dBc
dBc
dBc
dBc
dB
ns
ns
f
CLK
(Note 3)
Channel I
Channel Q
5
5.5
11
MHz
Clock
Cycles
V
ID
V
CM
R
IN
C
IN
Switched capacitor load
Differential or single-ended inputs
±0.512
V
DD
/ 2
491
5
V
V
kΩ
pF
PSRR
Offset error (V
DD
±5%)
Gain error (V
DD
±5%)
N
INL
DNL
Guaranteed no missing code (Note 2)
Residual DC offset error
Include reference error
-1.0
-5
-7.0
-0.25
10
±0.9
±0.4
±0.1
±1.5
±0.01
±10
±18.4
±2
±0.07
+1.2
+5
+10.5
+0.25
Bits
LSB
LSB
%FS
%FS
dB
LSB
ppm/°C
LSB
%FS
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
4
_______________________________________________________________________________________
10-Bit, 11Msps, Ultra-Low-Power
Analog Front-End
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= 3V, OV
DD
= 1.8V, internal reference (1.024V), C
L
≈
10pF on all digital outputs, f
CLK
= 11MHz (50% duty cycle), Rx ADC input
amplitude = -0.5dBFS, Tx DAC output amplitude = 0dBFS, differential Rx ADC input, differential Tx DAC output, C
REFP
= C
REFN
=
C
COM
= 0.33µF, unless otherwise noted. C
L
< 5pF on all aux-DAC outputs. Typical values are at T
A
= +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
f
INX,Y
= 1.875MHz at -0.5dBFS, f
INX,Y
=
1MHz at -0.5dBFS (Note 5)
f
IN
= 1.875MHz at -0.5dBFS (Note 6)
f
IN
= 1.875MHz at -0.5dBFS (Note 6)
N
INL
DNL
V
OS
Guaranteed monotonic (Note 2)
T
A
> +25°C
T
A
< +25°C
Include reference error (peak-to-peak error)
3dB corner
DC to 640kHz (Note 2)
DC to 640kHz
DC to 700kHz
f
IMAGE
= 4.32MHz, f
OUT
= 800kHz, f
CLK
=
5.12MHz
2MHz
4MHz
Baseband Attenuation
Spot relative to
100kHz
5MHz
10MHz
20MHz
DAC Conversion Rate
In-Band Noise Density
Third-Order Intermodulation
Distortion
Glitch Impulse
Spurious-Free Dynamic Range to
Nyquist
Total Harmonic Distortion to
Nyquist
Signal-to-Noise Ratio to Nyquist
SFDR
THD
SNR
f
CLK
= 11MHz, f
OUT
= 620kHz
f
CLK
= 11MHz, f
OUT
= 620kHz
f
CLK
= 11MHz, f
OUT
= 620kHz
60
f
CLK
N
D
IM3
(Note 3)
f
OUT
= 620kHz, f
CLK
= 5.12MHz,
offset = 500kHz
f
1
= 620kHz, f
2
= 640kHz
-120.6
82
10
73
-71
56.5
-60
-1
-4
-5.5
-50
1.05
1.32
0.15
50
2
62.5
21.5
49
58
90
90
11
MHz
dBc/Hz
dBc
pV
•
s
dBc
dB
dB
dB
MIN
TYP
MAX
UNITS
MAX19708
Rx ADC INTERCHANNEL CHARACTERISTICS
Crosstalk Rejection
Amplitude Matching
Phase Matching
Tx DAC DC ACCURACY
Resolution
Integral Nonlinearity
Differential Nonlinearity
Residual DC Offset
Full-Scale Gain Error
Tx PATH DYNAMIC PERFORMANCE
Corner Frequency
Passband Ripple
Group Delay Variation in Passband
Error-Vector Magnitude
Stopband Rejection
10
±0.45
±0.4
±1
±1
+1
+4
mV
+5.5
+50
1.65
0.5
mV
MHz
dB
P-P
ns
%
dBc
Bits
LSB
LSB
-90
±0.02
±0.08
dB
dB
Degrees
EVM
55
_______________________________________________________________________________________
5
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