EVALUATION KIT AVAILABLE
MAX11040K/MAX11060
24-/16-Bit, 4-Channel, Simultaneous-Sampling,
Cascadable, Sigma-Delta ADCs
General Description
The MAX11040K/MAX11060 are 24-/16-bit, 4-channel,
simultaneous-sampling, sigma-delta analog-to-digital
converters (ADCs). The devices allow simultaneous
sampling of as many as 32 channels using a built-in
cascade feature to synchronize as many as eight
devices. The serial interface of the devices allows read-
ing data from all the cascaded devices using a single
command. Four modulators simultaneously convert
each fully differential analog input with a programmable
data output rate ranging from 0.25ksps to 64ksps. The
devices achieve 106dB SNR at 16ksps and 117dB SNR
at 1ksps (MAX11040K). The devices operate from a
single +3V supply. The differential analog input range is
±2.2V when using the internal reference; an external
reference is optional. Each input is overvoltage protect-
ed up to ±6V without damage. The devices use an
internal crystal oscillator or an external source for clock.
The devices are compatible with SPI, QSPI™,
MICROWIRE
®
, and DSP-compatible 4-wire serial inter-
faces. An on-board interface logic allows one serial inter-
face (with a single chip select) to control up to eight
cascaded devices or 32 simultaneous sampling analog
input channels.
The devices are ideally suited for power-management
systems. Each channel includes an adjustable sam-
pling phase enabling internal compensation for phase
shift due to external dividers, transformers, or filters at
the inputs. The output data rate is adjustable with a
0.065% resolution (at 16ksps or below) to track the
varying frequency of a periodic input. A
SYNC
input
allows periodic alignment of the conversion timing of
multiple devices with a remote timing source.
The devices are available in a 38-pin TSSOP package speci-
fied over the -40°C to +105°C industrial temperature range.
Features
o
Four Fully Differential Simultaneously Sampled
Channels
o
Cascadable for Up to 32 Channels of
Simultaneous Sampling
o
106dB (MAX11040K) SNR at 16ksps
o
117dB (MAX11040K) SNR at 1ksps
o
0.25% Error Over a 1000:1 Dynamic Range,
Processed Over 16.7ms (MAX11040K)
o
±2.2V Full-Scale Input Range
o
±6V Overvoltage Protected Inputs
o
Internal Crystal Oscillator
o
2.5V, 50ppm/°C Internal Reference or External
Reference
o
Programmable Output Data Rate
0.25ksps to 64ksps Range
0.065% Resolution
o
Programmable Sampling Phase
0 to 333µs Delay in 1.33µs Steps
o
SPI-/QSPI-/MICROWIRE-/DSP-Compatible 4-Wire
Serial Interface
o
Cascadable Interface Allows Control of Up to
Eight Devices with a Single
CS
Signal
o
3.0V to 3.6V Analog Supply Voltage
o
2.7V to V
AVDD
Digital Supply Voltage
o
38-Pin TSSOP Package
Functional Diagram
OVRFLW
FAULT
Applications
Power-Protection Relay Equipment
Multiphase Power Systems
Industrial Data-Acquisition Systems
Medical Instrumentation
AIN0+
AIN0-
REF0
AIN1+
AIN1-
REF1
AIN2+
AIN2-
REF2
AIN3+
AIN3-
REF3
24-BIT
ADC
DIGITAL
FILTER
SYNC
DRDYIN
24-BIT
ADC
DIGITAL
FILTER
REGISTERS AND
DIGITAL
CONTROL
SERIAL
INTERFACE
DRDYOUT
CASCIN
CASCOUT
CS
SCLK
24-BIT
ADC
DIGITAL
FILTER
Ordering Information
PART
MAX11040KGUU+
MAX11060GUU+
TEMP RANGE
-40°C to +105°C
-40°C to +105°C
PIN-PACKAGE
38 TSSOP
38 TSSOP
24-BIT
ADC
DIGITAL
FILTER
DIN
DOUT
MAX11040K
REFIO
2.5V
REFERENCE
CRYSTAL
OSCILLATOR
+Denotes
a lead(Pb)-free/RoHS-compliant package.
MICROWIRE is a registered trademark of National Semiconductor Corp.
QSPI is a trademark of Motorola, Inc.
AGND
XIN
XOUT
CLKOUT
DGND
For pricing, delivery, and ordering information, please contact Maxim Direct
at 1-888-629-4642, or visit Maxim’s website at www.maximintegrated.com.
19-5741; Rev 3; 8/12
MAX11040K/MAX11060
24-/16-Bit, 4-Channel, Simultaneous-Sampling,
Cascadable, Sigma-Delta ADCs
ABSOLUTE MAXIMUM RATINGS
AVDD to AGND ........................................................-0.3V to +4V
DVDD to DGND ......................................-0.3V to (V
AVDD
+ 0.3V)
AGND to DGND.....................................................-0.3V to +0.3V
DIN, SCLK,
CS,
XIN,
SYNC, DRDYIN,
CASCIN to DGND..............................-0.3V to (V
DVDD
+ 0.3V)
DOUT,
DRDYOUT,
CASCOUT, CLKOUT,
XOUT to DGND..................................-0.3V to (V
DVDD
+ 0.3V)
FAULT, OVRFLW
to DGND ...................................-0.3V to +4.0V
AIN_+ to AIN_- ......................................................-6.0V to +6.0V
AIN_ _ to AGND (V
AVDD
≥
3V, V
DVDD
≥
2.7V, FAULTDIS = 0,
SHDN = 0, f
XIN CLOCK
≥
20MHz)......................-6.0V to +6.0V
AIN_ _ to AGND (V
AVDD
< 3V or V
DVDD
< 2.7V or FAULTDIS = 1
or SHDN = 1 or f
XIN CLOCK
< 20MHz) ..............-3.5V to +3.5V
REFIO, REF_ to AGND............................-0.3V to (V
AVDD
+ 0.3V)
Maximum Current into Any Pin............................................50mA
Continuous Power Dissipation (T
A
= +70°C)
TSSOP (derated 13.7mW/°C above +70°C)..............1096mW
Operating Temperature Range .........................-40°C to +105°C
Storage Temperature Range .............................-60°C to +150°C
Junction Temperature ......................................................+150°C
Lead Temperature (soldering, 10s) .................................+300°C
Soldering Temperature (reflow) .......................................+260°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V
AVDD
= +3.0V to +3.6V, V
DVDD
= +2.7V to V
AVDD
, f
XIN CLOCK
= 24.576MHz, f
OUT
= 16ksps, V
REFIO
= +2.5V (external), C
REFIO
=
C
REF0
= C
REF1
= C
REF2
= C
REF3
= 1μF to AGND, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at T
A
= +25°C.) (Note 1)
PARAMETER
DC ACCURACY
(Note 2)
Resolution
Differential Nonlinearity
DNL
MAX11040K
MAX11060
24-bit no missing code (MAX11040K);
16-bit no missing code (MAX11060)
T
A
= +25°C and +105°C (MAX11040K)
Integral Nonlinearity (Note 3)
Offset Error
Gain Error
Offset-Error Drift
Gain-Error Drift
Change in Gain Error vs. f
OUT
Channel-to-Channel Gain Matching
DYNAMIC SPECIFICATIONS (62.5Hz sine-wave input, 2.17V
P-P
)
Signal-to-Noise Ratio
SNR
(Note 6) (MAX11040K)
(Note 6) (MAX11060)
T
A
= +25°C and +105°C (MAX11040K)
Total Harmonic Distortion
THD
T
A
= -40°C (MAX11040K)
MAX11060
T
A
= +25°C and +105°C (MAX11040K)
Signal-to-Noise Plus Distortion
SINAD
T
A
= -40°C (MAX11040K)
MAX11060
T
A
= +25°C and +105°C (MAX11040K)
Spurious-Free Dynamic Range
SFDR
T
A
= -40°C (MAX11040K)
MAX11060
Relative Accuracy (Note 7)
0.1%FS input (MAX11040K)
6.0%FS input (MAX11040K)
94
89
100
0.25
0.005
%
93
89
94
100
dB
-106
98
dB
103
106
94.5
-94
-90
dB
dB
(Note 4)
(Note 5)
(Note 5)
f
OUT
= 0.25ksps to 64ksps
INL
T
A
= -40°C (MAX11040K)
MAX11060
-1
-1
0.5
1
< 0.025
0.03
0.001
+1
+1
mV
%FS
ppm/°C
ppm/°C
% FS
% FS
24
16
0.1
0.001
0.004
0.006
%FS
Bits
LSB
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
2
Maxim Integrated
MAX11040K/MAX11060
24-/16-Bit, 4-Channel, Simultaneous-Sampling,
Cascadable, Sigma-Delta ADCs
ELECTRICAL CHARACTERISTICS (continued)
(V
AVDD
= +3.0V to +3.6V, V
DVDD
= +2.7V to V
AVDD
, f
XIN CLOCK
= 24.576MHz, f
OUT
= 16ksps, V
REFIO
= +2.5V (external), C
REFIO
=
C
REF0
= C
REF1
= C
REF2
= C
REF3
= 1μF to AGND, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at T
A
= +25°C.) (Note 1)
PARAMETER
Bandwidth
Latency
Passband Flatness
Amplitude-Dependent Phase Error
Channel-to-Channel Phase Matching
Phase-Error Drift
Channel-to-Channel Isolation
Common-Mode Rejection
ANALOG INPUTS (AIN_+, AIN_-)
Differential FS Input Range
Single-Ended Positive Input Range
Single-Ended Negative Input Range
Positive Fault Threshold
Negative Fault Threshold
Fault Pin Response Time
Input Impedance
DC Leakage Current
Input Sampling Rate
Input Sampling Capacitance
INTERNAL REFERENCE
REFIO Output Voltage
REFIO Output Resistance
REFIO Temp Drift
REFIO Long-Term Stability
REFIO Output Noise
REFIO Power-Supply Rejection
EXTERNAL REFERENCE
REFIO Input Voltage
REFIO Sink Current
REFIO Source Current
REFIO Input Capacitance
CRYSTAL OSCILLATOR (XIN, XOUT)
Tested Resonant Frequency
Maximum Crystal ESR
Oscillator Startup Time
Oscillator Stability
Maximum Oscillator Load
V
DVDD
= 3.3V, excluding crystal
(Note 10)
24.576
30
<2
10
10
MHz
Ω
ms
ppm/°C
pF
3
SYMBOL
-3dB
(Note 8)
CONDITIONS
MIN
TYP
3.4
405
< 0.1
< 0.01
0.0001
0.001
-130
MAX
UNITS
kHz
μs
dB
From DC to 1.4kHz
FS vs. 0.1% FS
0.12
Degrees
Degrees
Degrees
dB
dB
CMRR
V
IN
V
AIN_+
V
AIN_-
V
PFT
V
NFT
V
AIN_+
- V
AIN_-
Referenced to AGND
Referenced to AGND
V
AIN_+
or V
AIN_-
(Note 9)
V
AIN_+
or V
AIN_-
(Note 9)
V
NFT
≤
V
IN
≤
V
PFT
V
IN
< V
NFT
or V
IN
> V
PFT
V
AIN_
+ = V
AIN_
-
f
S
= f
XINCLOCK
/8
-2.2
-2.2
-2.2
2.25
-2.65
109
+2.2
+2.2
+2.2
2.65
-2.25
2.5
130
> 0.5
±0.01
3.072
4.0
±1
V
V
V
V
V
μs
kΩ
μA
Msps
pF
Z
IN
I
IN
f
S
V
REF
T
A
= T
MAX
2.4
2.5
1
50
200
3
2.6
V
kΩ
ppm/°C
ppm/
1000hr
μV
RMS
dB
PSRR
V
REF
2.3
75
2.7
200
200
10
V
μA
μA
pF
Maxim Integrated
MAX11040K/MAX11060
24-/16-Bit, 4-Channel, Simultaneous-Sampling,
Cascadable, Sigma-Delta ADCs
ELECTRICAL CHARACTERISTICS (continued)
(V
AVDD
= +3.0V to +3.6V, V
DVDD
= +2.7V to V
AVDD
, f
XIN CLOCK
= 24.576MHz, f
OUT
= 16ksps, V
REFIO
= +2.5V (external), C
REFIO
=
C
REF0
= C
REF1
= C
REF2
= C
REF3
= 1μF to AGND, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at T
A
= +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
0.3 x
V
DVDD
0.7 x
V
DVDD
V
DVDD
= 3.0V
100
±0.01
15
0.15 x
V
DVDD
0.85 x
V
DVDD
±1
15
0.15 x
V
DVDD
0.85 x
V
DVDD
30
AV
DD
DV
DD
I
AVDD
I
DVDD
Normal operation
Shutdown and f
XINCLOCK
= 0Hz
Normal operation
Shutdown and f
XINCLOCK
= 0Hz
V
AVDD
= 3.3V + 100mV
P-P
at 1kHz
V
AVDD
= V
DVDD
= 3.0V to 3.6V
ESD
t
SCP
t
PW
t
SU
t
HD
t
CSH1
Human Body Model
50
20
10
0
0
3.0
2.7
25
0.1
11
0.3
70
75
2.5
3.6
V
AVDD
35
5
15
±1
UNITS
DIGITAL INPUTS (SCLK,
CS,
DIN,
SYNC,
CASCIN,
DRDYIN,
XIN)
Input Low Voltage
Input High Voltage
Input Hysteresis
Input Leakage Current
Input Capacitance
V
IL
V
IH
V
HYS
I
L
C
IN
V
V
mV
μA
pF
CMOS DIGITAL OUTPUTS (DOUT, CASCOUT,
DRDYOUT,
CLKOUT)
Output Low Voltage
Output High Voltage
Three-State Leakage Current
Three-State Capacitance
V
OL
V
OH
I
LT
C
OUT
I
SINK
= 5mA
I
SOURCE
= 1mA
V
V
μA
pF
OPEN-DRAIN DIGITAL OUTPUTS (OVRFLW,
FAULT)
Output Low Voltage
Output High Voltage
Internal Pullup Resistance
POWER REQUIREMENTS
Analog Supply Voltage
Digital Supply Voltage
Analog Supply Current (Note 11)
Digital Supply Current (Note 11)
AC Positive-Supply Rejection
DC Positive-Supply Rejection
ESD PROTECTION
All Pins
SCLK Clock Period
SCLK Pulse Width (High and Low)
DIN or
CS
to SCLK Fall Setup
SCLK Fall to DIN Hold
SCLK Rise to
CS
Rise
kV
ns
ns
ns
ns
ns
TIMING CHARACTERISTICS (Figures 7–10)
V
V
mA
μA
mA
μA
dB
dB
V
OL
V
OH
I
SINK
= 5mA
Internal pullup only
V
V
kΩ
4
Maxim Integrated
MAX11040K/MAX11060
24-/16-Bit, 4-Channel, Simultaneous-Sampling,
Cascadable, Sigma-Delta ADCs
ELECTRICAL CHARACTERISTICS (continued)
(V
AVDD
= +3.0V to +3.6V, V
DVDD
= +2.7V to V
AVDD
, f
XIN CLOCK
= 24.576MHz, f
OUT
= 16ksps, V
REFIO
= +2.5V (external), C
REFIO
=
C
REF0
= C
REF1
= C
REF2
= C
REF3
= 1μF to AGND, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at T
A
= +25°C.) (Note 1)
PARAMETER
SCLK Rise to DOUT Valid
CS
Fall to DOUT Enable
CS
Rise to DOUT Disable
CS
Pulse Width
CASCIN-to-SCLK Rise Setup
SCLK Rise to CASCOUT Valid
SYNC
Pulse Width
XIN Clock Pulse Width
DRDYIN
to
DRDYOUT
XIN Clock to
DRDYOUT
Delay
XIN Clock Period
XIN Clock to
SYNC
Setup
SYNC
to XIN Clock Hold
XIN-to-CLKOUT Delay
Power-On Reset Delay
SYMBOL
t
DOT
t
DOE
t
DOD
t
CSW
t
SC
t
COT
t
SYN
t
XPW
t
DRDY
t
XDRDY
t
XP
t
SS
t
HS
t
XCD
(Note 13)
<1
(Note 12)
(Note 12)
C
LOAD
= 30pF
DRDYIN
= DGND
40
16
5
40
C
LOAD
= 100pF
2
16
20
40
CONDITIONS
C
LOAD
= 30pF
C
LOAD
= 100pF
C
LOAD
= 30pF
C
LOAD
= 30pF
0.3
0.7
16
16
20
MIN
1.5
TYP
10
< 16
20
16
MAX
16
UNITS
ns
ns
ns
ns
ns
ns
XIN
Clock
Cycles
ns
ns
ns
ns
ns
ns
ns
ms
Note 1:
Devices are production tested at +105°C. Specifications to -40°C are guaranteed by design.
Note 2:
Tested at V
AVDD
= V
DVDD
= +3.0V.
Note 3:
Integral nonlinearity is the deviation of the analog value at any code from its ideal value after the offset and gain errors are
removed.
Note 4:
Offset nulled.
Note 5:
Offset and gain drift defined as change in offset and gain error vs. full scale.
Note 6:
Noise measured with AIN_+ = AIN_- = AGND.
Note 7:
Relative accuracy is defined as the difference between the actual RMS amplitude and the ideal RMS amplitude of a 62.5Hz
sine wave, measured over one cycle at a 16ksps data rate, expressed as a fraction of the ideal RMS amplitude. The rela-
tive accuracy specification refers to the maximum error expected over 1 million measurements. Calculated from SNR. Not
production tested.
Note 8:
Latency is a function of the sampling rate and XIN clock.
Note 9:
Voltage levels below the positive fault threshold and above the negative fault threshold, relative to AGND on each individ-
ual AIN_+ and AIN_- input, do not trigger the analog input protection circuitry.
Note 10:
Test performed using RXD MP35.
Note 11:
All digital inputs at DGND or DVDD.
Note 12:
SYNC
is captured by the subsequent XIN clock if this specification is violated.
Note 13:
Delay from DVDD exceeds 2.0V until digital interface is operational.
Maxim Integrated
5
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