19-2043; Rev 1; 8/01
µP Supervisory Circuits in 4-Bump (2
✕
2)
Chip-Scale Package
General Description
The MAX6400–MAX6405 is a family of ultra-low power
microprocessor (µP) supervisory circuits used for moni-
toring battery, power-supply, and regulated system
voltages. Each device contains a precision bandgap
reference comparator and is trimmed to specified trip
threshold voltages. These devices provide excellent cir-
cuit reliability and low cost by eliminating external com-
ponents and adjustments when monitoring system
voltages from 2.5V to 5.0V. A manual reset input is also
included.
The MAX6400–MAX6405 assert a reset signal whenev-
er the V
CC
supply voltage falls below a preset thresh-
old. These devices are differentiated by their output
logic configurations and preset threshold voltages. The
MAX6400/MAX6403 (push-pull) and the MAX6402/
MAX6405 (open-drain) have an active-low reset (RESET
is logic low when V
CC
is below V
TH
). The MAX6401/
MAX6404 have an active-high push-pull output (RESET
is logic high when V
CC
is below V
TH
). All parts are
guaranteed to be in the correct output logic state for
V
CC
down to 1V. The reset circuit is designed to ignore
fast transients on V
CC
. The MAX6400/MAX6401/
MAX6402 have voltage thresholds between 2.20V and
3.08V in approximately 100mV increments. The
MAX6403/MAX6404/MAX6405 have voltage thresholds
between 3.30V and 4.63V in approximately 100mV
increments.
Ultra-low supply current of 500nA (MAX6400/MAX6401/
MAX6402) makes these parts ideal for use in portable
equipment. These devices are available in 4-bump
chip-scale packages (UCSP™)
____________________________Features
o
Ultra-Small 4-Bump (2
✕
2) Chip-Scale Package,
(Package Pending Full Qualification—Expected
Completion Date 6/30/01. See
UCSP Reliability
Section for More Details.)
o
70% Smaller Than SC70 Package
o
Ultra-Low 500nA (typ) Supply Current
(MAX6400/MAX6401/MAX6402)
o
Factory-Trimmed Reset Thresholds from 2.20V to
4.63V in Approximately 100mV Increments
o
±2.5% Threshold Accuracy -40°C to +85°C
o
Factory-Set 100ms (min) Reset Timeout Period
o
Manual Reset Input
o
Guaranteed Reset Valid to V
CC
= 1.0V
o
Three Reset Output Logic Options: Active-Low
Push-Pull, Active-High Push-Pull, and Active-Low
Open-Drain.
o
Immune to Short V
CC
Transients
o
No External Components
MAX6400–MAX6405
Ordering Information
PART
MAX6400BS_
_-T
MAX6401BS_
_-T
MAX6402BS_
_-T
MAX6403BS_
_-T
MAX6404BS_
_-T
MAX6405BS_
_-T
TEMP. RANGE
-40 C to +85 C
-40
o
C to +85
o
C
-40 C to +85 C
-40 C to +85 C
-40
o
C to +85
o
C
-40 C to +85 C
o
o
o
o
o
o
o
o
PIN-PACKAGE
UCSP-4
UCSP-4
UCSP-4
UCSP-4
UCSP-4
UCSP-4
Applications
Portable/Battery-Powered Equipment
Cell Phones
PDAs
MP3 Players
Pagers
Selector Guide
PART
MAX6400
MAX6401
MAX6402
MAX6403
MAX6404
MAX6405
NOMINAL
V
TH
(V)
2.20 to 3.08
2.20 to 3.08
2.20 to 3.08
3.30 to 4.63
3.30 to 4.63
3.30 to 4.63
RESET/RESET
OUTPUT TYPE
Push-Pull, Active-Low
Push-Pull, Active-High
Open-Drain, Active-Low
Push-Pull, Active-Low
Push-Pull, Active-High
Open-Drain, Active-Low
The MAX6400–MAX6405 are available in factory-set V
CC
reset
thresholds from 2.20V to 4.63V, in approximately 0.1V incre-
ments. Choose the desired reset-threshold suffix from Table 1
and insert it in the blank space following “S”. There are 21 stan-
dard versions with a required order increment of 2500 pieces.
Sample stock is generally held on the standard versions only
(Table 1). Required order increment is 10,000 pieces for non-
standard versions (Table 2). Contact factory for availability. All
devices available in tape-and-reel only.
UCSP reliability is integrally linked to the user’s assembly
methods, circuit board material, and environment. Refer to the
UCSP Reliability Notice in the UCSP Reliability section of this
data sheet for more information.
Pin Configuration appears at end of data sheet.
UCSP is a trademark of Maxim Integrated Products, Inc.
1
________________________________________________________________
Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
µP Supervisory Circuits in 4-Bump (2
✕
2)
Chip-Scale Package
MAX6400–MAX6405
ABSOLUTE MAXIMUM RATINGS
All voltages measured with respect to GND, unless otherwise noted.
V
CC
...........................................................................-0.3V to +6V
RESET,
RESET
(push-pull) .........................-0.3V to (V
CC
+ 0.3V)
RESET
(open-drain)..................................................-0.3V to +6V
MR
..............................................................-0.3V to (V
CC
+ 0.3V)
Input/Output into Any Pin ....................................................20mA
Continuous Power Dissipation (T
A
= +70°C)
4-Bump UCSP (derate 3.8mW/°C above +70°C).........303mW
Operating Temperature Range ..........................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range ............................-65°C to +150°C
Bump Reflow Temperature .............................................+235°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V
CC
= 1.0V to 5.5V, T
A
= -40°C to +85°C, unless otherwise noted. Typical values are at V
CC
= 3.0V and T
A
= +25°C.) (Note 1)
PARAMETER
Supply Voltage Range
SYMBOL
V
CC
CONDITIONS
T
A
= 0°C to +70°C
T
A
= -40°C to +85°C
MAX6400/MAX6401/MAX6402
V
CC
= 3.0V for V
TH
≤
2.93V,
V
CC
= 3.2V for V
TH
≥
2.93V, no load
V
CC
= 5.5V, no load
Reset Threshold
Reset Threshold Hysteresis
Reset Threshold Tempco
V
CC
to Reset Delay
Reset Active Timeout Period
∆V
TH
/°C
t
RD
t
RP
V
IL
MR
Input
V
IH
V
IL
V
IH
MR
Minimum Input Pulse Width
MR
Glitch Rejection
MR
to Reset Delay Time
MR
Pullup Resistance
25
t
MD
V
TH
> 4.0V
V
TH
≤
4.0V
V
CC
= (V
TH
+100mV) to (V
TH
- 100mV)
100
2.0
0.2 x V
CC
0.7 x V
CC
1
100
200
50
75
µs
ns
ns
kΩ
V
TH
Table 1
T
A
= +25°C
T
A
= -40°C to +85°C
MIN
1.0
1.2
0.5
1.0
TYP
MAX
5.5
5.5
1.0
1.75
V
mV
ppm/°C
µs
280
0.8
V
ms
UNITS
V
Supply Current
I
CC
µA
V
TH
- 1.5% V
TH
V
TH
+ 1.5%
V
TH
- 2.5% V
TH
V
TH
+ 2.5%
6.3
9.5
40
20
185
MAX6400/MAX6401/MAX6402
MAX6403/MAX6404/MAX6405
2
_______________________________________________________________________________________
µP Supervisory Circuits in 4-Bump (2
✕
2)
Chip-Scale Package
ELECTRICAL CHARACTERISTICS (continued)
(V
CC
= 1.0V to 5.5V, T
A
= -40°C to +85°C, unless otherwise noted. Typical values are at V
CC
= 3.0V and T
A
= +25°C.) (Note 1)
PARAMETER
RESET
Output Voltage Low
(MAX6400/MAX6402/MAX6403/
MAX6405)
SYMBOL
V
OL
CONDITIONS
I
SINK
= 1.6mA, V
CC
≥
2.1V, reset asserted
I
SINK
= 100µA, V
CC
≥
1.2V, reset asserted
I
SOURCE
= 500µA, V
CC
= 3.2V, MAX6400,
only, reset not asserted
RESET
Output Voltage High
(MAX6400/MAX6403)
V
OH
I
SOURCE
= 800µA, V
CC
= 4.5V,
V
TH
≤
4.38V, reset not asserted
I
SOURCE
= 800µA, V
CC
= V
TH
(max),
V
TH
≥
4.5V, reset not asserted
I
SOURCE
= 500µA, V
CC
≥
2.1V, reset
asserted
V
OH
I
SOURCE
= 50µA, V
CC
≥
1.2V, reset
asserted
I
SINK
= 1.2mA, V
CC
≥
3.2V, reset not
asserted, MAX6401 only
V
OL
I
SINK
= 3.2mA, V
CC
≥
4.5V, reset not
asserted, V
TH
≤
4.38V
I
SINK
= 3.2mA, V
CC
= V
TH
(max),
V
TH
≥
4.5V, reset not asserted
Open-Drain
RESET
Output
Leakage Current (Note 2)
RESET
not asserted
0.8 x V
CC
0.8 x V
CC
0.8 x V
CC
0.8 x V
CC
0.8 x V
CC
0.3
0.4
0.4
0.1
µA
V
V
MIN
TYP
MAX
0.3
V
0.4
UNITS
MAX6400–MAX6405
RESET Output Voltage
(MAX6401/MAX6404)
Note 1:
Production testing done at +25°C only. Overtemperature limits are guaranteed by design and not production tested.
Note 2:
Guaranteed by design.
_______________________________________________________________________________________
3
µP Supervisory Circuits in 4-Bump (2
✕
2)
Chip-Scale Package
MAX6400–MAX6405
Typical Operating Characteristics
(T
A
= +25°C, unless otherwise noted.)
SUPPLY CURRENT vs. TEMPERATURE
MAX6400-05 toc01
POWER-DOWN RESET DELAY
vs. TEMPERATURE
V
OD
= OVERDRIVE VOLTAGE
200
RESET DELAY (µs)
MAX6400-05 toc02
250
1.4
1.2
SUPPLY CURRENT (µA)
V
CC
= 5V
1.0
0.8
0.6
0.4
0.2
0
-40
-20
0
20
40
60
80
TEMPERATURE (°C)
V
CC
= 1.2V
V
CC
= 3.3V
150
V
OD
= 10mV
100
V
OD
= 20mV
50
V
OD
= 100mV
V
OD
= 200mV
-40
-20
0
20
40
60
80
TEMPERATURE (°C)
0
POWER-UP RESET TIMEOUT
vs. TEMPERATURE
MAX6400-05 toc03
MAXIMUM TRANSIENT DURATION
vs. THRESHOLD OVERDRIVE
MAXIMUM TRANSIENT DURATION (µs)
MAX6400-05 toc04
210
POWER-UP RESET TIMEOUT (ms)
200
190
180
170
160
150
140
130
-40
-20
0
20
40
60
80
TEMPERATURE (°C)
500
400
300
RESET/RESET IS
ASSERTED
ABOVE LINE
200
100
0
1
10
100
1000
THRESHOLD OVERDRIVE V
TH
- V
CC
(mV)
4
_______________________________________________________________________________________
µP Supervisory Circuits in 4-Bump (2
✕
2)
Chip-Scale Package
Pin Description
PIN
MAX6400/MAX6402
MAX6403/MAX6405
A1
MAX6401/MAX6404
A1
NAME
GND
Ground
Active-Low Reset Output, (Open-Drain or Push-Pull).
RESET
is asserted low when the V
CC
input is below the selected
reset threshold.
RESET
remains low for the reset timeout
period after V
CC
exceeds the device reset threshold. Open-
drain outputs require an external pullup resistor.
Active-High Reset Output. RESET remains high while V
CC
is
below the reset threshold and for at least 100ms after V
CC
rises above the reset threshold.
Active-Low Manual Reset. Internal 50kΩ pullup to V
CC
. Pull
low to assert a reset. Reset remains asserted as long as
MR
is low and for the reset timeout period after
MR
goes high.
Leave unconnected or connect to V
CC
if unused.
Supply Voltage and Input for the Reset Threshold Monitor
FUNCTION
MAX6400–MAX6405
B1
—
RESET
—
B1
RESET
B2
B2
MR
A2
A2
V
CC
Detailed Description
Reset Output
A microprocessor’s (µP’s) reset input starts the µP in a
known state. These µP supervisory circuits assert reset
to prevent code execution errors during power-up,
power-down, or brownout conditions.
RESET
is guaranteed to be a logic low for V
CC
down to
1V. Once V
CC
exceeds the reset threshold, an internal
timer keeps
RESET
low for the reset timeout period;
after this interval,
RESET
goes high.
If a brownout condition occurs (V
CC
dips below the
reset threshold),
RESET
goes low. Any time V
CC
goes
below the reset threshold, the internal timer resets to
zero, and
RESET
goes low. The internal timer starts
after V
CC
returns above the reset threshold, and
RESET
remains low for the reset timeout period.
The manual reset input (MR) can also initiate a reset,
see the
Manual Reset Input
section. The MAX6401/
MAX6404 have active-high RESET outputs that are the
inverse of the MAX6400/MAX6402/MAX6403/MAX6405
outputs (Figure 1).
the reset active timeout period (t
RP
) after
MR
returns
high. This input has an internal 50kΩ pullup resistor, so
it can be left open if it is not used.
MR
can be driven
with TTL or CMOS logic levels, or with open-drain/col-
lector outputs. Connect a normally open momentary
switch from
MR
to GND to create a manual reset func-
tion; external debouncing circuitry is not required. If
MR
is driven from long cables or if the device is used in a
noisy environment, connect a 0.1µF capacitor from
MR
to ground to provide additional noise immunity (see
Figure 1).
Applications Information
Interfacing to µP with Bidirectional
Reset Pins
Since the
RESET
output on the MAX6402/MAX6405 is
open-drain, these devices interface easily with (µPs)
that have bidirectional reset pins. Connecting the µP
supervisor’s
RESET
output directly to the microcon-
troller’s (µC’s)
RESET
pin with a single pullup resistor
allows either device to assert reset (Figure 2).
Negative-Going VCC Transients
These devices are relatively immune to short-duration,
negative-going V
CC
transients (glitches).
The
Typical Operating Characteristics
show the
Maximum Transient Duration vs. Reset Threshold
Overdrive graph, for which reset pulses are not gener-
5
Manual Reset Input
Many µP-based products require manual reset capabil-
ity, allowing the operator, a test technician, or external
logic circuit to initiate a reset. A logic low on
MR
asserts
reset. Reset remains asserted while
MR
is low, and for
_______________________________________________________________________________________
下载中心专版
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
