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74FCT16244ATPVG

产品描述buffers & line drivers 16-bit buffer/line driver
产品类别半导体    其他集成电路(IC)   
文件大小80KB,共6页
制造商IDT(艾迪悌)
官网地址http://www.idt.com/
标准  
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74FCT16244ATPVG概述

buffers & line drivers 16-bit buffer/line driver

74FCT16244ATPVG规格参数

参数名称属性值
ManufactureIDT (Integrated Device Technology)
产品种类
Product Category
Buffers & Line Drivers
RoHSYes
Number of Input Lines4
Number of Output Lines4
电源电压-最大
Supply Voltage - Max
5.5 V
Supply Voltage - Mi4.5 V
最大工作温度
Maximum Operating Temperature
+ 85 C
安装风格
Mounting Style
SMD/SMT
封装 / 箱体
Package / Case
SSOP-48
系列
Packaging
Tube
最小工作温度
Minimum Operating Temperature
- 40 C
Number of Channels per Chi16
工厂包装数量
Factory Pack Quantity
30

文档预览

下载PDF文档
IDT54/74FCT16244T/AT/CT
FAST CMOS 16-BIT BUFFER/LINE DRIVER
MILITARY AND INDUSTRIAL TEMPERATURE RANGES
FAST CMOS 16-BIT
BUFFER/LINE DRIVER
IDT54/74FCT16244T/AT/CT
FEATURES:
0.5 MICRON CMOS Technology
High-speed, low-power CMOS replacement for ABT functions
Typical t
SK(o)
(Output Skew) < 250ps
Low input and output leakage
1µA (max.)
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
High drive outputs (–32mA I
OH
, 64mA I
OL
)
Power off disable outputs permit “live insertion”
Typical V
OLP
(Output Ground Bounce) < 1.0V at V
CC
= 5V,
T
A
= 25°C
Available in the following packages:
– Industrial: SSOP, TSSOP
– Military: CERPACK
DESCRIPTION:
The FCT16244T 16-Bit Buffer/Line Driver is for bus interface or signal
buffering applications requiring high speed and low power dissipation. These
devices have a flow through pin organization, and shrink packaging to simplify
board layout. All inputs are designed with hysteresis for improved noise margin.
The three-state controls allow independent 4-bit, 8-bit or combined 16-bit
operation. These parts are plug in replacements for 54/74ABT16244 where
higher speed, lower noise or lower power dissipation levels are desired.
The FCT16244T is ideally suited for driving high capacitance loads
(>200pF) and low impedance backplanes. These "high drive" buffers are
designed with power off disable capability to allow "live insertion" of boards when
used in a backplane interface.
FUNCTIONAL BLOCK DIAGRAM
1
OE
1
A
1
1
A
2
1
A
3
1
A
4
1
Y
1
1
Y
2
1
Y
3
1
Y
4
3
OE
3
A
1
3
A
2
3
A
3
3
A
4
3
Y
1
3
Y
2
3
Y
3
3
Y
4
2
OE
2
A
1
2
A
2
2
A
3
2
A
4
2
Y
1
2
Y
2
2
Y
3
2
Y
4
4
OE
4
A
1
4
A
2
4
A
3
4
A
4
4
Y
1
4
Y
2
4
Y
3
4
Y
4
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND INDUSTRIAL TEMPERATURE RANGES
1
© 2009 Integrated Device Technology, Inc.
SEPTEMBER 2009
DSC-5460/6

 
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