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74LCX16374MTDX

产品描述flip flops 16-bit D flip-flop
产品类别逻辑    逻辑   
文件大小134KB,共11页
制造商Fairchild
官网地址http://www.fairchildsemi.com/
标准
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74LCX16374MTDX概述

flip flops 16-bit D flip-flop

74LCX16374MTDX规格参数

参数名称属性值
Brand NameFairchild Semiconductor
是否无铅不含铅
是否Rohs认证符合
厂商名称Fairchild
零件包装代码TSSOP
包装说明TSSOP, TSSOP48,.3,20
针数48
制造商包装代码48 LD,TSSOP,JEDEC MO-153, 6.1MM WIDE
Reach Compliance Codecompliant
ECCN代码EAR99
系列LVC/LCX/Z
JESD-30 代码R-PDSO-G48
JESD-609代码e4
长度12.5 mm
负载电容(CL)50 pF
逻辑集成电路类型BUS DRIVER
最大频率@ Nom-Sup170000000 Hz
最大I(ol)0.024 A
湿度敏感等级2
位数8
功能数量2
端口数量2
端子数量48
最高工作温度85 °C
最低工作温度-40 °C
输出特性3-STATE
输出极性TRUE
封装主体材料PLASTIC/EPOXY
封装代码TSSOP
封装等效代码TSSOP48,.3,20
封装形状RECTANGULAR
封装形式SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法TAPE AND REEL
峰值回流温度(摄氏度)NOT SPECIFIED
电源3.3 V
Prop。Delay @ Nom-Sup6.2 ns
传播延迟(tpd)7.4 ns
认证状态Not Qualified
座面最大高度1.2 mm
最大供电电压 (Vsup)3.6 V
最小供电电压 (Vsup)2 V
标称供电电压 (Vsup)2.5 V
表面贴装YES
技术CMOS
温度等级INDUSTRIAL
端子面层Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式GULL WING
端子节距0.5 mm
端子位置DUAL
处于峰值回流温度下的最长时间NOT SPECIFIED
触发器类型POSITIVE EDGE
宽度6.1 mm
Base Number Matches1

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74LCX16374 Low Voltage 16-Bit D-Type Flip-Flop with 5V Tolerant Inputs and Outputs
February 1994
Revised May 2005
74LCX16374
Low Voltage 16-Bit D-Type Flip-Flop
with 5V Tolerant Inputs and Outputs
General Description
The LCX16374 contains sixteen non-inverting D-type
flip-flops with 3-STATE outputs and is intended for bus ori-
ented applications. The device is byte controlled. A buff-
ered clock (CP) and Output Enable (OE) are common to
each byte and can be shorted together for full 16-bit opera-
tion.
The LCX16374 is designed for low voltage (2.5V or 3.3V)
V
CC
applications with capability of interfacing to a 5V signal
environment.
The LCX16374 is fabricated with an advanced CMOS tech-
nology to achieve high speed operation while maintaining
CMOS low power dissipation.
Features
s
5V tolerant inputs and outputs
s
2.3V–3.6V V
CC
specifications provided
s
6.2 ns t
PD
max (V
CC
3.3V), 20
P
A I
CC
max
s
Power down high impedance inputs and outputs
s
Supports live insertion/withdrawal (Note 1)
s
r
24 mA output drive (V
CC
3.0V)
s
Uses proprietary noise/EMI reduction circuitry
s
Latch-up performance exceeds 500 mA
s
ESD performance:
Human body model
!
2000V
Machine model
!
200V
s
Also packaged in plastic Fine-Pitch Ball Grid Array
(FBGA)
Note 1:
To ensure the high-impedance state during power up or down, OE
should be tied to V
CC
through a pull-up resistor: the minimum value or the
resistor is determined by the current-sourcing capability of the driver.
Ordering Code:
Order Number
74LCX16374G
(Note 2)(Note 3)
74LCX16374MEA
(Note 3)
74LCX16374MTD
(Note 3)
Package Number
BGA54A
MS48A
MTD48
Package Description
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Note 2:
Ordering code “G” indicates Trays.
Note 3:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
© 2005 Fairchild Semiconductor Corporation
DS012003
www.fairchildsemi.com

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